https://bugs.llvm.org/show_bug.cgi?id=41149
Bug ID: 41149
Summary: Compiling wasm simd bitcode w/o +simd128 can fail
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: WebAssembly
Assignee: unassignedb...@nondot.org
Reporter: s...@google.com
CC: llvm-bugs@lists.llvm.org
Created attachment 21631
--> https://bugs.llvm.org/attachment.cgi?id=21631&action=edit
Bitcode file demonstrating bug
Enclosed is some bitcode that was generated using vector types. Building with
llc --mtriple=wasm32-unknown--wasm -mattr=simd128 < /tmp/mod.bc
works fine; building without simd128 like so:
llc --mtriple=wasm32-unknown--wasm < /tmp/mod.bc
fails with
ScalarizeVectorResult #0: t104: v1i8 = abs t97
LLVM ERROR: Do not know how to scalarize the result of this operator!
--
You are receiving this mail because:
You are on the CC list for the bug.
_______________________________________________
llvm-bugs mailing list
llvm-bugs@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs