that it's easier to work with :).
I'm not opposed to doing this, but I don't think we should overload
ConstantFP() and getConstantFP() for this. Could you make a new
VectorConstantFP or something?
We overload ISD::FADD and quite a lot of others. Why not ISD::ConstantFP too?
Dan
--
Dan
Add a default parameter to a SmallVector constructor to allow it to
be called with just an initial length value, just like in std::vector.
Ok.
Should this be marked 'explicit'?
Yep. Good catch.
Dan
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Author: djg
Date: Fri Jun 29 17:16:25 2007
New Revision: 37819
URL: http://llvm.org/viewvc/llvm-project?rev=37819view=rev
Log:
Add an explicit keyword. Thanks Chris!
Modified:
llvm/trunk/include/llvm/ADT/SmallVector.h
Modified: llvm/trunk/include/llvm/ADT/SmallVector.h
URL:
/test.php?machine=142night=3088).
Lauro
--
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Index: include/llvm/ADT/SmallVector.h
===
RCS file: /var/cvs/llvm/llvm/include/llvm/ADT/SmallVector.h,v
retrieving revision 1.30
diff -u -r1.30 SmallVector.h
--- include
Changes in directory llvm/include/llvm/ADT:
SmallVector.h updated: 1.30 - 1.31
---
Log message:
Add a default parameter to a SmallVector constructor to allow it to
be called with just an initial length value, just like in std::vector.
---
Diffs of the changes: (+1 -1)
SmallVector.h |2
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.133 - 1.134
---
Log message:
Add new TargetLowering code to provide the final register type that an
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.193 - 1.194
---
Log message:
Add new TargetLowering code to provide the final register type that an
illegal value type will be transformed to, for code that needs the
register type after all transformations instead
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.471 - 1.472
TargetLowering.cpp updated: 1.123 - 1.124
---
Log message:
Add new TargetLowering code to provide the final register type that an
illegal value type will be transformed to, for code that needs the
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.503 - 1.504
---
Log message:
Fix an assertion failure in legalizing bitcast operators on targets where
vectors are split down to single elements as part of legalization.
---
Diffs of the changes: (+15 -23)
Changes in directory llvm/test/CodeGen/ARM:
illegal-vector-bitcast.ll added (r1.1)
---
Log message:
Fix an assertion failure in legalizing bitcast operators on targets where
vectors are split down to single elements as part of legalization.
---
Diffs of the changes: (+13 -0)
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.501 - 1.502
---
Log message:
Make the comment for ScalarizeVectorOp mention that it is only for use
with single-element vectors.
---
Diffs of the changes: (+6 -4)
LegalizeDAG.cpp | 10 ++
1 files
Changes in directory llvm/include/llvm/Support:
Debug.h updated: 1.15 - 1.16
---
Log message:
Allow DOUT to be used outside of the llvm namespace.
---
Diffs of the changes: (+2 -2)
Debug.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.469 - 1.470
---
Log message:
Use getVectorTypeBreakdown in FunctionLoweringInfo::CreateRegForValue
to compute the number and type of registers needed for vector values
instead of computing it manually. This
as a splat BUILD_VECTOR,
except that it's easier to work with :).
Dan
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Changes in directory llvm/lib/Target/X86:
X86TargetAsmInfo.cpp updated: 1.42 - 1.43
---
Log message:
Remove a redundant newline in the asm output for ELF .rodata sections.
---
Diffs of the changes: (+1 -1)
X86TargetAsmInfo.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.38 - 1.39
---
Log message:
Document the encoding of MVT::ValueType.
---
Diffs of the changes: (+6 -0)
ValueTypes.h |6 ++
1 files changed, 6 insertions(+)
Index: llvm/include/llvm/CodeGen/ValueTypes.h
diff
to undef.
Dan
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Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.132 - 1.133
---
Log message:
Rename (shrinkify) MVT::isExtendedValueType to MVT::isExtendedVT.
---
Diffs of the changes: (+13 -13)
TargetLowering.h | 26 +-
1 files changed, 13
Changes in directory llvm/lib/VMCore:
ValueTypes.cpp updated: 1.20 - 1.21
---
Log message:
Rename (shrinkify) MVT::isExtendedValueType to MVT::isExtendedVT.
---
Diffs of the changes: (+2 -2)
ValueTypes.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.502 - 1.503
SelectionDAG.cpp updated: 1.410 - 1.411
---
Log message:
Rename (shrinkify) MVT::isExtendedValueType to MVT::isExtendedVT.
---
Diffs of the changes: (+2 -2)
LegalizeDAG.cpp |2 +-
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.39 - 1.40
---
Log message:
Rename (shrinkify) MVT::isExtendedValueType to MVT::isExtendedVT.
---
Diffs of the changes: (+6 -6)
ValueTypes.h | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
for a linear vector length, which seems enough to be comfortable.
Dan
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though.
LLVM does so have copy instructions. The syntax is a little odd though,
and the keyword is spelled 'bitcast' ;-).
%x = bitcast i64 undef to i64;
if (%x = 0)
%z = %y / (%x + 1); // don't divide by undef!
Now what should instcombine do?
Dan
--
Dan Gohman, Cray Inc
a cleaner way to solve this.
Dan
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Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.36 - 1.37
ValueTypes.td updated: 1.4 - 1.5
---
Log message:
Renumber the SimpleValueType values to fill in the hole left by
removing MVT::Vector.
---
Diffs of the changes: (+24 -25)
ValueTypes.h | 26
, Ops[0], Ops.size());
This idiom occurs in several places. Do you think it makes sense to
have a helper method on SelectionDAG to do this?
Sure.
Dan
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Changes in directory llvm/lib/VMCore:
ValueTypes.cpp updated: 1.19 - 1.20
---
Log message:
Use utostr from StringExtras.h instead of ostringstream from sstream.
---
Diffs of the changes: (+4 -7)
ValueTypes.cpp | 11 ---
1 files changed, 4 insertions(+), 7 deletions(-)
Index:
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.130 - 1.131
---
Log message:
Simplify the expression for TargetLowering::isTypeLegal.
---
Diffs of the changes: (+1 -3)
TargetLowering.h |4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index:
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.37 - 1.38
---
Log message:
Simplify the expression for MVT::isExtendedValueType.
---
Diffs of the changes: (+1 -1)
ValueTypes.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.131 - 1.132
---
Log message:
Replace ?: with if statements, for clarity.
---
Diffs of the changes: (+12 -18)
TargetLowering.h | 30 --
1 files changed, 12 insertions(+), 18
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.107 - 1.108
X86ATTAsmPrinter.h updated: 1.18 - 1.19
---
Log message:
Say ATT instead of Intel in the comments for ATT support.
---
Diffs of the changes: (+3 -3)
X86ATTAsmPrinter.cpp |4 ++--
X86ATTAsmPrinter.h
Changes in directory llvm/lib/Target/X86:
X86InstrSSE.td updated: 1.184 - 1.185
---
Log message:
Fix loadv2i32 to be loadv4i32, though it isn't actually used anywhere yet.
---
Diffs of the changes: (+1 -1)
X86InstrSSE.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86InstrSSE.td updated: 1.185 - 1.186
---
Log message:
Make minor adjustments to whitespace and comments to reduce differences
between SSE1 instructions and their respective SSE2 analogues.
---
Diffs of the changes: (+28 -25)
X86InstrSSE.td | 53
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.414 - 1.415
---
Log message:
Generalize MVT::ValueType and associated functions to be able to represent
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special
Changes in directory llvm/lib/VMCore:
ValueTypes.cpp updated: 1.18 - 1.19
---
Log message:
Generalize MVT::ValueType and associated functions to be able to represent
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector
Changes in directory llvm/include/llvm:
Module.h updated: 1.89 - 1.90
---
Log message:
Add a convenince member function for appending strings to a module's
module-level asm string data.
---
Diffs of the changes: (+7 -0)
Module.h |7 +++
1 files changed, 7 insertions(+)
Index:
Changes in directory llvm/utils/TableGen:
IntrinsicEmitter.cpp updated: 1.32 - 1.33
---
Log message:
Fix a typo in a comment.
---
Diffs of the changes: (+1 -1)
IntrinsicEmitter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/utils/TableGen/IntrinsicEmitter.cpp
Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.132 - 1.133
---
Log message:
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.39 - 1.40
ARMInstrInfo.h updated: 1.16 - 1.17
ARMInstrInfo.td updated: 1.114 - 1.115
ARMInstrThumb.td updated: 1.32 - 1.33
---
Log message:
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction
Changes in directory llvm/utils/TableGen:
CodeGenInstruction.h updated: 1.30 - 1.31
CodeGenTarget.cpp updated: 1.94 - 1.95
InstrInfoEmitter.cpp updated: 1.62 - 1.63
---
Log message:
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along
Changes in directory llvm/lib/Target/X86:
X86InstrFPStack.td updated: 1.10 - 1.11
X86InstrInfo.cpp updated: 1.92 - 1.93
X86InstrInfo.h updated: 1.67 - 1.68
X86InstrInfo.td updated: 1.308 - 1.309
X86InstrMMX.td updated: 1.33 - 1.34
X86InstrSSE.td updated: 1.186 - 1.187
---
Log message:
Revert
Changes in directory llvm/lib/Target:
Target.td updated: 1.105 - 1.106
---
Log message:
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.58 - 1.59
ARMISelLowering.h updated: 1.17 - 1.18
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.149 - 1.150
X86ISelLowering.cpp updated: 1.413 - 1.414
X86ISelLowering.h updated: 1.100 - 1.101
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so
Changes in directory llvm/lib/Target/Sparc:
SparcISelDAGToDAG.cpp updated: 1.122 - 1.123
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.230 - 1.231
PPCISelLowering.cpp updated: 1.274 - 1.275
PPCISelLowering.h updated: 1.65 - 1.66
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAG.h updated: 1.150 - 1.151
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.128 - 1.129
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the
Changes in directory llvm/lib/Target/Alpha:
AlphaISelDAGToDAG.cpp updated: 1.70 - 1.71
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.498 - 1.499
TargetLowering.cpp updated: 1.120 - 1.121
---
Log message:
Tidy up ValueType names in comments.
---
Diffs of the changes: (+5 -5)
LegalizeDAG.cpp|4 ++--
TargetLowering.cpp |6 +++---
2
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.127 - 1.128
---
Log message:
Rename TargetLowering::getNumElements and friends to
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.
---
Diffs of the
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.466 - 1.467
TargetLowering.cpp updated: 1.119 - 1.120
---
Log message:
Rename TargetLowering::getNumElements and friends to
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number
instructions in
the X86 files isn't unambiguously prettier though. But I've already
strayed from my tangent here :-}.
Attached is a patch which does points 1 and 2 of what you describe above.
Dan
--
Dan Gohman, Cray Inc.
Index: include/llvm/Target/TargetInstrInfo.h
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.312 - 1.313
ScheduleDAG.cpp updated: 1.125 - 1.126
SelectionDAG.cpp updated: 1.407 - 1.408
---
Log message:
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
for needing the DAG node to print
Changes in directory llvm/lib/Target/Alpha:
AlphaISelDAGToDAG.cpp updated: 1.69 - 1.70
---
Log message:
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.65 - 1.66
---
Log message:
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with
Changes in directory llvm/include/llvm/Analysis:
ScalarEvolution.h updated: 1.21 - 1.22
---
Log message:
Rename ScalarEvolution::deleteInstructionFromRecords to
deleteValueFromRecords and loosen the types to all it to accept
Value* instead of just Instruction*, since this is what
Changes in directory llvm/lib/Analysis:
ScalarEvolution.cpp updated: 1.120 - 1.121
---
Log message:
Rename ScalarEvolution::deleteInstructionFromRecords to
deleteValueFromRecords and loosen the types to all it to accept
Value* instead of just Instruction*, since this is what
ScalarEvolution
Changes in directory llvm/lib/Transforms/Scalar:
IndVarSimplify.cpp updated: 1.122 - 1.123
LoopStrengthReduce.cpp updated: 1.141 - 1.142
---
Log message:
Rename ScalarEvolution::deleteInstructionFromRecords to
deleteValueFromRecords and loosen the types to all it to accept
Value* instead of
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.222 - 1.223
---
Log message:
Add keyword explicit.
---
Diffs of the changes: (+1 -1)
MachineInstr.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u
Changes in directory llvm/lib/Target/X86:
X86InstrX86-64.td updated: 1.16 - 1.17
---
Log message:
Define the pushq instruction for x86-64.
---
Diffs of the changes: (+2 -0)
X86InstrX86-64.td |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/X86/X86InstrX86-64.td
diff -u
Is this necessary? ARM is already doing this by marking trivially re-
materializable instructions with let isReMaterializable = 1.
It's not necessary, but it seems cleaner :-).
In the ARM target, other than instructions that are always trivially
rematerialiable, there's only LDR, with a
an unknown, though hasComputableLoopEvolution
works.
Dan
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Changes in directory llvm/lib/Analysis:
ScalarEvolution.cpp updated: 1.119 - 1.120
---
Log message:
In SCEVAddExpr::get, skip over any cast operands before looking for nested
add operands after constant operands. The recent change to recognize
sign-extend expressions caused this to be exposed
think you're asking for. I left LDRcp in, but that can be fixed.
Dan
--
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Index: include/llvm/Target/TargetInstrInfo.h
===
RCS file: /var/cvs/llvm/llvm/include/llvm/Target/TargetInstrInfo.h,v
retrieving revision
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.247 - 1.248
VirtRegMap.cpp updated: 1.112 - 1.113
---
Log message:
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.38 - 1.39
ARMInstrInfo.h updated: 1.15 - 1.16
ARMInstrInfo.td updated: 1.111 - 1.112
ARMInstrThumb.td updated: 1.31 - 1.32
---
Log message:
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a
Changes in directory llvm/utils/TableGen:
CodeGenInstruction.h updated: 1.29 - 1.30
CodeGenTarget.cpp updated: 1.93 - 1.94
InstrInfoEmitter.cpp updated: 1.61 - 1.62
---
Log message:
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to
Changes in directory llvm/lib/Target/X86:
X86InstrFPStack.td updated: 1.9 - 1.10
X86InstrInfo.cpp updated: 1.91 - 1.92
X86InstrInfo.h updated: 1.66 - 1.67
X86InstrInfo.td updated: 1.307 - 1.308
X86InstrMMX.td updated: 1.32 - 1.33
X86InstrSSE.td updated: 1.183 - 1.184
---
Log message:
Replace
Changes in directory llvm/lib/Analysis:
ScalarEvolution.cpp updated: 1.118 - 1.119
ScalarEvolutionExpander.cpp updated: 1.17 - 1.18
---
Log message:
Add a SCEV class and supporting code for sign-extend expressions.
This created an ambiguity for expandInTy to decide when to use
sign-extension
Changes in directory llvm/include/llvm/Analysis:
ScalarEvolutionExpander.h updated: 1.16 - 1.17
ScalarEvolutionExpressions.h updated: 1.11 - 1.12
---
Log message:
Add a SCEV class and supporting code for sign-extend expressions.
This created an ambiguity for expandInTy to decide when to use
Changes in directory llvm/lib/Transforms/Scalar:
IndVarSimplify.cpp updated: 1.121 - 1.122
---
Log message:
Use SCEVConstant::get instead of SCEVUnknown::get to create an
integer constant SCEV.
---
Diffs of the changes: (+2 -2)
IndVarSimplify.cpp |4 ++--
1 files changed, 2
Changes in directory llvm/lib/Analysis:
ScalarEvolutionExpander.cpp updated: 1.18 - 1.19
---
Log message:
Fold a binary operator with constant operands when expanding code for a SCEV.
---
Diffs of the changes: (+5 -0)
ScalarEvolutionExpander.cpp |5 +
1 files changed, 5
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.106 - 1.107
X86AsmPrinter.cpp updated: 1.242 - 1.243
---
Log message:
Eliminate some redundant newlines in asm output.
---
Diffs of the changes: (+2 -3)
X86ATTAsmPrinter.cpp |4 ++--
X86AsmPrinter.cpp|1
Changes in directory llvm/lib/Target:
TargetAsmInfo.cpp updated: 1.27 - 1.28
---
Log message:
Eliminate some redundant newlines in asm output.
---
Diffs of the changes: (+2 -2)
TargetAsmInfo.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/include/llvm/Target:
TargetAsmInfo.h updated: 1.33 - 1.34
---
Log message:
Eliminate some redundant newlines in asm output.
---
Diffs of the changes: (+2 -2)
TargetAsmInfo.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.246 - 1.247
VirtRegMap.cpp updated: 1.111 - 1.112
---
Log message:
Add a target hook to allow loads from constant pools to be rematerialized, and
an
implementation for x86.
---
Diffs of the changes: (+6 -3)
Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.127 - 1.128
---
Log message:
Add a target hook to allow loads from constant pools to be rematerialized, and
an
implementation for x86.
---
Diffs of the changes: (+10 -0)
TargetInstrInfo.h | 10 ++
1
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.cpp updated: 1.89 - 1.90
X86InstrInfo.h updated: 1.64 - 1.65
---
Log message:
Add a target hook to allow loads from constant pools to be rematerialized, and
an
implementation for x86.
---
Diffs of the changes: (+26 -0)
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.34 - 1.35
---
Log message:
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
---
Diffs of the changes: (+2 -2)
ValueTypes.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.495 - 1.496
SelectionDAG.cpp updated: 1.405 - 1.406
SelectionDAGISel.cpp updated: 1.460 - 1.461
---
Log message:
Introduce new SelectionDAG node opcodes VEXTRACT_SUBVECTOR and
VCONCAT_VECTORS. Use these for
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.459 - 1.460
---
Log message:
When creating CopyFromReg nodes, always use legal types. And use the
correct types for the result vector, even though it is currently bitcasted
to a different type immediately.
Changes in directory llvm/lib/Transforms/Scalar:
LICM.cpp updated: 1.104 - 1.105
---
Log message:
Allow insertelement, extractelement, and shufflevector to be hoisted/sunk
by LICM.
---
Diffs of the changes: (+3 -1)
LICM.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Changes in directory llvm/utils/TableGen:
CodeGenTarget.cpp updated: 1.89 - 1.90
CodeGenTarget.h updated: 1.29 - 1.30
RegisterInfoEmitter.cpp updated: 1.54 - 1.55
---
Log message:
Remove the operator for MVT::ValueType in preparation for MVT::ValueType
being changed from an enum to an integer
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.494 - 1.495
---
Log message:
Pass the DAG to SDNode::dump to let it do more detailed dumps in some cases.
---
Diffs of the changes: (+5 -5)
LegalizeDAG.cpp | 10 +-
1 files changed, 5 insertions(+), 5
Changes in directory llvm/lib/VMCore:
ValueTypes.cpp updated: 1.17 - 1.18
---
Log message:
Add cases for v2f32.
---
Diffs of the changes: (+2 -0)
ValueTypes.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/VMCore/ValueTypes.cpp
diff -u llvm/lib/VMCore/ValueTypes.cpp:1.17
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.405 - 1.406
---
Log message:
Add explicit qualification for namespace MVT members.
---
Diffs of the changes: (+1 -1)
X86ISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.403 - 1.404
---
Log message:
Add explicit qualification for namespace MVT members.
---
Diffs of the changes: (+1 -1)
SelectionDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/VMCore:
Constants.cpp updated: 1.228 - 1.229
Type.cpp updated: 1.187 - 1.188
---
Log message:
Minor comment cleanups.
---
Diffs of the changes: (+6 -6)
Constants.cpp | 10 +-
Type.cpp |2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
Changes in directory llvm/lib/Transforms/Utils:
SimplifyCFG.cpp updated: 1.121 - 1.122
---
Log message:
Minor comment cleanups.
---
Diffs of the changes: (+1 -1)
SimplifyCFG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.190 - 1.191
---
Log message:
Minor comment cleanups.
---
Diffs of the changes: (+1 -1)
SelectionDAGNodes.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/include/llvm:
Constants.h updated: 1.146 - 1.147
---
Log message:
Minor comment cleanups.
---
Diffs of the changes: (+4 -4)
Constants.h |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/Constants.h
diff -u
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.453 - 1.454
---
Log message:
Minor comment cleanups.
---
Diffs of the changes: (+1 -1)
SelectionDAGISel.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
, Chris Lattner wrote:
On Mon, 21 May 2007, Dan Gohman wrote:
It seems that a number of things would be considerably simpler if the
pre-legalize nodes could use the same node kinds as post-legalize; the only
thing preventing that is that the MVT::ValueType enum isn't able to describe
vector
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.493 - 1.494
SelectionDAGISel.cpp updated: 1.451 - 1.452
SelectionDAGPrinter.cpp updated: 1.45 - 1.46
TargetLowering.cpp updated: 1.115 - 1.116
---
Log message:
Qualify several calls to functions in the MVT
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.307 - 1.308
---
Log message:
Qualify calls to getTypeForValueType with MVT:: too.
---
Diffs of the changes: (+3 -3)
DAGCombiner.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/test/Transforms/LoopUnroll:
2007-05-09-UnknownTripCount.ll added (r1.1)
---
Log message:
Add a testcase for unrolling loops with unknown tripcounts.
---
Diffs of the changes: (+18 -0)
2007-05-09-UnknownTripCount.ll | 18 ++
1 files changed, 18
just sending this patch to the list in case anyone
who does is interested in it.
The patch looks safe to me, but how is it semantically different?
It would make the for loop cover v2f64, where it didn't before.
Dan
--
Dan Gohman, Cray Inc.
___
llvm
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.270 - 1.271
---
Log message:
Apply this patch:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html
---
Diffs of the changes: (+1 -1)
PPCISelLowering.cpp |2 +-
1 files changed, 1
Changes in directory llvm/include/llvm/ADT:
SmallVector.h updated: 1.28 - 1.29
---
Log message:
Fix some sporadic segfaults that are triggered when SmallVector's heap
storage lands near the end of the available address space. In the expression
Begin+N Capacity, the Begin+N was overflowing.
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