Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.44 -> 1.45
---
Log message:
add support for 128-bit add/sub on ppc64
---
Diffs of the changes: (+34 -0)
PPCInstr64Bit.td | 34 ++
1 files changed, 34 insertions(+)
Index: llvm/lib/
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.41 -> 1.42
---
Log message:
Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll
---
Diffs of the changes: (+4 -1)
PPCInstr64Bit.td |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/P
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.39 -> 1.40
PPCInstrInfo.td updated: 1.273 -> 1.274
---
Log message:
one important bugfix: PPC32 didn't have both elf and macho support for
external symbols and global addresses. Add the missing ones.
one important worka
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.37 -> 1.38
---
Log message:
Patterns no longer needed due to fix in the DAG combiner.
---
Diffs of the changes: (+0 -4)
PPCInstr64Bit.td |4
1 files changed, 4 deletions(-)
Index: llvm/lib/Target/PowerPC/P
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.35 -> 1.36
---
Log message:
Not needed. Misinterpreted error message from other bug (Missing load/store
relocations.)
---
Diffs of the changes: (+0 -4)
PPCInstr64Bit.td |4
1 files changed, 4 deletions(-)
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.36 -> 1.37
---
Log message:
Not all test cases are created equal. This fix is needed.
---
Diffs of the changes: (+4 -0)
PPCInstr64Bit.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/PowerPC
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.34 -> 1.35
---
Log message:
Provide 64-bit support for i64 sextload.
---
Diffs of the changes: (+4 -0)
PPCInstr64Bit.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
d
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.32 -> 1.33
---
Log message:
implement sextinreg i8->i64 and i16->i64
---
Diffs of the changes: (+8 -0)
PPCInstr64Bit.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.28 -> 1.29
PPCInstrFormats.td updated: 1.83 -> 1.84
PPCInstrInfo.td updated: 1.261 -> 1.262
---
Log message:
Stop using isTwoAddress, switching to operand constraints instead.
Tell the codegen emitter that specific opera
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.24 -> 1.25
PPCRegisterInfo.cpp updated: 1.78 -> 1.79
---
Log message:
implement proper PPC64 prolog/epilog codegen.
---
Diffs of the changes: (+81 -30)
PPCInstr64Bit.td|5 ++
PPCRegisterInfo.cpp | 106 +
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.23 -> 1.24
PPCInstrInfo.td updated: 1.256 -> 1.257
---
Log message:
Mark operands as symbol lo instead of imm32 so that they print lo(x) around
globals.
---
Diffs of the changes: (+11 -11)
PPCInstr64Bit.td | 10 +++
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.19 -> 1.20
---
Log message:
Shift amounts are always 32-bits, even in 64-bit mode. This fixes
CodeGen/PowerPC/2006-09-28-shift_64.ll
---
Diffs of the changes: (+6 -6)
PPCInstr64Bit.td | 12 ++--
1 files ch
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.18 -> 1.19
PPCInstrAltivec.td updated: 1.54 -> 1.55
PPCInstrInfo.td updated: 1.238 -> 1.239
---
Log message:
Make the implicit def instructions look like other instrs.
---
Diffs of the changes: (+5 -5)
PPCInstr64Bit.
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.14 -> 1.15
PPCInstrInfo.td updated: 1.236 -> 1.237
---
Log message:
Add 64-bit MTCTR so that indirect calls work.
---
Diffs of the changes: (+6 -2)
PPCInstr64Bit.td |4
PPCInstrInfo.td |4 ++--
2 files
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.13 -> 1.14
---
Log message:
Fix an incorrect store pattern. This fixes em3d.
---
Diffs of the changes: (+1 -1)
PPCInstr64Bit.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/Powe
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.11 -> 1.12
---
Log message:
Add zextload from i32 -> i64, with this, perimeter works.
---
Diffs of the changes: (+3 -0)
PPCInstr64Bit.td |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/PowerPC/
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.10 -> 1.11
---
Log message:
Rearrange compares, add ADDI8, add sext from 32-to-64 bit register
---
Diffs of the changes: (+20 -8)
PPCInstr64Bit.td | 28
1 files changed, 20 insertions(+
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.8 -> 1.9
---
Log message:
add some logical ops
---
Diffs of the changes: (+28 -3)
PPCInstr64Bit.td | 31 ---
1 files changed, 28 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/Po
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.7 -> 1.8
---
Log message:
Add some more immediate patterns. This allows us to compile:
void test6() {
Y = 0xABCD0123BCDE4567;
}
into:
_test6:
lis r2, -21555
lis r3, ha16(_Y)
ori r2, r2, 291
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.6 -> 1.7
---
Log message:
Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is
set, so disable the pattern in that case.
---
Diffs of the changes: (+5 -5)
PPCInstr64Bit.td | 10 +-
1 f
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.5 -> 1.6
PPCInstrInfo.td updated: 1.227 -> 1.228
---
Log message:
Add some 64-bit logical ops.
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation. For example, we now c
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.4 -> 1.5
---
Log message:
Add some patterns for globals, so we can now compile this:
static unsigned long long X, Y;
void test1() {
X = Y;
}
into:
_test1:
lis r2, ha16(_Y)
lis r3, ha16(_X)
ld
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.3 -> 1.4
---
Log message:
Add some patterns for ppc64
---
Diffs of the changes: (+14 -13)
PPCInstr64Bit.td | 27 ++-
1 files changed, 14 insertions(+), 13 deletions(-)
Index: llvm/lib/Targ
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.2 -> 1.3
---
Log message:
Upgrade some load/store instructions to use the proper addressing mode stuff.
---
Diffs of the changes: (+10 -10)
PPCInstr64Bit.td | 20 ++--
1 files changed, 10 insertions
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td added (r1.1)
PPCInstrInfo.td updated: 1.222 -> 1.223
---
Log message:
Split 64-bit instructions out into a separate .td file
---
Diffs of the changes: (+185 -130)
PPCInstr64Bit.td | 183
25 matches
Mail list logo
