Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.219 - 1.220
X86TargetAsmInfo.cpp updated: 1.41 - 1.42
---
Log message:
More DWARF-related things cleanup:
1. Fix PR1380: http://llvm.org/PR1380
2. Apply Duncan's patch from PR1410: http://llvm.org/PR1410
3. Insert
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.217 - 1.218
X86RegisterInfo.td updated: 1.42 - 1.43
---
Log message:
Emit correct DWARF reg # for RA (return address) register
---
Diffs of the changes: (+7 -1)
X86RegisterInfo.cpp |5 -
X86RegisterInfo.td |
Anton, I believe different OS / target / DWARF imeplementations
assign different DWARF numbers to register. On Mac OS X, I am fairly
certain x86 and x86-64 assign different numbers. :-( We need a
better way to handle this.
Evan
On May 2, 2007, at 1:46 AM, Anton Korobeynikov wrote:
Evan,
Anton, I believe different OS / target / DWARF imeplementations
assign different DWARF numbers to register. On Mac OS X, I am fairly
certain x86 and x86-64 assign different numbers. :-( We need a
better way to handle this.
I've specially checked this case. DWARF register numbers
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.214 - 1.215
---
Log message:
do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292
when promoted to 64-bits
---
Diffs of the changes: (+2 -1)
X86RegisterInfo.cpp |3 ++-
1 files changed, 2
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.215 - 1.216
---
Log message:
Fix for PR1348: http://llvm.org/PR1348 . If stack inc / dec amount is
32-bits, issue a series of add / sub instructions.
---
Diffs of the changes: (+27 -18)
X86RegisterInfo.cpp | 45
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.211 - 1.212
---
Log message:
Add the PADDQ to the list.
---
Diffs of the changes: (+1 -0)
X86RegisterInfo.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.212 - 1.213
---
Log message:
support 4G stack frames
---
Diffs of the changes: (+9 -9)
X86RegisterInfo.cpp | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.213 - 1.214
---
Log message:
support for 4G stack frames
---
Diffs of the changes: (+4 -3)
X86RegisterInfo.cpp |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.208 - 1.209
---
Log message:
Changed to new MMX_ recipes.
---
Diffs of the changes: (+3 -3)
X86RegisterInfo.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.205 - 1.206
X86RegisterInfo.h updated: 1.49 - 1.50
---
Log message:
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
---
Diffs of the changes: (+4 -2)
X86RegisterInfo.cpp |3 ++-
X86RegisterInfo.h |
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.204 - 1.205
---
Log message:
By default, spills kills the register being stored.
---
Diffs of the changes: (+2 -1)
X86RegisterInfo.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.201 - 1.202
X86RegisterInfo.h updated: 1.46 - 1.47
---
Log message:
For PR1207: http://llvm.org/PR1207 :
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.200 - 1.201
X86RegisterInfo.h updated: 1.45 - 1.46
---
Log message:
Added getReservedRegs().
---
Diffs of the changes: (+22 -0)
X86RegisterInfo.cpp | 16
X86RegisterInfo.h |6 ++
2 files
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.198 - 1.199
---
Log message:
Landing pad-less eh for PPC.
---
Diffs of the changes: (+3 -4)
X86RegisterInfo.cpp |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.199 - 1.200
---
Log message:
Only gather frame info if debug or eh.
---
Diffs of the changes: (+2 -2)
X86RegisterInfo.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.194 - 1.195
---
Log message:
80 columns
---
Diffs of the changes: (+8 -4)
X86RegisterInfo.cpp | 12
1 files changed, 8 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.193 - 1.194
---
Log message:
PEI is now responsible for adding MaxCallFrameSize to frame size and align the
stack. Each target can further adjust the frame size if necessary.
---
Diffs of the changes: (+0 -17)
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.192 - 1.193
X86RegisterInfo.h updated: 1.43 - 1.44
X86RegisterInfo.td updated: 1.39 - 1.40
---
Log message:
hasFP() is now a virtual method of MRegisterInfo.
---
Diffs of the changes: (+23 -13)
X86RegisterInfo.cpp |
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.191 - 1.192
---
Log message:
One more try...
---
Diffs of the changes: (+3 -2)
X86RegisterInfo.cpp |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.190 - 1.191
---
Log message:
Last check-in was bogus. There is no need to align the stack if the function is
a leaf function (and without alloca).
---
Diffs of the changes: (+6 -3)
X86RegisterInfo.cpp |9
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.186 - 1.187
X86RegisterInfo.h updated: 1.42 - 1.43
---
Log message:
Fix naming inconsistency.
---
Diffs of the changes: (+13 -13)
X86RegisterInfo.cpp | 16
X86RegisterInfo.h | 10 +-
2
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.184 - 1.185
---
Log message:
Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand().
---
Diffs of the changes: (+2 -0)
X86RegisterInfo.cpp |2 ++
1 files changed, 2 insertions(+)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.182 - 1.183
---
Log message:
MI keeps a ptr of TargetInstrDescriptor, use it.
---
Diffs of the changes: (+2 -1)
X86RegisterInfo.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.179 - 1.180
---
Log message:
Hopefully a good crack at making debugging work on intel -disable-fp-elim.
---
Diffs of the changes: (+3 -1)
X86RegisterInfo.cpp |4 +++-
1 files changed, 3 insertions(+), 1
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.174 - 1.175
---
Log message:
Add implicit def / use operands to MachineInstr.
---
Diffs of the changes: (+1 -1)
X86RegisterInfo.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.171 - 1.172
---
Log message:
Dead code.
---
Diffs of the changes: (+0 -4)
X86RegisterInfo.cpp |4
1 files changed, 4 deletions(-)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.168 - 1.169
---
Log message:
Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex
in addition to immediate operands.
---
Diffs of the changes: (+11 -6)
X86RegisterInfo.cpp | 17 +++--
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.162 - 1.163
X86RegisterInfo.td updated: 1.37 - 1.38
---
Log message:
Constify some methods. Patch provided by Anton Vayvod, thanks!
---
Diffs of the changes: (+7 -7)
X86RegisterInfo.cpp |2 +-
X86RegisterInfo.td
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.161 - 1.162
---
Log message:
Missing a space.
---
Diffs of the changes: (+1 -1)
X86RegisterInfo.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.157 - 1.158
---
Log message:
Cygwin support: use _alloca to allocate stack if 4k. Patch by Anton
Korobeynikov.
---
Diffs of the changes: (+21 -4)
X86RegisterInfo.cpp | 25 +
1 files
Does this fix PR331?
-Chris
On Tue, 13 Jun 2006, Evan Cheng wrote:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.157 - 1.158
---
Log message:
Cygwin support: use _alloca to allocate stack if 4k. Patch by Anton
Korobeynikov.
---
Diffs of the changes: (+21
On Tue, 13 Jun 2006, Chris Lattner wrote:
Does this fix PR331?
Actually no, I don't think it does. Dynamic alloca lowering would also
need to be updated. That would be a logical next step :)
-Chris
-Chris
On Tue, 13 Jun 2006, Evan Cheng wrote:
Changes in directory
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.147 - 1.148
---
Log message:
Move some methods out of MachineInstr into MachineOperand
---
Diffs of the changes: (+2 -2)
X86RegisterInfo.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.144 - 1.145
---
Log message:
Use movaps instead of movapd for spill / restore.
---
Diffs of the changes: (+2 -2)
X86RegisterInfo.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.140 - 1.141
---
Log message:
Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate).
---
Diffs of the changes: (+2 -2)
X86RegisterInfo.cpp |4 ++--
1 files changed, 2 insertions(+), 2
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.141 - 1.142
---
Log message:
SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand.
---
Diffs of the changes: (+5 -5)
X86RegisterInfo.cpp | 10 +-
1 files changed, 5 insertions(+), 5
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.142 - 1.143
X86InstrSSE.td updated: 1.104 - 1.105
---
Log message:
- PEXTRW cannot take a memory location as its first source operand.
- PINSRWrmi encoding bug.
---
Diffs of the changes: (+1 -9)
X86InstrSSE.td |
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.139 - 1.140
---
Log message:
Incorrect foldMemoryOperand entries
---
Diffs of the changes: (+6 -12)
X86RegisterInfo.cpp | 18 ++
1 files changed, 6 insertions(+), 12 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.136 - 1.137
---
Log message:
We were not adjusting the frame size to ensure proper alignment when alloca /
vla are present in the function. This causes a crash when a leaf function
allocates space on the stack used to
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.135 - 1.136
---
Log message:
Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available
for SSE1.
---
Diffs of the changes: (+1 -1)
X86RegisterInfo.cpp |2 +-
1 files changed, 1 insertion(+), 1
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.132 - 1.133
X86RegisterInfo.h updated: 1.35 - 1.36
---
Log message:
Expose base register for DwarfWriter. Refactor code accordingly.
---
Diffs of the changes: (+4 -11)
X86RegisterInfo.cpp | 11 ++-
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.131 - 1.132
---
Log message:
Translate llvm target registers to dwarf register numbers properly.
---
Diffs of the changes: (+1 -1)
X86RegisterInfo.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.130 - 1.131
X86RegisterInfo.h updated: 1.34 - 1.35
---
Log message:
Add support to locate local variables in frames (early version.)
---
Diffs of the changes: (+15 -0)
X86RegisterInfo.cpp | 12
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.127 - 1.128
---
Log message:
Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g.
ADD32ri8.
---
Diffs of the changes: (+18 -6)
X86RegisterInfo.cpp | 24 ++--
1 files changed,
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.128 - 1.129
---
Log message:
Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi.
---
Diffs of the changes: (+9 -0)
X86RegisterInfo.cpp |9 +
1 files changed, 9 insertions(+)
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.126 - 1.127
---
Log message:
Fix an obvious bug exposed when we are doing
ADD X, 4
==
MOV32ri $X+4, ...
---
Diffs of the changes: (+2 -1)
X86RegisterInfo.cpp |3 ++-
1 files changed, 2 insertions(+), 1
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.125 - 1.126
X86RegisterInfo.td updated: 1.29 - 1.30
---
Log message:
Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64.
Added generic vector types: VR64 and VR128.
---
Diffs of the changes: (+27
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.122 - 1.123
---
Log message:
Use movaps / movapd to spill / restore V4F4 / V2F8 registers.
---
Diffs of the changes: (+12 -4)
X86RegisterInfo.cpp | 16
1 files changed, 12 insertions(+), 4
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.121 - 1.122
---
Log message:
Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg
transfer.
According to the Intel P4 Optimization Manual:
Moves that write a portion of a register can introduce
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.117 - 1.118
---
Log message:
Added SSE entries to foldMemoryOperand().
---
Diffs of the changes: (+49 -1)
X86RegisterInfo.cpp | 50 +-
1 files changed, 49
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