Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.58 - 1.59
---
Log message:
One additional field in TargetRegisterDesc.
---
Diffs of the changes: (+1 -1)
RegisterInfoEmitter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.57 - 1.58
---
Log message:
Add immediate sub-registers.
---
Diffs of the changes: (+21 -0)
RegisterInfoEmitter.cpp | 21 +
1 files changed, 21 insertions(+)
Index:
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.56 - 1.57
CodeGenTarget.cpp updated: 1.91 - 1.92
CodeGenRegisters.h updated: 1.11 - 1.12
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Log message:
Add support to tablegen for specifying subregister classes on a per register
class basis.
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Diffs of the
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.53 - 1.54
---
Log message:
A bit of feedback from Chris that I missed; error rather than asserting.
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Diffs of the changes: (+5 -2)
RegisterInfoEmitter.cpp |7 +--
1 files changed, 5 insertions(+), 2
Hi Nate,
Could you look into the possibility of re-using the sub/super
register support that Evan recently added? This may prevent much
duplication of information in the RegisterInfo.td, especially for
targets with vector registers that have many subregisters.
I believe that sub/super
On May 1, 2007, at 12:24 PM, Christopher Lamb wrote:
Hi Nate,
Could you look into the possibility of re-using the sub/super
register support that Evan recently added? This may prevent much
duplication of information in the RegisterInfo.td, especially for
targets with vector registers
On May 1, 2007, at 3:28 PM, Nate Begeman wrote:
On May 1, 2007, at 12:24 PM, Christopher Lamb wrote:
Hi Nate,
Could you look into the possibility of re-using the sub/super
register support that Evan recently added? This may prevent much
duplication of information in the RegisterInfo.td,
On May 1, 2007, at 2:03 PM, Christopher Lamb wrote:
I see the problem in generating the ISel. Perhaps it would be be
best to go the other way and have the sub/super reg sets be
determined by the the explicit sets defined. My goal was simply to
eliminate redundant, and possibly
On May 1, 2007, at 1:28 PM, Nate Begeman wrote:
I believe that sub/super register generator unions the set of sub/
super registers in a deterministic fashion and produces the
necessary tables in the RegisterInfo.inc already. The only thing is
that this would make the sub register index
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.52 - 1.53
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+36 -0)
RegisterInfoEmitter.cpp | 36
1 files changed, 36 insertions(+)
Index:
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.50 - 1.51
---
Log message:
Add sub-registers sets.
---
Diffs of the changes: (+61 -6)
RegisterInfoEmitter.cpp | 67 +++-
1 files changed, 61 insertions(+), 6
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.51 - 1.52
---
Log message:
Bug fix; add super-registers sets.
---
Diffs of the changes: (+58 -11)
RegisterInfoEmitter.cpp | 69
1 files changed, 58 insertions(+),
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.49 - 1.50
---
Log message:
emit an enum value for the # of target registers.
---
Diffs of the changes: (+2 -2)
RegisterInfoEmitter.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.45 - 1.46
---
Log message:
Make sub- super- reg-class tables static.
---
Diffs of the changes: (+6 -3)
RegisterInfoEmitter.cpp |9 ++---
1 files changed, 6 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.46 - 1.47
---
Log message:
Make sub- and super- register classes const.
---
Diffs of the changes: (+5 -4)
RegisterInfoEmitter.cpp |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
Index:
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.43 - 1.44
---
Log message:
Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov! This is a step towards closing PR786:
http://llvm.cs.uiuc.edu/PR786 .
---
Diffs of the
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.41 - 1.42
---
Log message:
Also add super- register classes info.
---
Diffs of the changes: (+38 -0)
RegisterInfoEmitter.cpp | 38 ++
1 files changed, 38 insertions(+)
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.40 - 1.41
---
Log message:
Add sub-register class information.
---
Diffs of the changes: (+49 -3)
RegisterInfoEmitter.cpp | 52 +---
1 files changed, 49
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.39 - 1.40
---
Log message:
Add dwarf register numbering to register data.
---
Diffs of the changes: (+18 -1)
RegisterInfoEmitter.cpp | 19 ++-
1 files changed, 18 insertions(+), 1 deletion(-)
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