[llvm-commits] CVS: llvm/lib/ExecutionEngine/ExecutionEngine.cpp

2007-03-13 Thread Jeff Cohen


Changes in directory llvm/lib/ExecutionEngine:

ExecutionEngine.cpp updated: 1.113 - 1.114
---
Log message:

Unbreak C++ build.

---
Diffs of the changes:  (+1 -0)

 ExecutionEngine.cpp |1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/ExecutionEngine/ExecutionEngine.cpp
diff -u llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.113 
llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.114
--- llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.113  Tue Mar  6 16:23:15 2007
+++ llvm/lib/ExecutionEngine/ExecutionEngine.cppMon Mar 12 12:57:00 2007
@@ -24,6 +24,7 @@
 #include llvm/Support/MutexGuard.h
 #include llvm/System/DynamicLibrary.h
 #include llvm/Target/TargetData.h
+#include math.h
 using namespace llvm;
 
 STATISTIC(NumInitBytes, Number of bytes of global vars initialized);



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[llvm-commits] CVS: llvm/lib/Transforms/Utils/LowerSwitch.cpp

2007-03-13 Thread Jeff Cohen


Changes in directory llvm/lib/Transforms/Utils:

LowerSwitch.cpp updated: 1.35 - 1.36
---
Log message:

Unbreak VC++ build.  Do not use identifiers starting with _ as they are 
reserved and
can collide with system defined names.  Windows defines _BB, for example.


---
Diffs of the changes:  (+3 -3)

 LowerSwitch.cpp |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/lib/Transforms/Utils/LowerSwitch.cpp
diff -u llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.35 
llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.36
--- llvm/lib/Transforms/Utils/LowerSwitch.cpp:1.35  Sat Mar 10 10:46:28 2007
+++ llvm/lib/Transforms/Utils/LowerSwitch.cpp   Mon Mar 12 12:56:27 2007
@@ -46,9 +46,9 @@
   Constant* High;
   BasicBlock* BB;
 
-  CaseRange(Constant* _Low = NULL, Constant* _High = NULL,
-BasicBlock* _BB = NULL):
-Low(_Low), High(_High), BB(_BB) { }
+  CaseRange() : Low(0), High(0), BB(0) { }
+  CaseRange(Constant* low, Constant* high, BasicBlock* bb) :
+Low(low), High(high), BB(bb) { }
 };
 
 typedef std::vectorCaseRange   CaseVector;



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[llvm-commits] CVS: llvm-www/pubs/2007-03-12-BossaLLVMIntro.html 2007-03-12-BossaLLVMIntro.pdf index.html

2007-03-13 Thread Chris Lattner


Changes in directory llvm-www/pubs:

2007-03-12-BossaLLVMIntro.html added (r1.1)
2007-03-12-BossaLLVMIntro.pdf added (r1.1)
index.html updated: 1.44 - 1.45
---
Log message:

add a new talk


---
Diffs of the changes:  (+40 -0)

 2007-03-12-BossaLLVMIntro.html |   38 ++
 2007-03-12-BossaLLVMIntro.pdf  |0 
 index.html |2 ++
 3 files changed, 40 insertions(+)


Index: llvm-www/pubs/2007-03-12-BossaLLVMIntro.html
diff -c /dev/null llvm-www/pubs/2007-03-12-BossaLLVMIntro.html:1.1
*** /dev/null   Tue Mar 13 08:15:29 2007
--- llvm-www/pubs/2007-03-12-BossaLLVMIntro.htmlTue Mar 13 08:15:19 2007
***
*** 0 
--- 1,38 
+ !DOCTYPE HTML PUBLIC -//W3C//DTD HTML 4.01 Transitional//EN
+ html
+ head
+   meta http-equiv=Content-Type content=text/html; charset=UTF-8 /
+   link rel=stylesheet href=../llvm.css type=text/css media=screen /
+   titleThe LLVM Compiler System/title
+ /head
+ body
+ 
+ div class=pub_title
+   The LLVM Compiler System 
+ /div
+ div class=pub_author
+   a href=http://www.nondot.org/sabre/;Chris Lattner/a
+ /div
+ 
+ h2Abstract:/h2
+ blockquote
+ p
+ LLVM (http://llvm.org) is a suite of carefully designed open source libraries 
which implement compiler components (like language front-ends, code generators, 
aggressive optimizers, Just-In-Time compiler support, debug support, link-time 
optimization, etc). The goal of the LLVM project is to build these components 
in a way that allows them to be combined together to create familiar tools 
(like a C compiler), interesting new tools (like an OpenGL JIT compiler) and 
many other things we haven't though of yet.  Because LLVM is under continuous 
development, clients of these components naturally benefit from improvements in 
the libraries./p
+ 
+ pThis talk gives an overview of LLVM's architecture, design and philosophy, 
and gives a high-level overview of the various components that are available.  
It then describes implementation details and design points of some example 
clients -- LLVM's GCC-based C/C++/Objective-C compiler, the OpenGL stack in Mac 
OS/X Leopard, and scripting language compilers -- describing some of the novel 
capabilities that LLVM contributes to these projects./p
+ 
+ /blockquote
+ 
+ h2Published:/h2
+ blockquote
+   The LLVM Compiler System, Chris Lattner,br
+   ia href=http://www.bossaconference.org/;2007 Bossa Conference on Open 
Source, Mobile Internet and Multimedia/a/i, Recife, Brazil, March 2007.br
+ /blockquote
+ 
+ h2Download Presentation:/h2
+ ul
+   lia href=2007-03-12-BossaLLVMIntro.pdfThe LLVM Compiler System/a 
(PDF)/li
+ /ul
+ 
+ /body
+ /html


Index: llvm-www/pubs/2007-03-12-BossaLLVMIntro.pdf


Index: llvm-www/pubs/index.html
diff -u llvm-www/pubs/index.html:1.44 llvm-www/pubs/index.html:1.45
--- llvm-www/pubs/index.html:1.44   Fri Feb  2 17:00:07 2007
+++ llvm-www/pubs/index.htmlTue Mar 13 08:15:19 2007
@@ -3,6 +3,8 @@
 
 ol
 
+lia href=2007-03-12-BossaLLVMIntro.htmlThe LLVM Compiler 
System/abrChris Lattnerbri2007 Bossa Conference on Open Source, Mobile 
Internet and Multimedia/i,  Recife, Brazil, March 2007.br/li
+
 lia href=2006-06-18-WIOSCA-LLVAOS.htmlA Virtual Instruction Set 
Interface for Operating System Kernels/abrJohn Criswell, Brent Monroe, and 
Vikram Adve.bri
 Workshop on the Interaction between Operating Systems and Computer 
Architecture (WIOSCA '06)/i, Boston, Massachusetts, 2006.br/li
 



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Re: [llvm-commits] llvm-gcc: emit switch cases with a wide range as a conditional branch

2007-03-13 Thread Chris Lattner

On Mar 12, 2007, at 1:48 PM, Duncan Sands wrote:

 In gcc, a switch case is a range of values that branch
 to a label, for example 1 .. 17 - label.  These are
 emitted as individual LLVM switch cases: 1 - label,
 2 - label, ..., 17 - label.  This works well except,
 for example, when the range is INT_MIN .. 0 - label,
 in which case you can say goodbye to all your memory!
 This patch causes ranges with more than 64 elements
 (128 on 64 bit machines) to be emitted as explicit if
 statements.  For example, the following gcc switch
 (from the Ada testcase)

The patch looks good with two changes:

+ConstantInt *Range = castConstantInt(ConstantExpr::getSub(HiC,  
ValC));

Please use APInt's to do the subtraction, instead of constant  
folding.  Reid should be able to help you with this.

+if (Range-getZExtValue()  2*HOST_BITS_PER_WIDE_INT) {

This is bad because it means llvm-gcc will produce different code  
based on thevalue of HOST_BITS...  Please just say   64 or something.

-Chris
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[llvm-commits] CVS: llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll

2007-03-13 Thread Chris Lattner


Changes in directory llvm/test/Transforms/InstCombine:

2007-03-13-CompareMerge.ll added (r1.1)
---
Log message:

testcase for PR1244: http://llvm.org/PR1244 


---
Diffs of the changes:  (+9 -0)

 2007-03-13-CompareMerge.ll |9 +
 1 files changed, 9 insertions(+)


Index: llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
diff -c /dev/null 
llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll:1.1
*** /dev/null   Tue Mar 13 09:25:45 2007
--- llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll Tue Mar 13 
09:25:35 2007
***
*** 0 
--- 1,9 
+ ; RUN: llvm-as  %s | opt -instcombine | llvm-dis | grep 'icmp sle'
+ ; PR1244
+ 
+ define i1 @test(i32 %c.3.i, i32 %d.292.2.i) {
+%tmp266.i = icmp slt i32 %c.3.i, %d.292.2.i 
+%tmp276.i = icmp eq i32 %c.3.i, %d.292.2.i 
+%sel_tmp80 = or i1 %tmp266.i, %tmp276.i 
+ret i1 %sel_tmp80
+ }



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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

2007-03-13 Thread Chris Lattner


Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.658 - 1.659
---
Log message:

ifdef out some dead code.

Fix PR1244: http://llvm.org/PR1244  and 
Transforms/InstCombine/2007-03-13-CompareMerge.ll


---
Diffs of the changes:  (+8 -2)

 InstructionCombining.cpp |   10 --
 1 files changed, 8 insertions(+), 2 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.658 
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.659
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.658   Tue Mar 13 
01:40:59 2007
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Mar 13 09:27:42 2007
@@ -992,6 +992,7 @@
   return (KnownZero  Mask) == Mask;
 }
 
+#if 0
 /// MaskedValueIsZero - Return true if 'V  Mask' is known to be zero.  We use
 /// this predicate to simplify operations downstream.  Mask is known to be zero
 /// for bits that V cannot have.
@@ -1001,6 +1002,7 @@
   assert((KnownZero  KnownOne) == 0  Bits known to be one AND zero?); 
   return (KnownZero  Mask) == Mask;
 }
+#endif
 
 /// ShrinkDemandedConstant - Check to see if the specified operand of the 
 /// specified instruction is a constant integer.  If so, check to see if there
@@ -3608,8 +3610,9 @@
   ICI-swapOperands();  // Swap the LHS and RHS of the ICmp
 }
 
+ICmpInst *RHSICI = castICmpInst(Log.getOperand(1));
 unsigned LHSCode = getICmpCode(ICI);
-unsigned RHSCode = getICmpCode(castICmpInst(Log.getOperand(1)));
+unsigned RHSCode = getICmpCode(RHSICI);
 unsigned Code;
 switch (Log.getOpcode()) {
 case Instruction::And: Code = LHSCode  RHSCode; break;
@@ -3618,7 +3621,10 @@
 default: assert(0  Illegal logical opcode!); return 0;
 }
 
-Value *RV = getICmpValue(ICmpInst::isSignedPredicate(pred), Code, LHS, 
RHS);
+bool isSigned = ICmpInst::isSignedPredicate(RHSICI-getPredicate()) || 
+ICmpInst::isSignedPredicate(ICI-getPredicate());
+  
+Value *RV = getICmpValue(isSigned, Code, LHS, RHS);
 if (Instruction *I = dyn_castInstruction(RV))
   return I;
 // Otherwise, it's a constant boolean value...



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Re: [llvm-commits] llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

2007-03-13 Thread Chris Lattner

On Mar 12, 2007, at 7:57 AM, Nicolas Geoffray wrote:

 Hi Chris,

 Chris Lattner wrote:
 Ahhh, ok.  I think I understand now what is going on.  Thank you for
 the very clear explanation.

 In this case, it seems like a clearly good thing to just call
 CreateFixedObject unconditionally early on (e.g.) when lowering the
 arguments.


 Unconditionally? I can do that, but do you mean without any check  
 if R31
 is actually used as frame pointer or we're compiling for linux/ppc?

Sorry, I meant without a check for r31, it should still only happen  
on linux/ppc.

Thanks Nicolas!

-Chirs
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Re: [llvm-commits] Stack and register alignment in linux/ppc calls

2007-03-13 Thread Chris Lattner
On Mar 12, 2007, at 8:36 AM, Nicolas Geoffray wrote:
 Here's the final patch with the modifications you suggested. Thx a  
 lot for your reviewing Chris.

 If everything's OK I'm checking this in soon.

Looks great, please do.  Please also check the sabre-ppc32 tester the  
day after this goes in, just to verify that there are no obvious  
darwin regressions.  Thanks!

-Chris

 Cheers,
 Nicolas

 Chris Lattner wrote:

 On Mar 6, 2007, at 10:03 AM, Nicolas Geoffray wrote:
 This patch corrects arguments passing alignment for linux/ppc  
 calls (ELF ABI).
 It affects LowerFORMAL_ARGUMENTS and LowerCALL of  
 PPCISelLowering.cpp.

 Sure, sorry for the delay.  Please add some high-level comments  
 that explain what is going on here (what the ABI says).  I would  
 eventually like to switch PPC over to using autogenerated  
 callingconv code, but I haven't had a chance to finish argument  
 passing.

 @@ -1164,24 +1165,34 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
  SDOperand ArgVal;
  bool needsLoad = false;
  MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
  unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
  unsigned ArgSize = ObjSize;
 +unsigned Flags = castConstantSDNode(Op.getOperand(ArgNo 
 +3))-getValue();
 +// See if next argument requires stack alignment in ELF
 +unsigned Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1  e) 
 +  (castConstantSDNode(Op.getOperand(ArgNo+4))-getValue()  
  (1  27)) 
 +  (!(Flags  (1  27;

 Please update this to use the enums that anton recently added for  
 decoding the flags values.

  unsigned CurArgOffset = ArgOffset;
  switch (ObjectVT) {
  default: assert(0  Unhandled argument type!);
  case MVT::i32:
 +  // Double word align in ELF
 +  if (Expand  !isELF_ABI  !isPPC64) GPR_idx += (GPR_idx  
 % 2);

 This says !isELF_ABI, shouldn't it be isELF_ABI?  If not,  
 you're modifying the Darwin/PPC ABI.

 -
 +unsigned Flags = castConstantSDNode(Op.getOperand(5+2*i 
 +1))-getValue();
 +// See if next argument requires stack alignment in ELF
 +unsigned Expand = (Arg.getValueType() == MVT::f64) ||
 +  ((i + 1  NumOps) 
 +  (castConstantSDNode(Op.getOperand(5+2*(i+1)+1))-getValue()
 + (1  
  27)) 
 +  (!(Flags  (1  27;

 Likewise, plz use enums here.  Also, there is some funky  
 indentation going on here.  Perhaps making a ConstantSDNode *Tmp  
 would make this more natural.

  // PtrOff will be used to store the current argument to the  
 stack if a
  // register cannot be found for it.
 -SDOperand PtrOff = DAG.getConstant(ArgOffset,  
 StackPtr.getValueType());
 +SDOperand PtrOff;
 +
 +// Stack align in ELF
 +if (isELF_ABI  Expand  !isPPC64)
 +PtrOff = DAG.getConstant(ArgOffset + ((ArgOffset/4) % 2)  
 * PtrByteSize,
 +StackPtr.getValueType());
 +else
 +PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType 
 ());
 +

 Funky indentation.  Statements should be indented by 2.   
 Subexpressions (StackPtr.getValueType() should be aligned to the (.

 Otherwise, looks great, thanks!

 -Chris

 Index: PPCISelLowering.cpp
 ===
 RCS file: /var/cvs/llvm/llvm/lib/Target/PowerPC/PPCISelLowering.cpp,v
 retrieving revision 1.260
 diff -t -d -u -p -5 -r1.260 PPCISelLowering.cpp
 --- PPCISelLowering.cpp   6 Mar 2007 00:59:59 -   1.260
 +++ PPCISelLowering.cpp   12 Mar 2007 15:39:25 -
 @@ -1130,10 +1130,11 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
SDOperand Root = Op.getOperand(0);

MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
bool isPPC64 = PtrVT == MVT::i64;
bool isMachoABI = Subtarget.isMachoABI();
 +  bool isELF_ABI = Subtarget.isELF_ABI();
unsigned PtrByteSize = isPPC64 ? 8 : 4;

unsigned ArgOffset = PPCFrameInfo::getLinkageSize(isPPC64,  
 isMachoABI);

static const unsigned GPR_32[] = {   // 32-bit registers.
 @@ -1161,30 +1162,46 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
const unsigned *GPR = isPPC64 ? GPR_64 : GPR_32;

// Add DAG nodes to load the arguments or copy them out of  
 registers.  On
// entry to a function on PPC, the arguments start after the  
 linkage area,
// although the first ones are often in registers.
 +  //
 +  // In the ELF ABI, GPRs and stack are double word align: an  
 argument
 +  // represented with two words (long long or double) must be  
 copied to an
 +  // even GPR_idx value or to an even ArgOffset value.
 +
for (unsigned ArgNo = 0, e = Op.Val-getNumValues()-1; ArgNo !=  
 e; ++ArgNo) {
  SDOperand ArgVal;
  bool needsLoad = false;
  MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
  unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
  unsigned ArgSize = ObjSize;
 +unsigned Flags = castConstantSDNode(Op.getOperand(ArgNo+3))- 
 

Re: [llvm-commits] CVS: llvm/lib/Transforms/Utils/LowerSwitch.cpp

2007-03-13 Thread Chris Lattner
On Mar 10, 2007, at 8:50 AM, Nick Lewycky wrote:

 +struct CaseRange {
 +  Constant* Low;
 +  Constant* High;
 +  BasicBlock* BB;
 +
 +  CaseRange(Constant* _Low = NULL, Constant* _High = NULL,
 +BasicBlock* _BB = NULL):
 +Low(_Low), High(_High), BB(_BB) { }
 +};

 Do you ever store non-ConstantInt in Low and High? If not, could you
 either replace this with, or make it a wrapper around ConstantRange?

I agree.  Among other things, this means that you'll be using APInt's  
instead of Constant*'s.  APInt's are more efficient to manipulate.

Thanks,

-Chris
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

2007-03-13 Thread Nicolas Geoffray


Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.261 - 1.262
---
Log message:

Stack and register alignment of call arguments in the ELF ABI



---
Diffs of the changes:  (+52 -6)

 PPCISelLowering.cpp |   58 ++--
 1 files changed, 52 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.261 
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.262
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.261   Mon Mar 12 18:29:01 2007
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Tue Mar 13 10:02:46 2007
@@ -1132,6 +1132,7 @@
   MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
   bool isPPC64 = PtrVT == MVT::i64;
   bool isMachoABI = Subtarget.isMachoABI();
+  bool isELF_ABI = Subtarget.isELF_ABI();
   unsigned PtrByteSize = isPPC64 ? 8 : 4;
 
   unsigned ArgOffset = PPCFrameInfo::getLinkageSize(isPPC64, isMachoABI);
@@ -1163,17 +1164,30 @@
   // Add DAG nodes to load the arguments or copy them out of registers.  On
   // entry to a function on PPC, the arguments start after the linkage area,
   // although the first ones are often in registers.
+  // 
+  // In the ELF ABI, GPRs and stack are double word align: an argument
+  // represented with two words (long long or double) must be copied to an
+  // even GPR_idx value or to an even ArgOffset value.
+
   for (unsigned ArgNo = 0, e = Op.Val-getNumValues()-1; ArgNo != e; ++ArgNo) {
 SDOperand ArgVal;
 bool needsLoad = false;
 MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
 unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
 unsigned ArgSize = ObjSize;
+unsigned Flags = castConstantSDNode(Op.getOperand(ArgNo+3))-getValue();
+unsigned AlignFlag = 1  ISD::ParamFlags::OrigAlignmentOffs;
+// See if next argument requires stack alignment in ELF
+bool Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1  e) 
+  (castConstantSDNode(Op.getOperand(ArgNo+4))-getValue()  AlignFlag) 
+  (!(Flags  AlignFlag)));
 
 unsigned CurArgOffset = ArgOffset;
 switch (ObjectVT) {
 default: assert(0  Unhandled argument type!);
 case MVT::i32:
+  // Double word align in ELF
+  if (Expand  isELF_ABI  !isPPC64) GPR_idx += (GPR_idx % 2);
   if (GPR_idx != Num_GPR_Regs) {
 unsigned VReg = RegMap-createVirtualRegister(PPC::GPRCRegClass);
 MF.addLiveIn(GPR[GPR_idx], VReg);
@@ -1183,6 +1197,9 @@
 needsLoad = true;
 ArgSize = PtrByteSize;
   }
+  // Stack align in ELF
+  if (needsLoad  Expand  isELF_ABI  !isPPC64) 
+ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize;
   // All int arguments reserve stack space in Macho ABI.
   if (isMachoABI || needsLoad) ArgOffset += PtrByteSize;
   break;
@@ -1204,7 +1221,7 @@
 case MVT::f64:
   // Every 4 bytes of argument space consumes one of the GPRs available for
   // argument passing.
-  if (GPR_idx != Num_GPR_Regs) {
+  if (GPR_idx != Num_GPR_Regs  isMachoABI) {
 ++GPR_idx;
 if (ObjSize == 8  GPR_idx != Num_GPR_Regs  !isPPC64)
   ++GPR_idx;
@@ -1222,6 +1239,9 @@
 needsLoad = true;
   }
   
+  // Stack align in ELF
+  if (needsLoad  Expand  isELF_ABI  !isPPC64)
+ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize;
   // All FP arguments reserve stack space in Macho ABI.
   if (isMachoABI || needsLoad) ArgOffset += isPPC64 ? 8 : ObjSize;
   break;
@@ -1324,6 +1344,7 @@
   unsigned NumOps  = (Op.getNumOperands() - 5) / 2;
   
   bool isMachoABI = Subtarget.isMachoABI();
+  bool isELF_ABI  = Subtarget.isELF_ABI();
 
   MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
   bool isPPC64 = PtrVT == MVT::i64;
@@ -1399,15 +1420,29 @@
   for (unsigned i = 0; i != NumOps; ++i) {
 bool inMem = false;
 SDOperand Arg = Op.getOperand(5+2*i);
-
+unsigned Flags = castConstantSDNode(Op.getOperand(5+2*i+1))-getValue();
+unsigned AlignFlag = 1  ISD::ParamFlags::OrigAlignmentOffs;
+// See if next argument requires stack alignment in ELF
+unsigned next = 5+2*(i+1)+1;
+bool Expand = (Arg.getValueType() == MVT::f64) || ((i + 1  NumOps) 
+  (castConstantSDNode(Op.getOperand(next))-getValue()  AlignFlag) 
+  (!(Flags  AlignFlag)));
+
 // PtrOff will be used to store the current argument to the stack if a
 // register cannot be found for it.
-SDOperand PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType());
+SDOperand PtrOff;
+
+// Stack align in ELF
+if (isELF_ABI  Expand  !isPPC64)
+  PtrOff = DAG.getConstant(ArgOffset + ((ArgOffset/4) % 2) * PtrByteSize,
+   StackPtr.getValueType());
+else
+  PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType());
+
 PtrOff = DAG.getNode(ISD::ADD, PtrVT, StackPtr, PtrOff);
 
 // On PPC64, promote integers to 

[llvm-commits] CVS: llvm/test/AdaFrontend/array_constructor.adb array_size.adb

2007-03-13 Thread Duncan Sands


Changes in directory llvm/test/AdaFrontend:

array_constructor.adb added (r1.1)
array_size.adb added (r1.1)
---
Log message:

Test support for arrays with non-zero first index.


---
Diffs of the changes:  (+16 -0)

 array_constructor.adb |6 ++
 array_size.adb|   10 ++
 2 files changed, 16 insertions(+)


Index: llvm/test/AdaFrontend/array_constructor.adb
diff -c /dev/null llvm/test/AdaFrontend/array_constructor.adb:1.1
*** /dev/null   Tue Mar 13 10:12:45 2007
--- llvm/test/AdaFrontend/array_constructor.adb Tue Mar 13 10:12:35 2007
***
*** 0 
--- 1,6 
+ -- RUN: %llvmgcc -c %s -o /dev/null
+ procedure Array_Constructor is
+A : array (Integer range ) of Boolean := (True, False);
+ begin
+null;
+ end;


Index: llvm/test/AdaFrontend/array_size.adb
diff -c /dev/null llvm/test/AdaFrontend/array_size.adb:1.1
*** /dev/null   Tue Mar 13 10:12:52 2007
--- llvm/test/AdaFrontend/array_size.adbTue Mar 13 10:12:35 2007
***
*** 0 
--- 1,10 
+ -- RUN: %llvmgcc -c %s -o /dev/null
+ procedure Array_Size is
+subtype S is String (1 .. 2);
+type R is record
+   A : S;
+end record;
+X : R;
+ begin
+null;
+ end;



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[llvm-commits] CVS: llvm-www/pubs/2007-03-12-BossaLLVMIntro.html

2007-03-13 Thread Bill Wendling


Changes in directory llvm-www/pubs:

2007-03-12-BossaLLVMIntro.html updated: 1.1 - 1.2
---
Log message:

Typo and formatting changes.


---
Diffs of the changes:  (+17 -2)

 2007-03-12-BossaLLVMIntro.html |   19 +--
 1 files changed, 17 insertions(+), 2 deletions(-)


Index: llvm-www/pubs/2007-03-12-BossaLLVMIntro.html
diff -u llvm-www/pubs/2007-03-12-BossaLLVMIntro.html:1.1 
llvm-www/pubs/2007-03-12-BossaLLVMIntro.html:1.2
--- llvm-www/pubs/2007-03-12-BossaLLVMIntro.html:1.1Tue Mar 13 08:15:19 2007
+++ llvm-www/pubs/2007-03-12-BossaLLVMIntro.htmlTue Mar 13 13:46:49 2007
@@ -17,9 +17,24 @@
 h2Abstract:/h2
 blockquote
 p
-LLVM (http://llvm.org) is a suite of carefully designed open source libraries 
which implement compiler components (like language front-ends, code generators, 
aggressive optimizers, Just-In-Time compiler support, debug support, link-time 
optimization, etc). The goal of the LLVM project is to build these components 
in a way that allows them to be combined together to create familiar tools 
(like a C compiler), interesting new tools (like an OpenGL JIT compiler) and 
many other things we haven't though of yet.  Because LLVM is under continuous 
development, clients of these components naturally benefit from improvements in 
the libraries./p
+LLVM (http://llvm.org) is a suite of carefully designed open source
+libraries which implement compiler components (like language
+front-ends, code generators, aggressive optimizers, Just-In-Time
+compiler support, debug support, link-time optimization, etc). The
+goal of the LLVM project is to build these components in a way that
+allows them to be combined together to create familiar tools (like a C
+compiler), interesting new tools (like an OpenGL JIT compiler) and
+many other things we haven't thought of yet.  Because LLVM is under
+continuous development, clients of these components naturally benefit
+from improvements in the libraries./p
 
-pThis talk gives an overview of LLVM's architecture, design and philosophy, 
and gives a high-level overview of the various components that are available.  
It then describes implementation details and design points of some example 
clients -- LLVM's GCC-based C/C++/Objective-C compiler, the OpenGL stack in Mac 
OS/X Leopard, and scripting language compilers -- describing some of the novel 
capabilities that LLVM contributes to these projects./p
+pThis talk gives an overview of LLVM's architecture, design and
+philosophy, and gives a high-level overview of the various components
+that are available.  It then describes implementation details and
+design points of some example clientsmdash;LLVM's GCC-based
+C/C++/Objective-C compiler, the OpenGL stack in Mac OS/X Leopard, and
+scripting language compilersmdash;describing some of the novel
+capabilities that LLVM contributes to these projects./p
 
 /blockquote
 



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[llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/Local.cpp

2007-03-13 Thread Andrew Lenharth


Changes in directory llvm-poolalloc/lib/DSA:

Local.cpp updated: 1.158.2.4.2.6 - 1.158.2.4.2.7
---
Log message:

infer metapools for allocas

---
Diffs of the changes:  (+4 -0)

 Local.cpp |4 
 1 files changed, 4 insertions(+)


Index: llvm-poolalloc/lib/DSA/Local.cpp
diff -u llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.6 
llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.7
--- llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.6  Mon Mar 12 14:50:27 2007
+++ llvm-poolalloc/lib/DSA/Local.cppTue Mar 13 13:48:36 2007
@@ -350,6 +350,10 @@
 ///
 void GraphBuilder::handleAlloc(AllocationInst AI, bool isHeap) {
   DSNode *N = createNode();
+#ifdef LLVA_KERNEL
+  MetaPool* MP = new MetaPool();
+  N-setMP(MP);
+#endif
   if (isHeap)
 N-setHeapNodeMarker();
   else



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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp

2007-03-13 Thread Evan Cheng


Changes in directory llvm/lib/Transforms/Scalar:

LoopStrengthReduce.cpp updated: 1.117 - 1.118
---
Log message:

Correct type info for isLegalAddressImmediate() check.

---
Diffs of the changes:  (+18 -12)

 LoopStrengthReduce.cpp |   30 ++
 1 files changed, 18 insertions(+), 12 deletions(-)


Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.117 
llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.118
--- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.117 Mon Mar 12 
18:27:37 2007
+++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp   Tue Mar 13 15:34:37 2007
@@ -610,11 +610,12 @@
 
 /// isTargetConstant - Return true if the following can be referenced by the
 /// immediate field of a target instruction.
-static bool isTargetConstant(const SCEVHandle V, const TargetLowering *TLI) {
+static bool isTargetConstant(const SCEVHandle V, const Type *UseTy,
+ const TargetLowering *TLI) {
   if (SCEVConstant *SC = dyn_castSCEVConstant(V)) {
 int64_t VC = SC-getValue()-getSExtValue();
 if (TLI)
-  return TLI-isLegalAddressImmediate(VC, V-getType());
+  return TLI-isLegalAddressImmediate(VC, UseTy);
 else
   // Defaults to PPC. PPC allows a sign-extended 16-bit immediate field.
   return (VC  -(1  16)  VC  (1  16)-1);
@@ -674,15 +675,20 @@
 /// that can fit into the immediate field of instructions in the target.
 /// Accumulate these immediate values into the Imm value.
 static void MoveImmediateValues(const TargetLowering *TLI,
+Instruction *User,
 SCEVHandle Val, SCEVHandle Imm,
 bool isAddress, Loop *L) {
+  const Type *UseTy = User-getType();
+  if (StoreInst *SI = dyn_castStoreInst(User))
+UseTy = SI-getOperand(0)-getType();
+
   if (SCEVAddExpr *SAE = dyn_castSCEVAddExpr(Val)) {
 std::vectorSCEVHandle NewOps;
 NewOps.reserve(SAE-getNumOperands());
 
 for (unsigned i = 0; i != SAE-getNumOperands(); ++i) {
   SCEVHandle NewOp = SAE-getOperand(i);
-  MoveImmediateValues(TLI, NewOp, Imm, isAddress, L);
+  MoveImmediateValues(TLI, User, NewOp, Imm, isAddress, L);
   
   if (!NewOp-isLoopInvariant(L)) {
 // If this is a loop-variant expression, it must stay in the immediate
@@ -701,7 +707,7 @@
   } else if (SCEVAddRecExpr *SARE = dyn_castSCEVAddRecExpr(Val)) {
 // Try to pull immediates out of the start value of nested addrec's.
 SCEVHandle Start = SARE-getStart();
-MoveImmediateValues(TLI, Start, Imm, isAddress, L);
+MoveImmediateValues(TLI, User, Start, Imm, isAddress, L);
 
 if (Start != SARE-getStart()) {
   std::vectorSCEVHandle Ops(SARE-op_begin(), SARE-op_end());
@@ -711,12 +717,12 @@
 return;
   } else if (SCEVMulExpr *SME = dyn_castSCEVMulExpr(Val)) {
 // Transform 8 * (4 + v) - 32 + 8*V if 32 fits in the immed field.
-if (isAddress  isTargetConstant(SME-getOperand(0), TLI) 
+if (isAddress  isTargetConstant(SME-getOperand(0), UseTy, TLI) 
 SME-getNumOperands() == 2  SME-isLoopInvariant(L)) {
 
   SCEVHandle SubImm = SCEVUnknown::getIntegerSCEV(0, Val-getType());
   SCEVHandle NewOp = SME-getOperand(1);
-  MoveImmediateValues(TLI, NewOp, SubImm, isAddress, L);
+  MoveImmediateValues(TLI, User, NewOp, SubImm, isAddress, L);
   
   // If we extracted something out of the subexpressions, see if we can 
   // simplify this!
@@ -724,7 +730,7 @@
 // Scale SubImm up by 8.  If the result is a target constant, we are
 // good.
 SubImm = SCEVMulExpr::get(SubImm, SME-getOperand(0));
-if (isTargetConstant(SubImm, TLI)) {
+if (isTargetConstant(SubImm, UseTy, TLI)) {
   // Accumulate the immediate.
   Imm = SCEVAddExpr::get(Imm, SubImm);
   
@@ -738,7 +744,7 @@
 
   // Loop-variant expressions must stay in the immediate field of the
   // expression.
-  if ((isAddress  isTargetConstant(Val, TLI)) ||
+  if ((isAddress  isTargetConstant(Val, UseTy, TLI)) ||
   !Val-isLoopInvariant(L)) {
 Imm = SCEVAddExpr::get(Imm, Val);
 Val = SCEVUnknown::getIntegerSCEV(0, Val-getType());
@@ -979,8 +985,8 @@
 if (SI-getOperand(1) == UsersToProcess[i].OperandValToReplace)
   isAddress = true;
   
-  MoveImmediateValues(TLI, UsersToProcess[i].Base, UsersToProcess[i].Imm,
-  isAddress, L);
+  MoveImmediateValues(TLI, UsersToProcess[i].Inst, UsersToProcess[i].Base,
+  UsersToProcess[i].Imm, isAddress, L);
 }
   }
 
@@ -1034,7 +1040,7 @@
 Constant *C = dyn_castConstant(CommonBaseV);
 if (!C ||
 (!C-isNullValue() 
- !isTargetConstant(SCEVUnknown::get(CommonBaseV), TLI)))
+ !isTargetConstant(SCEVUnknown::get(CommonBaseV), ReplacedTy, TLI)))
   // We want the common base 

[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp

2007-03-13 Thread Evan Cheng


Changes in directory llvm/lib/Target/ARM:

ARMISelLowering.cpp updated: 1.21 - 1.22
---
Log message:

Zero is always a legal AM immediate.

---
Diffs of the changes:  (+3 -0)

 ARMISelLowering.cpp |3 +++
 1 files changed, 3 insertions(+)


Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.21 
llvm/lib/Target/ARM/ARMISelLowering.cpp:1.22
--- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.21Mon Mar 12 18:30:29 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp Tue Mar 13 15:37:59 2007
@@ -1273,6 +1273,9 @@
 /// as the offset of the target addressing mode for load / store of the
 /// given type.
 bool ARMTargetLowering::isLegalAddressImmediate(int64_t V,const Type *Ty) 
const{
+  if (V == 0)
+return true;
+
   MVT::ValueType VT = getValueType(Ty);
   if (Subtarget-isThumb()) {
 if (V  0)



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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp

2007-03-13 Thread Evan Cheng


Changes in directory llvm/lib/Target/ARM:

ARMISelDAGToDAG.cpp updated: 1.107 - 1.108
---
Log message:

AM2 can match 2^n +/- 1. e.g.  ldr r3, [r2, r2, lsl #2]

---
Diffs of the changes:  (+23 -0)

 ARMISelDAGToDAG.cpp |   23 +++
 1 files changed, 23 insertions(+)


Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.107 
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.108
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.107   Wed Feb  7 15:18:32 2007
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Mar 13 16:05:54 2007
@@ -102,6 +102,29 @@
 bool ARMDAGToDAGISel::SelectAddrMode2(SDOperand Op, SDOperand N,
   SDOperand Base, SDOperand Offset,
   SDOperand Opc) {
+  if (N.getOpcode() == ISD::MUL) {
+if (ConstantSDNode *RHS = dyn_castConstantSDNode(N.getOperand(1))) {
+  // X * [3,5,9] - X + X * [2,4,8] etc.
+  int RHSC = (int)RHS-getValue();
+  if (RHSC  1) {
+RHSC = RHSC  ~1;
+ARM_AM::AddrOpc AddSub = ARM_AM::add;
+if (RHSC  0) {
+  AddSub = ARM_AM::sub;
+  RHSC = - RHSC;
+}
+if (isPowerOf2_32(RHSC)) {
+  unsigned ShAmt = Log2_32(RHSC);
+  Base = Offset = N.getOperand(0);
+  Opc = CurDAG-getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt,
+ARM_AM::lsl),
+  MVT::i32);
+  return true;
+}
+  }
+}
+  }
+
   if (N.getOpcode() != ISD::ADD  N.getOpcode() != ISD::SUB) {
 Base = N;
 if (N.getOpcode() == ISD::FrameIndex) {



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[llvm-commits] CVS: llvm-www/www-index.html

2007-03-13 Thread Reid Spencer


Changes in directory llvm-www:

www-index.html updated: 1.133 - 1.134
---
Log message:

Add Apple and AutoESL as development contributors.


---
Diffs of the changes:  (+4 -2)

 www-index.html |6 --
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm-www/www-index.html
diff -u llvm-www/www-index.html:1.133 llvm-www/www-index.html:1.134
--- llvm-www/www-index.html:1.133   Tue Jan 23 23:24:10 2007
+++ llvm-www/www-index.html Tue Mar 13 16:09:07 2007
@@ -146,8 +146,10 @@
   iOperating Systems and Compilers/i program (grant #CCR-9988482), the
   NSF iEmbedded Systems/i program (grant #CCR-0209202), the
   MARCO/DARPA a href=http://www.gigascale.org/;iGigascale Systems Research
-  Center/i/a (GSRC), IBM through the DARPA-funded PERCS project, and
-  the Motorola University Partnerships in Research program. /p 
+  Center/i/a (GSRC), IBM through the DARPA-funded PERCS project,
+  the Motorola University Partnerships in Research program, and development
+  contributions supported by a href=http://www.apple.com/;Apple Inc./a and
+  a href=http://www.autoesl.com/;AutoESL Design Technologies, Inc./a./p 
 
 !-- End of the right column --
 /td



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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

2007-03-13 Thread Evan Cheng


Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAGRRList.cpp updated: 1.27 - 1.28
---
Log message:

Try schedule def + use closer whne Sethi-Ullman numbers are the same.
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4

Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2

This creates more short live intervals which work better with the register
allocator.


---
Diffs of the changes:  (+38 -6)

 ScheduleDAGRRList.cpp |   44 ++--
 1 files changed, 38 insertions(+), 6 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.27 
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.28
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.27Fri Feb  2 
19:34:13 2007
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Tue Mar 13 18:25:11 2007
@@ -576,6 +576,15 @@
   };
 }
 
+static unsigned closestSucc(const SUnit *SU) {
+  unsigned MaxCycle = 0;
+  for (SUnit::const_succ_iterator I = SU-Succs.begin(), E = SU-Succs.end();
+   I != E; ++I)
+if (I-first-Cycle  MaxCycle)
+  MaxCycle = I-first-Cycle;
+  return MaxCycle;
+}
+
 // Bottom up
 bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
   bool LIsTarget = left-Node-isTargetOpcode();
@@ -596,15 +605,38 @@
   unsigned RPriority = SPQ-getNodePriority(right);
   if (LPriority  RPriority)
 return true;
-  else if (LPriority == RPriority)
-if (left-Height  right-Height)
+  else if (LPriority == RPriority) {
+// Try schedule def + use closer whne Sethi-Ullman numbers are the same.
+// e.g.
+// t1 = op t2, c1
+// t3 = op t4, c2
+//
+// and the following instructions are both ready.
+// t2 = op c3
+// t4 = op c4
+//
+// Then schedule t2 = op first.
+// i.e.
+// t4 = op c4
+// t2 = op c3
+// t1 = op t2, c1
+// t3 = op t4, c2
+//
+// This creates more short live intervals.
+unsigned LDist = closestSucc(left);
+unsigned RDist = closestSucc(right);
+if (LDist  RDist)
   return true;
-else if (left-Height == right-Height)
-  if (left-Depth  right-Depth)
+else if (LDist == RDist)
+  if (left-Height  right-Height)
 return true;
-  else if (left-Depth == right-Depth)
-if (left-CycleBound  right-CycleBound) 
+  else if (left-Height == right-Height)
+if (left-Depth  right-Depth)
   return true;
+else if (left-Depth == right-Depth)
+  if (left-CycleBound  right-CycleBound) 
+return true;
+  }
   return false;
 }
 



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[llvm-commits] CVS: llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll

2007-03-13 Thread Evan Cheng


Changes in directory llvm/test/CodeGen/X86:

2006-05-11-InstrSched.ll updated: 1.6 - 1.7
---
Log message:

This got better.

---
Diffs of the changes:  (+44 -43)

 2006-05-11-InstrSched.ll |   87 +++
 1 files changed, 44 insertions(+), 43 deletions(-)


Index: llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll
diff -u llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll:1.6 
llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll:1.7
--- llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll:1.6  Fri Jan 26 02:25:06 2007
+++ llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll  Tue Mar 13 18:26:41 2007
@@ -1,54 +1,55 @@
-; RUN: llvm-upgrade  %s | llvm-as | llc -march=x86 -mattr=+sse2 -stats 21 |\
-; RUN: grep 'asm-printer' | grep 39
+; RUN: llvm-as  %s | llc -march=x86 -mattr=+sse2 -stats 21 |\
+; RUN: grep 'asm-printer' | grep 37
 
 target datalayout = e-p:32:32
-void %foo(int* %mc, int* %bp, int* %ms, int* %xmb, int* %mpp, int* %tpmm, int* 
%ip, int* %tpim, int* %dpp, int* %tpdm, int* %bpi, int %M) {
+define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* 
%tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) {
 entry:
-   %tmp9 = setlt int %M, 5 ; bool [#uses=1]
-   br bool %tmp9, label %return, label %cond_true
+   %tmp9 = icmp slt i32 %M, 5  ; i1 [#uses=1]
+   br i1 %tmp9, label %return, label %cond_true
 
 cond_true: ; preds = %cond_true, %entry
-   %indvar = phi uint [ 0, %entry ], [ %indvar.next, %cond_true ]  
; uint [#uses=2]
-   %tmp. = shl uint %indvar, ubyte 2   ; uint [#uses=1]
-   %tmp.10 = add uint %tmp., 1 ; uint [#uses=2]
-   %k.0.0 = cast uint %tmp.10 to int   ; int [#uses=2]
-   %tmp31 = add int %k.0.0, -1 ; int [#uses=4]
-   %tmp32 = getelementptr int* %mpp, int %tmp31; int* [#uses=1]
-   %tmp34 = cast int* %tmp32 to sbyte* ; sbyte* [#uses=1]
-   %tmp = tail call 16 x sbyte %llvm.x86.sse2.loadu.dq( sbyte* %tmp34 )  
; 16 x sbyte [#uses=1]
-   %tmp42 = getelementptr int* %tpmm, int %tmp31   ; int* [#uses=1]
-   %tmp42 = cast int* %tmp42 to 4 x int* ; 4 x int* [#uses=1]
-   %tmp46 = load 4 x int* %tmp42 ; 4 x int [#uses=1]
-   %tmp54 = cast 16 x sbyte %tmp to 4 x int; 4 x int [#uses=1]
-   %tmp55 = add 4 x int %tmp54, %tmp46   ; 4 x int [#uses=2]
-   %tmp55 = cast 4 x int %tmp55 to 2 x long; 2 x long [#uses=1]
-   %tmp62 = getelementptr int* %ip, int %tmp31 ; int* [#uses=1]
-   %tmp65 = cast int* %tmp62 to sbyte* ; sbyte* [#uses=1]
-   %tmp66 = tail call 16 x sbyte %llvm.x86.sse2.loadu.dq( sbyte* %tmp65 
) ; 16 x sbyte [#uses=1]
-   %tmp73 = getelementptr int* %tpim, int %tmp31   ; int* [#uses=1]
-   %tmp73 = cast int* %tmp73 to 4 x int* ; 4 x int* [#uses=1]
-   %tmp77 = load 4 x int* %tmp73 ; 4 x int [#uses=1]
-   %tmp87 = cast 16 x sbyte %tmp66 to 4 x int  ; 4 x int [#uses=1]
-   %tmp88 = add 4 x int %tmp87, %tmp77   ; 4 x int [#uses=2]
-   %tmp88 = cast 4 x int %tmp88 to 2 x long; 2 x long [#uses=1]
-   %tmp99 = tail call 4 x int %llvm.x86.sse2.pcmpgt.d( 4 x int %tmp88, 
4 x int %tmp55 )  ; 4 x int [#uses=1]
-   %tmp99 = cast 4 x int %tmp99 to 2 x long; 2 x long [#uses=2]
-   %tmp110 = xor 2 x long %tmp99,  long -1, long -1; 2 x long 
[#uses=1]
-   %tmp111 = and 2 x long %tmp110, %tmp55; 2 x long 
[#uses=1]
-   %tmp121 = and 2 x long %tmp99, %tmp88 ; 2 x long [#uses=1]
-   %tmp131 = or 2 x long %tmp121, %tmp111; 2 x long [#uses=1]
-   %tmp137 = getelementptr int* %mc, uint %tmp.10  ; int* [#uses=1]
-   %tmp137 = cast int* %tmp137 to 2 x long*  ; 2 x long* 
[#uses=1]
-   store 2 x long %tmp131, 2 x long* %tmp137
-   %tmp147 = add int %k.0.0, 8 ; int [#uses=1]
-   %tmp = setgt int %tmp147, %M; bool [#uses=1]
-   %indvar.next = add uint %indvar, 1  ; uint [#uses=1]
-   br bool %tmp, label %return, label %cond_true
+   %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ]   
; i32 [#uses=2]
+   %tmp. = shl i32 %indvar, 2  ; i32 [#uses=1]
+   %tmp.10 = add i32 %tmp., 1  ; i32 [#uses=2]
+   %k.0.0 = bitcast i32 %tmp.10 to i32 ; i32 [#uses=2]
+   %tmp31 = add i32 %k.0.0, -1 ; i32 [#uses=4]
+   %tmp32 = getelementptr i32* %mpp, i32 %tmp31; i32* 
[#uses=1]
+   %tmp34 = bitcast i32* %tmp32 to i8* ; i8* [#uses=1]
+   %tmp = tail call 16 x i8 @llvm.x86.sse2.loadu.dq( i8* %tmp34 )
; 16 x i8 [#uses=1]
+   %tmp42 = getelementptr i32* %tpmm, i32 %tmp31   ; i32* 
[#uses=1]
+   %tmp42.upgrd.1 = bitcast i32* %tmp42 to 4 x i32* 

[llvm-commits] CVS: llvm/test/CodeGen/ARM/2007-03-13-InstrSched.ll

2007-03-13 Thread Evan Cheng


Changes in directory llvm/test/CodeGen/ARM:

2007-03-13-InstrSched.ll added (r1.1)
---
Log message:

New test.

---
Diffs of the changes:  (+47 -0)

 2007-03-13-InstrSched.ll |   47 +++
 1 files changed, 47 insertions(+)


Index: llvm/test/CodeGen/ARM/2007-03-13-InstrSched.ll
diff -c /dev/null llvm/test/CodeGen/ARM/2007-03-13-InstrSched.ll:1.1
*** /dev/null   Tue Mar 13 18:31:57 2007
--- llvm/test/CodeGen/ARM/2007-03-13-InstrSched.ll  Tue Mar 13 18:31:47 2007
***
*** 0 
--- 1,47 
+ ; RUN: llvm-as  %s | llc -mtriple=arm-apple-darwin -relocation-model=pic 
-mattr=+v6 -stats 21 | grep 'asm-printer' | grep 57
+ 
+ define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 
%i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* 
%d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
+ newFuncRoot:
+   br label %bb74
+ 
+ bb78.exitStub:; preds = %bb74
+   store i32 %d2.1, i32* %d2.1.out
+   store i32 %d3.1, i32* %d3.1.out
+   store i32 %d0.1, i32* %d0.1.out
+   store i32 %d1.1, i32* %d1.1.out
+   ret void
+ 
+ bb74: ; preds = %bb26, %newFuncRoot
+   %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ]  
; i32 [#uses=3]
+   %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ]   
; i32* [#uses=1]
+   %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ]   
; i32 [#uses=2]
+   %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ]   
; i32 [#uses=2]
+   %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ]   
; i32 [#uses=2]
+   %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ]   
; i32 [#uses=2]
+   %fm.1 = load i32* %fm.1.in  ; i32 [#uses=4]
+   icmp eq i32 %fp.1.rec, %tmp8; i1:0 [#uses=1]
+   br i1 %0, label %bb78.exitStub, label %bb26
+ 
+ bb26: ; preds = %bb74
+   %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec   ; 
i32** [#uses=1]
+   %tmp30 = load i32** %tmp28  ; i32* [#uses=4]
+   %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph; 
i32* [#uses=1]
+   %tmp34 = load i32* %tmp33   ; i32 [#uses=1]
+   %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224   ; 
i32* [#uses=1]
+   %tmp39 = load i32* %tmp38   ; i32 [#uses=1]
+   %tmp42 = mul i32 %tmp34, %fm.1  ; i32 [#uses=1]
+   %tmp44 = add i32 %tmp42, %d0.1  ; i32 [#uses=1]
+   %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223   ; 
i32* [#uses=1]
+   %tmp49 = load i32* %tmp48   ; i32 [#uses=1]
+   %tmp52 = mul i32 %tmp39, %fm.1  ; i32 [#uses=1]
+   %tmp54 = add i32 %tmp52, %d1.1  ; i32 [#uses=1]
+   %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222   ; 
i32* [#uses=1]
+   %tmp59 = load i32* %tmp58   ; i32 [#uses=1]
+   %tmp62 = mul i32 %tmp49, %fm.1  ; i32 [#uses=1]
+   %tmp64 = add i32 %tmp62, %d2.1  ; i32 [#uses=1]
+   %tmp67 = mul i32 %tmp59, %fm.1  ; i32 [#uses=1]
+   %tmp69 = add i32 %tmp67, %d3.1  ; i32 [#uses=1]
+   %tmp71.rec = add i32 %fp.1.rec, 1   ; i32 [#uses=2]
+   %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec; 
i32* [#uses=1]
+   br label %bb74
+ }



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[llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/DataStructure.cpp Local.cpp

2007-03-13 Thread Andrew Lenharth


Changes in directory llvm-poolalloc/lib/DSA:

DataStructure.cpp updated: 1.248.2.4.2.4 - 1.248.2.4.2.5
Local.cpp updated: 1.158.2.4.2.7 - 1.158.2.4.2.8
---
Log message:

assign a meta pool to all dsnodes

---
Diffs of the changes:  (+7 -27)

 DataStructure.cpp |   22 +-
 Local.cpp |   12 ++--
 2 files changed, 7 insertions(+), 27 deletions(-)


Index: llvm-poolalloc/lib/DSA/DataStructure.cpp
diff -u llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.4 
llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.5
--- llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.4  Fri Mar  9 
11:27:51 2007
+++ llvm-poolalloc/lib/DSA/DataStructure.cppTue Mar 13 20:24:01 2007
@@ -128,7 +128,7 @@
 DSNode::DSNode(const Type *T, DSGraph *G)
   : NumReferrers(0), Size(0), ParentGraph(G), Ty(Type::VoidTy), NodeType(0)
 #ifdef LLVA_KERNEL
-  , MP(0)
+  , MP()
 #endif
  {
   // Add the type entry if it is specified...
@@ -198,11 +198,7 @@
   Size = 0;
   Ty = Type::VoidTy;
 #ifdef LLVA_KERNEL
-  MetaPool* MP = new MetaPool();
-  MP-merge(getMP());
-  MP-merge(To-getMP());
-  setMP(MP);
-  To-setMP(MP);
+  To-getMP()-merge(getMP());
 #endif
 
   // Remove this node from the parent graph's Nodes list.
@@ -265,7 +261,7 @@
 DestNode-Size = 1;
 DestNode-Globals.swap(Globals);
 #ifdef LLVA_KERNEL
-DestNode-setMP(getMP());
+DestNode-getMP()-merge(getMP());
 #endif
 
 #if JTC
@@ -866,11 +862,7 @@
 #endif
   }
 #ifdef LLVA_KERNEL
-  MetaPool* MP = new MetaPool();
-  MP-merge(CurNodeH.getNode()-getMP());
-  MP-merge(NH.getNode()-getMP());
-  CurNodeH.getNode()-setMP(MP);
-  NH.getNode()-setMP(MP);
+  NH.getNode()-getMP()-merge(CurNodeH.getNode()-getMP());
 #endif  
   // Merge the type entries of the two nodes together...
   if (NH.getNode()-Ty != Type::VoidTy)
@@ -1193,11 +1185,7 @@
 
 
 #ifdef LLVA_KERNEL
-  MetaPool* MP = new MetaPool();
-  MP-merge(NH.getNode()-getMP());
-  MP-merge(SrcNH.getNode()-getMP());
-  NH.getNode()-setMP(MP);
-  SrcNH.getNode()-setMP(MP);
+  SrcNH.getNode()-getMP()-merge(NH.getNode()-getMP());
 #endif  
 
   // Next, recursively merge all outgoing links as necessary.  Note that


Index: llvm-poolalloc/lib/DSA/Local.cpp
diff -u llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.7 
llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.8
--- llvm-poolalloc/lib/DSA/Local.cpp:1.158.2.4.2.7  Tue Mar 13 13:48:36 2007
+++ llvm-poolalloc/lib/DSA/Local.cppTue Mar 13 20:24:01 2007
@@ -350,10 +350,6 @@
 ///
 void GraphBuilder::handleAlloc(AllocationInst AI, bool isHeap) {
   DSNode *N = createNode();
-#ifdef LLVA_KERNEL
-  MetaPool* MP = new MetaPool();
-  N-setMP(MP);
-#endif
   if (isHeap)
 N-setHeapNodeMarker();
   else
@@ -1158,8 +1154,7 @@
 if (AllocList.end() != std::find(AllocList.begin(), AllocList.end(), 
F-getName())) {
   DSNode* N = createNode()-setHeapNodeMarker()-setModifiedMarker();
   setDestTo(*CS.getInstruction(), N);
-  MetaPool* MP = new MetaPool(CS);
-  N-setMP(MP);
+  N-getMP()-addCallSite(CS);
   return;
 }
 
@@ -1317,10 +1312,7 @@
   // Get a node handle to the global node and merge the initializer into it.
   DSNodeHandle NH = getValueDest(*GV);
   MergeConstantInitIntoNode(NH, GV-getInitializer());
-  MetaPool* MP = new MetaPool(GV);
-  if (NH.getNode()-getMP())
-MP-merge(NH.getNode()-getMP());
-  NH.getNode()-setMP(MP);
+  NH.getNode()-getMP()-addGlobal(GV);
 }
 
 



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[llvm-commits] [see] CVS: llvm-poolalloc/include/dsa/DSNode.h

2007-03-13 Thread Andrew Lenharth


Changes in directory llvm-poolalloc/include/dsa:

DSNode.h updated: 1.58.2.2.2.1 - 1.58.2.2.2.2
---
Log message:

assign a meta pool to all dsnodes

---
Diffs of the changes:  (+7 -5)

 DSNode.h |   12 +++-
 1 files changed, 7 insertions(+), 5 deletions(-)


Index: llvm-poolalloc/include/dsa/DSNode.h
diff -u llvm-poolalloc/include/dsa/DSNode.h:1.58.2.2.2.1 
llvm-poolalloc/include/dsa/DSNode.h:1.58.2.2.2.2
--- llvm-poolalloc/include/dsa/DSNode.h:1.58.2.2.2.1Fri Mar  9 11:27:50 2007
+++ llvm-poolalloc/include/dsa/DSNode.h Tue Mar 13 20:24:00 2007
@@ -33,10 +33,14 @@
   public:
 std::listCallSite allocs;
 std::listGlobalValue* GVs;
-MetaPool(CallSite C) : MPD(0), fw(0) {
+
+void addCallSite(CallSite C) {
+  assert(!fw);
   allocs.push_back(C);
 }
-MetaPool(GlobalValue* GV) : MPD(0),fw(0) {
+
+void addGlobal(GlobalValue* GV) {
+  assert(!fw);
   GVs.push_back(GV);
 }
 
@@ -62,7 +66,7 @@
 
   public:
 MetaPoolHandle(MetaPool* P) :MP(P) {}
-//MetaPoolHandle() : MP(0) {}
+MetaPoolHandle() : MP(new MetaPool()) {}
 MetaPool* getPool() {
   while(MP  MP-getFW())
 MP = MP-getFW();
@@ -74,7 +78,6 @@
 RP = RP-getFW();
   return RP;
 }
-void set(MetaPool* P) { MP = P; }
   };
 #endif
 
@@ -169,7 +172,6 @@
 public:
   MetaPool* getMP() { return MP.getPool(); }
   MetaPool* getMP() const { return MP.getPool(); }
-  void setMP(MetaPool* P) { MP.set(P); }
 #endif
 public:
   /// DSNode ctor - Create a node of the specified type, inserting it into the



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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

2007-03-13 Thread Zhou Sheng


Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.659 - 1.660
---
Log message:

Enable KnownZero/One.clear().


---
Diffs of the changes:  (+2 -2)

 InstructionCombining.cpp |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.659 
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.660
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.659   Tue Mar 13 
09:27:42 2007
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Mar 13 22:21:24 2007
@@ -1598,8 +1598,8 @@
 return false;
   }
   
-  //KnownZero.clear(); 
-  //KnownOne.clear();
+  KnownZero.clear(); 
+  KnownOne.clear();
   if (!V-hasOneUse()) {// Other users may use these bits.
 if (Depth != 0) {   // Not at the root.
   // Just compute the KnownZero/KnownOne bits to simplify things 
downstream.



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[llvm-commits] CVS: llvm-www/www-index.html

2007-03-13 Thread Vikram Adve


Changes in directory llvm-www:

www-index.html updated: 1.134 - 1.135
---
Log message:

Revised funding section.


---
Diffs of the changes:  (+13 -11)

 www-index.html |   24 +---
 1 files changed, 13 insertions(+), 11 deletions(-)


Index: llvm-www/www-index.html
diff -u llvm-www/www-index.html:1.134 llvm-www/www-index.html:1.135
--- llvm-www/www-index.html:1.134   Tue Mar 13 15:09:07 2007
+++ llvm-www/www-index.html Tue Mar 13 22:26:44 2007
@@ -138,18 +138,20 @@
 
 div class=www_sectiontitleFunding/div
 
-  pThis work is sponsored by the a
+  pThe initial research and development of LLVM was sponsored by the a
   
href=http://www.cise.nsf.gov/fndg/pubs/display2.cfm?pgm_pims_id=5160amp;pgm_supp_id=10070amp;loc=aciramp;pub_id=5372amp;div=acir;NSF
-  iNext Generation Software/i/a program through grants EIA-0093426 (an 
NSF
-  CAREER award) and EIA-0103756.  It is also supported in part by the NSF
-  iComputing Processes and Artifacts/i program (grant #CCF-0429561), the 
NSF
-  iOperating Systems and Compilers/i program (grant #CCR-9988482), the
-  NSF iEmbedded Systems/i program (grant #CCR-0209202), the
-  MARCO/DARPA a href=http://www.gigascale.org/;iGigascale Systems Research
-  Center/i/a (GSRC), IBM through the DARPA-funded PERCS project,
-  the Motorola University Partnerships in Research program, and development
-  contributions supported by a href=http://www.apple.com/;Apple Inc./a and
-  a href=http://www.autoesl.com/;AutoESL Design Technologies, Inc./a./p 
+  iNext Generation Software/i/a program through grants EIA-0093426 (an
+  NSF CAREER award) and EIA-0103756.  It was also supported in part by other
+  NSF grants, the MARCO/DARPA a href=http://www.gigascale.org/;iGigascale
+  Systems Research Center/i/a (GSRC), and the Motorola University
+  Partnerships in Research program./p
+
+pLLVM has since graduated from research funding to largely industry
+funding.  The continued development and support of LLVM is funded by Apple
+Computer, NSF grant EIA-0093426, the University of Illinois and AutoESL.
+LLVM has also benefited from numerous source code contributions from other
+individuals, listed a href=developers.cgihere/a.
+  /p
 
 !-- End of the right column --
 /td



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