[llvm-commits] CVS: llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h

Changes in directory llvm/include/llvm/Transforms/Utils: BasicBlockUtils.h updated: 1.10 - 1.11 --- Log message: Remove a level of indirection. --- Diffs of the changes: (+8 -9) BasicBlockUtils.h | 17 - 1 files changed, 8 insertions(+), 9 deletions(-) Index:

[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp

Changes in directory llvm/lib/Transforms/Scalar: LoopUnswitch.cpp updated: 1.14 - 1.15 --- Log message: Reform the unswitching code in terms of edge splitting, not block splitting. --- Diffs of the changes: (+67 -49) LoopUnswitch.cpp | 116

[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp

Changes in directory llvm/lib/Transforms/Scalar: LoopUnswitch.cpp updated: 1.15 - 1.16 --- Log message: Update PHI nodes in successors of exit blocks. --- Diffs of the changes: (+34 -5) LoopUnswitch.cpp | 39 ++- 1 files changed, 34 insertions(+), 5

[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp

Changes in directory llvm/lib/Transforms/Scalar: LoopUnswitch.cpp updated: 1.16 - 1.17 --- Log message: implement unswitching of loops with switch stmts and selects in them --- Diffs of the changes: (+135 -94) LoopUnswitch.cpp | 229 ---

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.150 - 1.151 --- Log message: Reorg for integration with gcc4. Old style debug info will not be passed though to SelIDAG. --- Diffs of the changes: (+21 -24) SelectionDAGISel.cpp | 45

[llvm-commits] CVS: llvm/lib/CodeGen/MachineDebugInfo.cpp

Changes in directory llvm/lib/CodeGen: MachineDebugInfo.cpp updated: 1.12 - 1.13 --- Log message: Reorg for integration with gcc4. Old style debug info will not be passed though to SelIDAG. --- Diffs of the changes: (+246 -110) MachineDebugInfo.cpp | 356

[llvm-commits] CVS: llvm/lib/Transforms/Utils/LoopSimplify.cpp

Changes in directory llvm/lib/Transforms/Utils: LoopSimplify.cpp updated: 1.62 - 1.63 --- Log message: remove dead expr --- Diffs of the changes: (+0 -1) LoopSimplify.cpp |1 - 1 files changed, 1 deletion(-) Index: llvm/lib/Transforms/Utils/LoopSimplify.cpp diff -u

[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Changes in directory llvm/lib/Target/X86: X86ISelDAGToDAG.cpp updated: 1.48 - 1.49 --- Log message: Prevent certain nodes that have already been selected from being folded into X86 addressing mode. Currently we do not allow any node whose target node produces a chain as well as any node that

[llvm-commits] CVS: llvm/lib/Transforms/Utils/LoopSimplify.cpp

Changes in directory llvm/lib/Transforms/Utils: LoopSimplify.cpp updated: 1.63 - 1.64 --- Log message: Make this check stricter. Disallow loop exit blocks from being shared by loops and their subloops. --- Diffs of the changes: (+7 -4) LoopSimplify.cpp | 11 +++ 1 files

[llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.td

Changes in directory llvm/lib/Target/IA64: IA64InstrInfo.td updated: 1.45 - 1.46 --- Log message: now short immediates will get matched (previously constants were all triggering movl 64bit imm fat instructions) --- Diffs of the changes: (+3 -5) IA64InstrInfo.td |8 +++- 1 files

[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp

Changes in directory llvm/lib/Target/IA64: IA64ISelDAGToDAG.cpp updated: 1.36 - 1.37 --- Log message: fix storing booleans (grawp missed this one) --- Diffs of the changes: (+3 -3) IA64ISelDAGToDAG.cpp |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: