Changes in directory llvm/test/Regression/CodeGen/X86:
overlap-shift.ll updated: 1.2 - 1.3
---
Log message:
evan's recent x86 isel improvements have fixed this, though not in the way
originally envisioned :)
---
Diffs of the changes: (+0 -3)
overlap-shift.ll |3 ---
1 files changed, 3
Changes in directory llvm-test:
Makefile.rules updated: 1.8 - 1.9
---
Log message:
Use the input LLVMGCC/LLVMGXX variables set by Makefile.config instead of
creating our own. Creating our own breaks symlinks.
---
Diffs of the changes: (+2 -2)
Makefile.rules |4 ++--
1 files changed,
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.444 - 1.445
---
Log message:
Fix a regression in a patch from a couple of days ago. This fixes
Transforms/InstCombine/2006-02-28-Crash.ll
---
Diffs of the changes: (+3 -1)
InstructionCombining.cpp |4
Changes in directory llvm/include/llvm/CodeGen:
MachineDebugInfo.h updated: 1.21 - 1.22
---
Log message:
Add const, volatile, restrict support.
Add array of debug descriptor support.
---
Diffs of the changes: (+15 -3)
MachineDebugInfo.h | 18 +++---
1 files changed, 15
Changes in directory llvm/lib/CodeGen:
DwarfWriter.cpp updated: 1.34 - 1.35
MachineDebugInfo.cpp updated: 1.18 - 1.19
---
Log message:
Add const, volatile, restrict support.
Add array of debug descriptor support.
---
Diffs of the changes: (+67 -5)
DwarfWriter.cpp |3 ++
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.54 - 1.55
---
Log message:
Don't match x 1 to LEAL. It's better to emit x + x.
---
Diffs of the changes: (+4 -1)
X86ISelDAGToDAG.cpp |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.61 - 1.62
---
Log message:
Another entry.
---
Diffs of the changes: (+16 -0)
README.txt | 16
1 files changed, 16 insertions(+)
Index: llvm/lib/Target/X86/README.txt
diff -u
Changes in directory llvm/test/Regression/CodeGen/X86:
shift-one.ll added (r1.1)
---
Log message:
Add a test case for left shift by 1. We should not be using lea for this.
---
Diffs of the changes: (+9 -0)
shift-one.ll |9 +
1 files changed, 9 insertions(+)
Index:
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.19 - 1.20
---
Log message:
- Added v2f32, not used by any target currently. Only for testing purpose.
- Minor bug fix.
---
Diffs of the changes: (+27 -12)
ValueTypes.h | 39 +++
1
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.261 - 1.262
---
Log message:
- Added VConstant as an abstract version of ConstantVec.
- All abstrct vector nodes must have # of elements and element type as their
first two operands.
---
Diffs of the changes:
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.55 - 1.56
---
Log message:
Missing a cast previously.
---
Diffs of the changes: (+1 -1)
TargetLowering.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.104 - 1.105
---
Log message:
- Added VConstant as an abstract version of ConstantVec.
- All abstrct vector nodes must have # of elements and element type as their
first two operands.
---
Diffs of the changes:
Changes in directory llvm/utils/TableGen:
CodeGenTarget.cpp updated: 1.55 - 1.56
---
Log message:
New vector type v2f32.
---
Diffs of the changes: (+2 -0)
CodeGenTarget.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.97 - 1.98
---
Log message:
Vector op lowering.
---
Diffs of the changes: (+19 -6)
X86ISelLowering.cpp | 25 +++--
1 files changed, 19 insertions(+), 6 deletions(-)
Index:
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.91 - 1.92
---
Log message:
Vector op lowering.
---
Diffs of the changes: (+16 -0)
PPCISelLowering.cpp | 16
1 files changed, 16 insertions(+)
Index:
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.113 - 1.114
LegalizeDAG.cpp updated: 1.307 - 1.308
SelectionDAGISel.cpp updated: 1.174 - 1.175
---
Log message:
Vector ops lowering.
---
Diffs of the changes: (+76 -50)
DAGCombiner.cpp |2
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.114 - 1.115
---
Log message:
Pull shifts by a constant through multiplies (a form of reassociation),
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll
---
Diffs of the changes: (+27 -0)
DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.115 - 1.116
---
Log message:
Add a new AddToWorkList method, start using it
---
Diffs of the changes: (+63 -57)
DAGCombiner.cpp | 120 +---
1 files changed,
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.41 - 1.42
---
Log message:
Add interfaces for targets to provide target-specific dag combiner
optimizations.
---
Diffs of the changes: (+8 -0)
TargetLowering.cpp |8
1 files changed, 8 insertions(+)
Index:
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.56 - 1.57
---
Log message:
Add interfaces for targets to provide target-specific dag combiner
optimizations.
---
Diffs of the changes: (+59 -9)
TargetLowering.h | 68
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
stfiwx.ll added (r1.1)
---
Log message:
new testcase. These functions shouldn't touch the stack if stfiwx use
is enabled.
---
Diffs of the changes: (+21 -0)
stfiwx.ll | 21 +
1 files changed, 21
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.93 - 1.94
PPCISelLowering.h updated: 1.24 - 1.25
PPCInstrInfo.td updated: 1.177 - 1.178
PPCSubtarget.cpp updated: 1.18 - 1.19
README.txt updated: 1.66 - 1.67
---
Log message:
Compile this:
void foo(float a, int *b) {
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.67 - 1.68
---
Log message:
add a note
---
Diffs of the changes: (+18 -0)
README.txt | 18 ++
1 files changed, 18 insertions(+)
Index: llvm/lib/Target/PowerPC/README.txt
diff -u
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
or-addressing-mode.ll added (r1.1)
---
Log message:
load (x|y) - load (x+y) iff x and y have no common bits.
---
Diffs of the changes: (+23 -0)
or-addressing-mode.ll | 23 +++
1 files changed, 23
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.160 - 1.161
---
Log message:
Implement CodeGen/PowerPC/or-addressing-mode.ll, which is also PR668:
http://llvm.cs.uiuc.edu/PR668 .
---
Diffs of the changes: (+59 -18)
PPCISelDAGToDAG.cpp | 77
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