[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAG.cpp updated: 1.287 - 1.288 --- Log message: Try again --- Diffs of the changes: (+10 -3) SelectionDAG.cpp | 13 ++--- 1 files changed, 10 insertions(+), 3 deletions(-) Index:

[llvm-commits] CVS: llvm/include/llvm/IntrinsicsX86.td

Changes in directory llvm/include/llvm: IntrinsicsX86.td updated: 1.1 - 1.2 --- Log message: Intrinsics naming convention change. --- Diffs of the changes: (+69 -65) IntrinsicsX86.td | 134 --- 1 files changed, 69 insertions(+), 65

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAG.cpp updated: 1.288 - 1.289 --- Log message: Unbreak the build on non-apple compilers :-( --- Diffs of the changes: (+2 -1) SelectionDAG.cpp |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrSSE.td

Changes in directory llvm/lib/Target/X86: X86InstrSSE.td updated: 1.33 - 1.34 --- Log message: unbreak the build --- Diffs of the changes: (+1 -1) X86InstrSSE.td |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86InstrSSE.td diff -u

[llvm-commits] CVS: llvm/docs/TestingGuide.html

Changes in directory llvm/docs: TestingGuide.html updated: 1.28 - 1.29 --- Log message: Add note for Mac OS X developers. --- Diffs of the changes: (+4 -1) TestingGuide.html |5 - 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm/docs/TestingGuide.html diff -u

[llvm-commits] CVS: llvm/docs/TestingGuide.html

Changes in directory llvm/docs: TestingGuide.html updated: 1.29 - 1.30 --- Log message: Adding other platforms. --- Diffs of the changes: (+5 -2) TestingGuide.html |7 +-- 1 files changed, 5 insertions(+), 2 deletions(-) Index: llvm/docs/TestingGuide.html diff -u

[llvm-commits] CVS: llvm/docs/TestingGuide.html

Changes in directory llvm/docs: TestingGuide.html updated: 1.30 - 1.31 --- Log message: Clarity. --- Diffs of the changes: (+5 -5) TestingGuide.html | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) Index: llvm/docs/TestingGuide.html diff -u

[llvm-commits] CVS: llvm/docs/TestingGuide.html

Changes in directory llvm/docs: TestingGuide.html updated: 1.31 - 1.32 --- Log message: Typo. --- Diffs of the changes: (+2 -2) TestingGuide.html |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/docs/TestingGuide.html diff -u llvm/docs/TestingGuide.html:1.31

[llvm-commits] CVS: llvm/docs/TestingGuide.html

Changes in directory llvm/docs: TestingGuide.html updated: 1.32 - 1.33 --- Log message: Misunderstanding. --- Diffs of the changes: (+3 -3) TestingGuide.html |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/docs/TestingGuide.html diff -u

[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp

Changes in directory llvm/lib/Target/Alpha: AlphaRegisterInfo.cpp updated: 1.37 - 1.38 --- Log message: Translate llvm target registers to dwarf register numbers properly. --- Diffs of the changes: (+1 -1) AlphaRegisterInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-)

[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp

Changes in directory llvm/lib/Target/X86: X86RegisterInfo.cpp updated: 1.131 - 1.132 --- Log message: Translate llvm target registers to dwarf register numbers properly. --- Diffs of the changes: (+1 -1) X86RegisterInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-)

[llvm-commits] CVS: llvm/lib/Target/IA64/IA64RegisterInfo.cpp

Changes in directory llvm/lib/Target/IA64: IA64RegisterInfo.cpp updated: 1.14 - 1.15 --- Log message: Translate llvm target registers to dwarf register numbers properly. --- Diffs of the changes: (+1 -1) IA64RegisterInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-)

[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

Changes in directory llvm/lib/Target/PowerPC: PPCRegisterInfo.cpp updated: 1.50 - 1.51 --- Log message: Translate llvm target registers to dwarf register numbers properly. --- Diffs of the changes: (+1 -1) PPCRegisterInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-)

[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp

Changes in directory llvm/lib/Target/Sparc: SparcRegisterInfo.cpp updated: 1.38 - 1.39 --- Log message: Translate llvm target registers to dwarf register numbers properly. --- Diffs of the changes: (+1 -1) SparcRegisterInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-)

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.339 - 1.340 --- Log message: Fix legalization of intrinsics with chain and result values --- Diffs of the changes: (+13 -2) LegalizeDAG.cpp | 15 +-- 1 files changed, 13 insertions(+), 2

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.207 - 1.208 --- Log message: Disable dbg_declare, it currently breaks the CFE build --- Diffs of the changes: (+1 -0) SelectionDAGISel.cpp |1 + 1 files changed, 1 insertion(+) Index:

[llvm-commits] CVS: llvm/include/llvm/IntrinsicsPowerPC.td

Changes in directory llvm/include/llvm: IntrinsicsPowerPC.td updated: 1.2 - 1.3 --- Log message: add some more intrinsics. --- Diffs of the changes: (+109 -21) IntrinsicsPowerPC.td | 130 ++- 1 files changed, 109 insertions(+), 21

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ValueTypes.h ValueTypes.td

Changes in directory llvm/include/llvm/CodeGen: ValueTypes.h updated: 1.25 - 1.26 ValueTypes.td updated: 1.1 - 1.2 --- Log message: add a new iPTR ValueType for tblgen use --- Diffs of the changes: (+9 -1) ValueTypes.h |6 +- ValueTypes.td |4 2 files changed, 9

[llvm-commits] CVS: llvm/utils/TableGen/CodeGenIntrinsics.h CodeGenTarget.cpp CodeGenTarget.h

Changes in directory llvm/utils/TableGen: CodeGenIntrinsics.h updated: 1.7 - 1.8 CodeGenTarget.cpp updated: 1.59 - 1.60 CodeGenTarget.h updated: 1.24 - 1.25 --- Log message: Add support for decoding iPTR to the right pointer type. --- Diffs of the changes: (+19 -7) CodeGenIntrinsics.h |

[llvm-commits] CVS: llvm/include/llvm/Use.h

Changes in directory llvm/include/llvm: Use.h updated: 1.12 - 1.13 --- Log message: Add some missing template specializations for autodereferencing User. --- Diffs of the changes: (+25 -1) Use.h | 26 +- 1 files changed, 25 insertions(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/include/llvm/Intrinsics.td

Changes in directory llvm/include/llvm: Intrinsics.td updated: 1.28 - 1.29 --- Log message: Add support for intrinsics with pointer arguments in target .td files. --- Diffs of the changes: (+3 -3) Intrinsics.td |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index:

[llvm-commits] CVS: llvm/include/llvm/IntrinsicInst.h

Changes in directory llvm/include/llvm: IntrinsicInst.h updated: 1.14 - 1.15 --- Log message: Should not remove casts from variable's alloca. --- Diffs of the changes: (+1 -1) IntrinsicInst.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.208 - 1.209 --- Log message: Reactivate llvm.dbg.declare. --- Diffs of the changes: (+0 -1) SelectionDAGISel.cpp |1 - 1 files changed, 1 deletion(-) Index:

[llvm-commits] CVS: llvm/test/Regression/Analysis/DSGraph/2006-03-27-LinkedCollapsed.ll

Changes in directory llvm/test/Regression/Analysis/DSGraph: 2006-03-27-LinkedCollapsed.ll added (r1.1) --- Log message: Adding links to a node collapsed during type merging crashes. --- Diffs of the changes: (+26 -0) 2006-03-27-LinkedCollapsed.ll | 26 ++ 1

[llvm-commits] CVS: llvm/lib/Analysis/DataStructure/DataStructure.cpp

Changes in directory llvm/lib/Analysis/DataStructure: DataStructure.cpp updated: 1.243 - 1.244 --- Log message: If adding a link to a collapsed, node, ignore offset. Fixes 2006-03-27-LinkedCollapsed.ll --- Diffs of the changes: (+3 -0) DataStructure.cpp |3 +++ 1 files changed, 3

[llvm-commits] CVS: llvm/include/llvm/Intrinsics.td

Changes in directory llvm/include/llvm: Intrinsics.td updated: 1.29 - 1.30 --- Log message: revert this, it breaks things --- Diffs of the changes: (+3 -3) Intrinsics.td |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/include/llvm/Intrinsics.td diff -u

[llvm-commits] CVS: llvm/utils/TableGen/CodeGenIntrinsics.h CodeGenTarget.cpp

Changes in directory llvm/utils/TableGen: CodeGenIntrinsics.h updated: 1.8 - 1.9 CodeGenTarget.cpp updated: 1.60 - 1.61 --- Log message: revert this, it breaks things. --- Diffs of the changes: (+4 -5) CodeGenIntrinsics.h |2 +- CodeGenTarget.cpp |7 +++ 2 files changed, 4

[llvm-commits] CVS: llvm/include/llvm/Intrinsics.td

Changes in directory llvm/include/llvm: Intrinsics.td updated: 1.30 - 1.31 --- Log message: Reenable pointer intrinsics. --- Diffs of the changes: (+3 -3) Intrinsics.td |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/include/llvm/Intrinsics.td diff -u

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.340 - 1.341 SelectionDAG.cpp updated: 1.289 - 1.290 SelectionDAGISel.cpp updated: 1.209 - 1.210 --- Log message: Tblgen doesn't like multiple SDNode definitions that map to the sameenum value. Split them into

[llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td

Changes in directory llvm/lib/Target: TargetSelectionDAG.td updated: 1.61 - 1.62 --- Log message: Tblgen doesn't like multiple SDNode definitions that map to the sameenum value. Split them into separate enums. --- Diffs of the changes: (+3 -3) TargetSelectionDAG.td |6 +++--- 1

[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCInstrAltivec.td

Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.115 - 1.116 PPCInstrAltivec.td updated: 1.13 - 1.14 --- Log message: Tblgen doesn't like multiple SDNode definitions that map to the sameenum value. Split them into separate enums. --- Diffs of the changes: (+11

[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp

Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.189 - 1.190 --- Log message: Tblgen doesn't like multiple SDNode definitions that map to the sameenum value. Split them into separate enums. Also, don't emit dynamic checks when we can compute them statically ---

[llvm-commits] CVS: llvm/lib/CodeGen/MachineDebugInfo.cpp

Changes in directory llvm/lib/CodeGen: MachineDebugInfo.cpp updated: 1.35 - 1.36 --- Log message: More bulletproofing of DebugInfoDesc verify. --- Diffs of the changes: (+1 -1) MachineDebugInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/test/Regression/CodeGen/Generic/2006-03-27-DebugInfoNULLDeclare.ll

Changes in directory llvm/test/Regression/CodeGen/Generic: 2006-03-27-DebugInfoNULLDeclare.ll added (r1.1) --- Log message: Regression test for the handling of nulls as arguments to debug intrinsics. --- Diffs of the changes: (+10 -0) 2006-03-27-DebugInfoNULLDeclare.ll | 10 ++

[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCISelLowering.h PPCInstrAltivec.td PPCInstrInfo.td

Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.116 - 1.117 PPCISelLowering.h updated: 1.35 - 1.36 PPCInstrAltivec.td updated: 1.14 - 1.15 PPCInstrInfo.td updated: 1.212 - 1.213 --- Log message: Use normal lvx for scalar_to_vector instead of lve*x. They do the

[llvm-commits] CVS: llvm/include/llvm/IntrinsicsPowerPC.td

Changes in directory llvm/include/llvm: IntrinsicsPowerPC.td updated: 1.5 - 1.6 --- Log message: Add lvxl --- Diffs of the changes: (+2 -0) IntrinsicsPowerPC.td |2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/IntrinsicsPowerPC.td diff -u

[llvm-commits] CVS: llvm/include/llvm/CodeGen/ValueTypes.h

Changes in directory llvm/include/llvm/CodeGen: ValueTypes.h updated: 1.26 - 1.27 --- Log message: getVectorTyppe(MVT::i64, 2) == MVT::v2i64. --- Diffs of the changes: (+3 -0) ValueTypes.h |3 +++ 1 files changed, 3 insertions(+) Index: llvm/include/llvm/CodeGen/ValueTypes.h diff -u

[llvm-commits] CVS: llvm/include/llvm/IntrinsicsPowerPC.td

Changes in directory llvm/include/llvm: IntrinsicsPowerPC.td updated: 1.6 - 1.7 --- Log message: Add some more intrinsics: rotates, fp rounds, and random other fp instructions. --- Diffs of the changes: (+23 -1) IntrinsicsPowerPC.td | 24 +++- 1 files changed, 23

[llvm-commits] CVS: llvm/lib/Target/X86/README.txt

Changes in directory llvm/lib/Target/X86: README.txt updated: 1.74 - 1.75 --- Log message: All unpack cases are now being handled. --- Diffs of the changes: (+0 -4) README.txt |4 1 files changed, 4 deletions(-) Index: llvm/lib/Target/X86/README.txt diff -u

[llvm-commits] CVS: llvm/lib/Target/X86/README.txt

Changes in directory llvm/lib/Target/X86: README.txt updated: 1.75 - 1.76 --- Log message: Added a couple of entries about movhps and movlhps. --- Diffs of the changes: (+26 -0) README.txt | 26 ++ 1 files changed, 26 insertions(+) Index:

[llvm-commits] CVS: llvm/include/llvm/IntrinsicsPowerPC.td

Changes in directory llvm/include/llvm: IntrinsicsPowerPC.td updated: 1.7 - 1.8 --- Log message: These don't directly map to gcc intrinsics any more. --- Diffs of the changes: (+14 -12) IntrinsicsPowerPC.td | 26 ++ 1 files changed, 14 insertions(+), 12

[llvm-commits] CVS: llvm/win32/VMCore/VMCore.vcproj

Changes in directory llvm/win32/VMCore: VMCore.vcproj updated: 1.18 - 1.19 --- Log message: Keep Visual Studio informed. --- Diffs of the changes: (+8 -2) VMCore.vcproj | 10 -- 1 files changed, 8 insertions(+), 2 deletions(-) Index: llvm/win32/VMCore/VMCore.vcproj diff -u

[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCInstrAltivec.td README_ALTIVEC.txt

Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.117 - 1.118 PPCInstrAltivec.td updated: 1.16 - 1.17 README_ALTIVEC.txt updated: 1.3 - 1.4 --- Log message: Add a few more altivec intrinsics --- Diffs of the changes: (+28 -6) PPCISelLowering.cpp |4 ++--

[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrAltivec.td

Changes in directory llvm/lib/Target/PowerPC: PPCInstrAltivec.td updated: 1.17 - 1.18 --- Log message: Fix a couple typos --- Diffs of the changes: (+2 -2) PPCInstrAltivec.td |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCInstrAltivec.td

[llvm-commits] CVS: llvm/include/llvm/IntrinsicsPowerPC.td

Changes in directory llvm/include/llvm: IntrinsicsPowerPC.td updated: 1.8 - 1.9 --- Log message: Add a few more altivec intrinsics --- Diffs of the changes: (+24 -1) IntrinsicsPowerPC.td | 25 - 1 files changed, 24 insertions(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/vec_shuffle.ll

Changes in directory llvm/test/Regression/CodeGen/X86: vec_shuffle.ll updated: 1.2 - 1.3 --- Log message: Use movhpd is even better than movlhps. --- Diffs of the changes: (+1 -1) vec_shuffle.ll |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrSSE.td

Changes in directory llvm/lib/Target/X86: X86InstrSSE.td updated: 1.37 - 1.38 --- Log message: Typo --- Diffs of the changes: (+1 -1) X86InstrSSE.td |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86InstrSSE.td diff -u

[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h X86InstrSSE.td

Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.137 - 1.138 X86ISelLowering.h updated: 1.46 - 1.47 X86InstrSSE.td updated: 1.36 - 1.37 --- Log message: * Prefer using operation of matching types. e.g unpcklpd rather than movlhps. * Bug fixes. --- Diffs of the

[llvm-commits] CVS: llvm/lib/Target/X86/README.txt

Changes in directory llvm/lib/Target/X86: README.txt updated: 1.76 - 1.77 --- Log message: Update --- Diffs of the changes: (+2 -23) README.txt | 25 ++--- 1 files changed, 2 insertions(+), 23 deletions(-) Index: llvm/lib/Target/X86/README.txt diff -u

[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrSSE.td

Changes in directory llvm/lib/Target/X86: X86InstrSSE.td updated: 1.38 - 1.39 --- Log message: movlps and movlpd should be modeled as two address code. --- Diffs of the changes: (+9 -9) X86InstrSSE.td | 18 +- 1 files changed, 9 insertions(+), 9 deletions(-) Index: