Changes in directory llvm/include/llvm:
IntrinsicsPowerPC.td updated: 1.9 - 1.10
---
Log message:
Add vector multiply, multiply sum, pack, unpack, and lvsl/lvsr intrinsics.
---
Diffs of the changes: (+91 -0)
IntrinsicsPowerPC.td | 91 +++
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.145 - 1.146
X86InstrSSE.td updated: 1.49 - 1.50
---
Log message:
Make sure all possible shuffles are matched.
Use pshufd, pshuhw, and pshulw to shuffle v4f32 if shufps doesn't match.
Use shufps to shuffle v4f32 if pshufd,
Changes in directory llvm/test/Regression/TableGen:
DagDefSubst.ll added (r1.1)
---
Log message:
Dag operator should be able to be template params.
---
Diffs of the changes: (+15 -0)
DagDefSubst.ll | 15 +++
1 files changed, 15 insertions(+)
Index:
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.190 - 1.191
FileParser.y updated: 1.40 - 1.41
Record.h updated: 1.55 - 1.56
Record.cpp updated: 1.51 - 1.52
---
Log message:
Implement Regression/TableGen/DagDefSubst.ll
---
Diffs of the changes: (+45 -41)
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.19 - 1.20
---
Log message:
Use a new tblgen feature to significantly shrinkify instruction definitions that
directly correspond to intrinsics.
---
Diffs of the changes: (+46 -108)
PPCInstrAltivec.td | 154
Changes in directory llvm/include/llvm:
IntrinsicsPowerPC.td updated: 1.10 - 1.11
---
Log message:
fix incorrect prototypes
---
Diffs of the changes: (+12 -12)
IntrinsicsPowerPC.td | 24
1 files changed, 12 insertions(+), 12 deletions(-)
Index:
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.20 - 1.21
---
Log message:
Add the rest of the vmul instructions and the vmulsum* instructions.
---
Diffs of the changes: (+15 -1)
PPCInstrAltivec.td | 16 +++-
1 files changed, 15 insertions(+), 1
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.63 - 1.64
---
Log message:
Add a method useful for decimating vectors.
---
Diffs of the changes: (+10 -0)
TargetLowering.h | 10 ++
1 files changed, 10 insertions(+)
Index:
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.48 - 1.49
---
Log message:
Implement TargetLowering::getPackedTypeBreakdown
---
Diffs of the changes: (+41 -0)
TargetLowering.cpp | 41 +
1 files changed, 41 insertions(+)
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.146 - 1.147
---
Log message:
Ok for vector_shuffle mask to contain undef elements.
---
Diffs of the changes: (+120 -56)
X86ISelLowering.cpp | 176 +++-
1 files
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.49 - 1.50
---
Log message:
Modify the TargetLowering::getPackedTypeBreakdown method to also return the
unpromoted element type.
---
Diffs of the changes: (+7 -4)
TargetLowering.cpp | 11 +++
1 files changed, 7
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.342 - 1.343
---
Log message:
Expand INSERT_VECTOR_ELT to store vec, sp; store elt, sp+k; vec = load sp;
---
Diffs of the changes: (+24 -1)
LegalizeDAG.cpp | 25 -
1 files changed, 24
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.118 - 1.119
---
Log message:
Mark INSERT_VECTOR_ELT as expand
---
Diffs of the changes: (+1 -0)
PPCISelLowering.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.50 - 1.51
---
Log message:
Was returning the wrong type.
---
Diffs of the changes: (+5 -4)
TargetLowering.cpp |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/TargetLowering.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.343 - 1.344
SelectionDAG.cpp updated: 1.292 - 1.293
SelectionDAGISel.cpp updated: 1.212 - 1.213
---
Log message:
Significantly improve handling of vectors that are live across basic blocks,
handling cases where the
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.213 - 1.214
---
Log message:
Make sure to pass enough values to phi nodes when we are dealing with
decimated vectors. This fixes UnitTests/Vector/sumarray-dbl.c
---
Diffs of the changes: (+10 -2)
Changes in directory llvm-test/SingleSource/UnitTests/Vector:
sumarray-dbl.c added (r1.1)
helpers.h updated: 1.3 - 1.4
---
Log message:
new testcase, which requires expansion of cross-block values.
---
Diffs of the changes: (+36 -0)
helpers.h | 14 ++
sumarray-dbl.c |
Changes in directory llvm/utils/TableGen:
IntrinsicEmitter.cpp updated: 1.17 - 1.18
---
Log message:
When emitting code for the verifier, instead of emitting each case statement
independently, batch up checks so that identically typed intrinsics share
verifier code. This dramatically reduces
Changes in directory llvm/lib/Target/PowerPC:
README_ALTIVEC.txt updated: 1.6 - 1.7
---
Log message:
These are done
---
Diffs of the changes: (+0 -5)
README_ALTIVEC.txt |5 -
1 files changed, 5 deletions(-)
Index: llvm/lib/Target/PowerPC/README_ALTIVEC.txt
diff -u
Changes in directory llvm/lib/VMCore:
Verifier.cpp updated: 1.150 - 1.151
---
Log message:
Add a new method to verify intrinsic function prototypes.
---
Diffs of the changes: (+60 -2)
Verifier.cpp | 62 +--
1 files changed, 60
Changes in directory llvm/utils/TableGen:
IntrinsicEmitter.cpp updated: 1.18 - 1.19
---
Log message:
Final bugfix for PR724: http://llvm.cs.uiuc.edu/PR724 . GCC won't inline
varargs functions, so use one to
validate the prototype of intrinsic functions. This prevents GCC from going
crazy
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.191 - 1.192
---
Log message:
Allow bits init values to be used in patterns, turn them into ints.
---
Diffs of the changes: (+19 -0)
DAGISelEmitter.cpp | 19 +++
1 files changed, 19 insertions(+)
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.22 - 1.23
---
Log message:
Compactify comparisons.
---
Diffs of the changes: (+34 -104)
PPCInstrAltivec.td | 138 +
1 files changed, 34 insertions(+), 104
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.23 - 1.24
---
Log message:
compactify some more instruction definitions
---
Diffs of the changes: (+15 -61)
PPCInstrAltivec.td | 76 ++---
1 files changed, 15
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
vcmp-fold.ll added (r1.1)
---
Log message:
new testcase
---
Diffs of the changes: (+21 -0)
vcmp-fold.ll | 21 +
1 files changed, 21 insertions(+)
Index: llvm/test/Regression/CodeGen/PowerPC/vcmp-fold.ll
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.120 - 1.121
README_ALTIVEC.txt updated: 1.7 - 1.8
---
Log message:
Implement an item from the readme, folding vcmp/vcmp. instructions with
identical instructions into a single instruction. For example, for:
void
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.121 - 1.122
---
Log message:
note to self: *save* file, then check it in
---
Diffs of the changes: (+1 -1)
PPCISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/VMCore:
Verifier.cpp updated: 1.151 - 1.152
---
Log message:
Fix build breakage.
---
Diffs of the changes: (+1 -0)
Verifier.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.151
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