Author: lattner
Date: Mon Oct 22 01:34:15 2007
New Revision: 43218
URL: http://llvm.org/viewvc/llvm-project?rev=43218view=rev
Log:
Check in part 2: parser and ast.
Added:
llvm/trunk/docs/tutorial/LangImpl2.html
Modified:
llvm/trunk/docs/tutorial/LangImpl1.html
Author: resistor
Date: Mon Oct 22 01:35:07 2007
New Revision: 43219
URL: http://llvm.org/viewvc/llvm-project?rev=43219view=rev
Log:
Add downloadable code samples.
Added:
llvm/trunk/docs/tutorial/Tutorial1.tar.bz2 (with props)
llvm/trunk/docs/tutorial/Tutorial1.zip (with props)
Author: resistor
Date: Mon Oct 22 01:48:28 2007
New Revision: 43220
URL: http://llvm.org/viewvc/llvm-project?rev=43220view=rev
Log:
Fix a few typos I noticed.
Modified:
llvm/trunk/docs/tutorial/LangImpl2.html
Modified: llvm/trunk/docs/tutorial/LangImpl2.html
URL:
Author: lattner
Date: Mon Oct 22 02:01:42 2007
New Revision: 43221
URL: http://llvm.org/viewvc/llvm-project?rev=43221view=rev
Log:
start of chapter 3
Added:
llvm/trunk/docs/tutorial/LangImpl3.html
Modified:
llvm/trunk/docs/tutorial/index.html
Added:
Hi Chris,
Assuming an expansion from i64 to 2x i32, the code above will work
for sextinreg amounts between 1 and 32. For greater amounts, the top
part should get a sextinreg, and the bottom part should or togther
the top and bottom shifted parts, similar to a expanded shift.
not sure
On Oct 20, 2007, at 11:49 AM, Dale Johannesen wrote:
On Oct 20, 2007, at 10:29 AM, Chris Lattner wrote:
This is just a really ugly compatibility hack. Apparently GCC
doesn't do cross jumping of inline asm statements as much as we do,
and we've hit a significant body of code that depends on
Author: lattner
Date: Mon Oct 22 11:44:31 2007
New Revision: 43222
URL: http://llvm.org/viewvc/llvm-project?rev=43222view=rev
Log:
fit in 80 cols :)
Modified:
llvm/trunk/docs/tutorial/LangImpl2.html
Modified: llvm/trunk/docs/tutorial/LangImpl2.html
URL:
On Oct 21, 2007, at 10:34 AM, Duncan Sands wrote:
Hi Chris,
Assuming an expansion from i64 to 2x i32, the code above will work
for sextinreg amounts between 1 and 32. For greater amounts, the top
part should get a sextinreg, and the bottom part should or togther
the top and bottom shifted
On Oct 22, 2007, at 9:35 AM, Chris Lattner wrote:
On Oct 20, 2007, at 11:49 AM, Dale Johannesen wrote:
On Oct 20, 2007, at 10:29 AM, Chris Lattner wrote:
This is just a really ugly compatibility hack. Apparently GCC
doesn't do cross jumping of inline asm statements as much as we do,
and
Author: baldrick
Date: Mon Oct 22 13:26:21 2007
New Revision: 43223
URL: http://llvm.org/viewvc/llvm-project?rev=43223view=rev
Log:
Fix up the logic for result expanding the various extension
operations so they work right for integers with funky
bit-widths. For example, consider extending i48 to
Author: baldrick
Date: Mon Oct 22 14:00:05 2007
New Revision: 43225
URL: http://llvm.org/viewvc/llvm-project?rev=43225view=rev
Log:
Support for expanding extending loads of integers with
funky bit-widths.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp
Modified:
Author: lattner
Date: Mon Oct 22 14:41:46 2007
New Revision: 43226
URL: http://llvm.org/viewvc/llvm-project?rev=43226view=rev
Log:
add a 'don't use me' marker.
Modified:
llvm/trunk/tools/llvmc/llvmc.cpp
Modified: llvm/trunk/tools/llvmc/llvmc.cpp
URL:
Author: evancheng
Date: Mon Oct 22 14:42:28 2007
New Revision: 43227
URL: http://llvm.org/viewvc/llvm-project?rev=43227view=rev
Log:
Add missing paratheses.
Modified:
llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL:
Author: evancheng
Date: Mon Oct 22 14:46:19 2007
New Revision: 43228
URL: http://llvm.org/viewvc/llvm-project?rev=43228view=rev
Log:
Use ptr type in the immediate field of a BxA instruction so we don't end up
selecting 32-bit call instruction for ppc64.
Added:
Author: criswell
Date: Mon Oct 22 14:57:26 2007
New Revision: 43229
URL: http://llvm.org/viewvc/llvm-project?rev=43229view=rev
Log:
Make DSA compile correctly in kernel and non-kernel mode.
Modified:
poolalloc/branches/SVA/lib/DSA/Local.cpp
Modified: poolalloc/branches/SVA/lib/DSA/Local.cpp
Author: djg
Date: Mon Oct 22 15:22:24 2007
New Revision: 43230
URL: http://llvm.org/viewvc/llvm-project?rev=43230view=rev
Log:
Fix the folding of multiplication into addresses on x86, which was broken
by the recent {U,S}MUL_LOHI changes.
Added:
llvm/trunk/test/CodeGen/X86/fold-mul-lohi.ll
Author: djg
Date: Mon Oct 22 15:40:42 2007
New Revision: 43231
URL: http://llvm.org/viewvc/llvm-project?rev=43231view=rev
Log:
Strength reduction improvements.
- Avoid attempting stride-reuse in the case that there are users that
aren't addresses. In that case, there will be places where the
Author: djg
Date: Mon Oct 22 15:44:10 2007
New Revision: 43232
URL: http://llvm.org/viewvc/llvm-project?rev=43232view=rev
Log:
The #include iterator isn't needed in this header.
Modified:
llvm/trunk/lib/VMCore/ConstantFold.h
Modified: llvm/trunk/lib/VMCore/ConstantFold.h
URL:
Hi Rafael,
There a couple of problems with this patch.
1. This breaks a number of tests for me:
llc-beta /MultiSource/Applications/JM/ldecod/ldecod
llc /MultiSource/Applications/JM/ldecod/ldecod
llc /External/SPEC/CINT2000/254.gap/254.gap
llc
Value is the class used to represent a register in LLVM. The Codegen()
method says to emit IR for that AST
It would be good to mention that the registers here cannot be reassigned,
as the word register might seem to imply.
I don't know much you want to say about SSA at this point in the
Author: evancheng
Date: Mon Oct 22 17:11:27 2007
New Revision: 43234
URL: http://llvm.org/viewvc/llvm-project?rev=43234view=rev
Log:
Fix memcpy lowering when addresses are 4-byte aligned but size is not multiple
of 4.
Added:
llvm/trunk/test/CodeGen/ARM/memcpy-inline.ll
Modified:
Dan,
I'm planning to cover both of those points in the Basic Topics
sections of the tutorial.
--Owen
smime.p7s
Description: S/MIME cryptographic signature
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
Dan,
I'm planning to cover both of those points in the Basic Topics
sections of the tutorial.
--Owen
smime.p7s
Description: S/MIME cryptographic signature
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
Hi,
There's a problem with the makeinfo test in llvm-gcc where it checks for a
makeinfo version = 4.4. It treats 4.10 as less than 4.4 The attached patch
should be applied to both llvm-gcc4.0 and 4.2.
Thanks,
Nick
___
llvm-commits mailing list
and this time with the attachment!
Hi,
There's a problem with the makeinfo test in llvm-gcc where it checks for a
makeinfo version = 4.4. It treats 4.10 as less than 4.4 The attached patch
should be applied to both llvm-gcc4.0 and 4.2.
Thanks,
Nick
Index: configure.in
On Oct 22, 2007, at 3:05 PM, Dan Gohman wrote:
Value is the class used to represent a register in LLVM. The
Codegen() method says to emit IR for that AST
It would be good to mention that the registers here cannot be
reassigned,
as the word register might seem to imply.
Good idea.
I
Author: lattner
Date: Mon Oct 22 23:51:30 2007
New Revision: 43238
URL: http://llvm.org/viewvc/llvm-project?rev=43238view=rev
Log:
Finish up expr codegen.
Modified:
llvm/trunk/docs/tutorial/LangImpl3.html
Modified: llvm/trunk/docs/tutorial/LangImpl3.html
URL:
Author: lattner
Date: Mon Oct 22 23:27:44 2007
New Revision: 43237
URL: http://llvm.org/viewvc/llvm-project?rev=43237view=rev
Log:
several improvements suggested by Dan, thanks!
Modified:
llvm/trunk/docs/tutorial/LangImpl2.html
llvm/trunk/docs/tutorial/LangImpl3.html
Modified:
Author: lattner
Date: Tue Oct 23 00:43:01 2007
New Revision: 43239
URL: http://llvm.org/viewvc/llvm-project?rev=43239view=rev
Log:
Fix up a broken #include, move code to its own section, add conclusions.
Modified:
llvm/trunk/docs/tutorial/LangImpl2.html
Modified:
29 matches
Mail list logo
