[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp added (r1.1) --- Log message: Add a new home for TargetLowering member functions. --- Diffs of the changes: (+40 -0) TargetLowering.cpp | 40 1 files changed, 40 insertions(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp (r1.1) removed --- Log message: Remove this file. It was inadvertently added because I could not find TargetLowering.cpp in CodeGen/SelectionDAG (location makes no sense to me) --- Diffs of the changes: (+0 -0) 0 files changed

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.69 - 1.70 --- Log message: Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail. --- Diffs of the changes: (+1 -1) TargetLowering.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.67 - 1.68 --- Log message: TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts. --- Diffs of the changes: (+11 -6) TargetLowering.cpp | 17 +++-- 1 files changed, 11

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.68 - 1.69 --- Log message: Port some bugfixes in shift handling from SimplifyDemandedBits over to ComputeMaskedBits. DemandedMasks and KnownZero/One masks should never have bits set out of the range of the base datatype.

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.66 - 1.67 --- Log message: Start on my todo list --- Diffs of the changes: (+2 -2) TargetLowering.cpp |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.64 - 1.65 --- Log message: Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal. --- Diffs of the changes: (+2 -2) TargetLowering.cpp |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.65 - 1.66 --- Log message: Another typo. Pointed out by Nate Begeman. --- Diffs of the changes: (+1 -1) TargetLowering.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.62 - 1.63 --- Log message: Move this code to a common place --- Diffs of the changes: (+265 -0) TargetLowering.cpp | 265 + 1 files changed, 265 insertions(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.63 - 1.64 --- Log message: this should be 128 I think --- Diffs of the changes: (+1 -1) TargetLowering.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.61 - 1.62 --- Log message: Refactor a bunch of includes so that TargetMachine.h doesn't have to include TargetData.h. This should make recompiles a bit faster with my current TargetData tinkering. --- Diffs of the changes:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.60 - 1.61 --- Log message: When tracking demanded bits, if any bits from the sext of an SRA are demanded, then so is the input sign bit. This fixes mediabench/g721 on X86. --- Diffs of the changes: (+8 -2)

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.56 - 1.57 --- Log message: Add some really really simple code for computing sign-bit propagation. This will certainly be enhanced in the future. --- Diffs of the changes: (+95 -0) TargetLowering.cpp | 95

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.59 - 1.60 --- Log message: Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us to handle all kinds of stuff, including silly things like: sextinreg(setcc,i16) - setcc. --- Diffs of the changes:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.54 - 1.55 --- Log message: Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE --- Diffs of the changes: (+18 -0) TargetLowering.cpp | 18 ++ 1 files changed, 18 insertions(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.55 - 1.56 --- Log message: Fold (trunc (srl x, c)) - (srl (trunc x), c) --- Diffs of the changes: (+32 -0) TargetLowering.cpp | 32 1 files changed, 32 insertions(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp TargetMachine.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.53 - 1.54 TargetMachine.cpp updated: 1.43 - 1.44 --- Log message: Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.52 - 1.53 --- Log message: relax assertion --- Diffs of the changes: (+4 -1) TargetLowering.cpp |5 - 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.48 - 1.49 --- Log message: Implement TargetLowering::getPackedTypeBreakdown --- Diffs of the changes: (+41 -0) TargetLowering.cpp | 41 + 1 files changed, 41 insertions(+)

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.49 - 1.50 --- Log message: Modify the TargetLowering::getPackedTypeBreakdown method to also return the unpromoted element type. --- Diffs of the changes: (+7 -4) TargetLowering.cpp | 11 +++ 1 files changed, 7

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.50 - 1.51 --- Log message: Was returning the wrong type. --- Diffs of the changes: (+5 -4) TargetLowering.cpp |9 + 1 files changed, 5 insertions(+), 4 deletions(-) Index: llvm/lib/Target/TargetLowering.cpp

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.47 - 1.48 --- Log message: Typo --- Diffs of the changes: (+1 -1) TargetLowering.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.46 - 1.47 --- Log message: set TransformToType correctly for vector types. --- Diffs of the changes: (+8 -0) TargetLowering.cpp |8 1 files changed, 8 insertions(+) Index: llvm/lib/Target/TargetLowering.cpp

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.45 - 1.46 --- Log message: Add LSR hooks. --- Diffs of the changes: (+13 -0) TargetLowering.cpp | 13 + 1 files changed, 13 insertions(+) Index: llvm/lib/Target/TargetLowering.cpp diff -u

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.41 - 1.42 --- Log message: Add interfaces for targets to provide target-specific dag combiner optimizations. --- Diffs of the changes: (+8 -0) TargetLowering.cpp |8 1 files changed, 8 insertions(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.38 - 1.39 --- Log message: Just like we use the RHS of an AND to simplify the LHS, use the LHS to simplify the RHS. This allows for the elimination of many thousands of ands from multisource, and compiles

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.39 - 1.40 --- Log message: Check RHS simplification before LHS simplification to avoid infinitely looping on PowerPC/small-arguments.ll --- Diffs of the changes: (+17 -18) TargetLowering.cpp | 35

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.36 - 1.37 --- Log message: Recognize memory operand codes --- Diffs of the changes: (+6 -1) TargetLowering.cpp |7 ++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm/lib/Target/TargetLowering.cpp

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.35 - 1.36 --- Log message: Don't return registers from register classes that aren't legal. --- Diffs of the changes: (+15 -2) TargetLowering.cpp | 17 +++-- 1 files changed, 15 insertions(+), 2 deletions(-)

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.33 - 1.34 --- Log message: Updates to match change of getRegForInlineAsmConstraint prototype --- Diffs of the changes: (+2 -1) TargetLowering.cpp |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.34 - 1.35 --- Log message: split register class handling from explicit physreg handling. --- Diffs of the changes: (+21 -11) TargetLowering.cpp | 32 +--- 1 files changed, 21 insertions(+),

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.32 - 1.33 --- Log message: Add a fold for add that exchanges it with a constant shift if possible, so that the shift may be more easily folded into other operations. --- Diffs of the changes: (+24 -6) TargetLowering.cpp |

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.30 - 1.31 --- Log message: Rework the SelectionDAG-based implementations of SimplifyDemandedBits and ComputeMaskedBits to match the new improved versions in instcombine. Tested against all of multisource/benchmarks on ppc.

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.31 - 1.32 --- Log message: Fix bug noticed by VC++. --- Diffs of the changes: (+2 -2) TargetLowering.cpp |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.29 - 1.30 --- Log message: Rename maxStoresPerMemSet to maxStoresPerMemset, etc. --- Diffs of the changes: (+1 -1) TargetLowering.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.27 - 1.28 --- Log message: Implement some feedback from sabre --- Diffs of the changes: (+5 -5) TargetLowering.cpp | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.28 - 1.29 --- Log message: implementation of some methods for inlineasm --- Diffs of the changes: (+41 -1) TargetLowering.cpp | 42 +- 1 files changed, 41 insertions(+), 1

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.25 - 1.26 --- Log message: Implement MaskedValueIsZero for ANY_EXTEND nodes --- Diffs of the changes: (+5 -0) TargetLowering.cpp |5 + 1 files changed, 5 insertions(+) Index: llvm/lib/Target/TargetLowering.cpp

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.24 - 1.25 --- Log message: Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use. --- Diffs of the changes: (+10 -3) TargetLowering.cpp | 13 ++--- 1 files

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.21 - 1.22 --- Log message: clean up interface to ValueTypeActions --- Diffs of the changes: (+3 -3) TargetLowering.cpp |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.22 - 1.23 --- Log message: adjust prototype --- Diffs of the changes: (+2 -1) TargetLowering.cpp |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Target/TargetLowering.cpp diff -u

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.23 - 1.24 --- Log message: Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. --- Diffs of the changes:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.20 - 1.21 --- Log message: Implement a method for inline asm support --- Diffs of the changes: (+17 -0) TargetLowering.cpp | 17 + 1 files changed, 17 insertions(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.18 - 1.19 --- Log message: Set SchedulingForLatency to be the default scheduling preference for all. --- Diffs of the changes: (+1 -0) TargetLowering.cpp |1 + 1 files changed, 1 insertion(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.19 - 1.20 --- Log message: initialize an instance var, apparently I forgot to commit this long ago --- Diffs of the changes: (+1 -0) TargetLowering.cpp |1 + 1 files changed, 1 insertion(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.15 - 1.16 --- Log message: Added a hook to print out names of target specific DAG nodes. --- Diffs of the changes: (+3 -0) TargetLowering.cpp |3 +++ 1 files changed, 3 insertions(+) Index:

[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp

Changes in directory llvm/lib/Target: TargetLowering.cpp updated: 1.13 - 1.14 --- Log message: Rather than attempting to legalize 1 x float, make sure the SD ISel never generates it. Make MVT::Vector expand-only, and remove the code in Legalize that attempts to legalize it. The plan for