Hello,
I've got good news. Few days ago I tried to contact once again Epson
Electronics (last time I tried got no reply) and today I got nice 126
pages long specification PDF with register description and other
programming information. If someone is interested, let me know. I was
not told to keep it secret or anything so I guess I can resend it to
people interested. Not sure if putting it freely to website isn't too much.
Looks like the rotation mode is two lowest bits in one register at
offset 34h
00 0 degrees(Normal)
01 90 degrees
10 180 degrees
11 270 degrees
and in theory can be simply enabled and all display updates are
transparently rotated. I'll try it.
It also looks like there is register (offset 58h) which contains display
(vertical) blank timing information - 2 read only bits (number 7 and 6)
- bit contains 1 when display is in vertical/horizontal non-display
period. Also the chip has TE (tearing effect) output pin which can be
configured to signal this condition but it is hard to say whether it can
triger interrupt or whether it is connected to anything at all in N770.
But still it can be possible to check these bits (mainly the vertical
one) in register and try to synchronize display updates with it to
minimize tearing.
There is also double buffering functionality but it works only in lower
resolutions, not 800x480 (as there is no memory for 2 buffers) and I
guess LCD supports only 800x480. Maybe timing for one line can be
doubled to have 400x480 and then enable double buffering? Probably not.
Frantisek
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