Module: Mesa Branch: main Commit: 3009dcd1023a5c29cc61fcc576feac132653c4ae URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3009dcd1023a5c29cc61fcc576feac132653c4ae
Author: Rhys Perry <pendingchao...@gmail.com> Date: Thu Jan 4 15:14:56 2024 +0000 aco: correctly set min/max_subgroup_size for wave32-as-wave64 Signed-off-by: Rhys Perry <pendingchao...@gmail.com> Reviewed-by: Daniel Schürmann <dan...@schuermann.dev> Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26894> --- src/amd/compiler/aco_instruction_selection_setup.cpp | 8 ++------ src/amd/compiler/aco_shader_info.h | 1 - src/amd/vulkan/radv_aco_shader_info.h | 1 - 3 files changed, 2 insertions(+), 8 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index eac1c6c5f06..72fffc87167 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -293,12 +293,8 @@ init_context(isel_context* ctx, nir_shader* shader) /* Init NIR range analysis. */ ctx->range_ht = _mesa_pointer_hash_table_create(NULL); - ctx->ub_config.min_subgroup_size = 64; - ctx->ub_config.max_subgroup_size = 64; - if (ctx->shader->info.stage == MESA_SHADER_COMPUTE && ctx->program->info.cs.subgroup_size) { - ctx->ub_config.min_subgroup_size = ctx->program->info.cs.subgroup_size; - ctx->ub_config.max_subgroup_size = ctx->program->info.cs.subgroup_size; - } + ctx->ub_config.min_subgroup_size = ctx->program->wave_size; + ctx->ub_config.max_subgroup_size = ctx->program->wave_size; ctx->ub_config.max_workgroup_invocations = 2048; ctx->ub_config.max_workgroup_count[0] = 65535; ctx->ub_config.max_workgroup_count[1] = 65535; diff --git a/src/amd/compiler/aco_shader_info.h b/src/amd/compiler/aco_shader_info.h index 847bda02751..e6ff2c8a5f7 100644 --- a/src/amd/compiler/aco_shader_info.h +++ b/src/amd/compiler/aco_shader_info.h @@ -180,7 +180,6 @@ struct aco_shader_info { struct ac_arg alpha_reference; } ps; struct { - uint8_t subgroup_size; bool uses_full_subgroups; } cs; diff --git a/src/amd/vulkan/radv_aco_shader_info.h b/src/amd/vulkan/radv_aco_shader_info.h index 6f8f180ff82..34b900e9690 100644 --- a/src/amd/vulkan/radv_aco_shader_info.h +++ b/src/amd/vulkan/radv_aco_shader_info.h @@ -58,7 +58,6 @@ radv_aco_convert_shader_info(struct aco_shader_info *aco_info, const struct radv ASSIGN_FIELD(tcs.num_linked_patch_outputs); ASSIGN_FIELD(tcs.tcs_vertices_out); ASSIGN_FIELD(ps.num_interp); - ASSIGN_FIELD(cs.subgroup_size); ASSIGN_FIELD(cs.uses_full_subgroups); aco_info->ps.spi_ps_input_ena = radv->ps.spi_ps_input; aco_info->ps.spi_ps_input_addr = radv->ps.spi_ps_input;
