On 10/03/2012 05:59 PM, Oliver McFadden wrote:
Discovered while attempting to run GLBenchMark 2.5 with test
GLB25_TriangleTexVertexLitTestC24Z16 on an ES2.0 context.
Ouch :( Nice catch.
I have changed the `if' condition in setup_glsl_generate_mipmap() such
that it is consistent throughout
Hi, Gallium Hackers,
We are working on Gallium3D on android-x86, APU. We want to run general
compute programs on r600 GPU, specifically, Radeon HD6310(Evergreen
family).
The first thing drawn our eyes are gallium/tests/trivial/compute.c because
it calls general compute APIs and attempts to
https://bugs.freedesktop.org/show_bug.cgi?id=55599
--- Comment #1 from Fabio Pedretti fabio@libero.it ---
This should be the same as bug #55080, but the error message is slighty
different since this is a 64 bit system rather than 32. This also suggest to
use -fPIC.
--
You are receiving this
On Wed, Oct 03, 2012 at 07:54:50PM -0700, Matt Turner wrote:
mesa: setup_glsl_generate_mipmap(): meta program compile failed
This is not a commit title. After reading the title, I should have at
least some idea of what the commit does. Pasting the error tells me
nothing.
I'd include Mesa's
On Wed, Oct 03, 2012 at 09:31:39PM -0700, Kenneth Graunke wrote:
On 10/03/2012 05:59 PM, Oliver McFadden wrote:
Discovered while attempting to run GLBenchMark 2.5 with test
GLB25_TriangleTexVertexLitTestC24Z16 on an ES2.0 context.
Ouch :( Nice catch.
I have changed the `if' condition
On Tue, Oct 02, 2012 at 04:20:51PM +0300, Negreanu, Adrian M wrote:
On Tue, Oct 2, 2012 at 3:01 PM, Tapani Pälli tapani.pa...@intel.com wrote:
commit a010215463c63680c69e90202fe3fcd2e5b25fa6 removed ES2 specific
dispatch
table and remap_helper, since now we are using dispatch.h which is
On Thu, Oct 4, 2012 at 1:58 PM, Oliver McFadden
oliver.mcfad...@linux.intel.com wrote:
On Tue, Oct 02, 2012 at 04:20:51PM +0300, Negreanu, Adrian M wrote:
On Tue, Oct 2, 2012 at 3:01 PM, Tapani Pälli tapani.pa...@intel.com
wrote:
commit a010215463c63680c69e90202fe3fcd2e5b25fa6 removed
On 10/04/2012 02:11 PM, Negreanu, Adrian M wrote:
On Thu, Oct 4, 2012 at 1:58 PM, Oliver McFadden
oliver.mcfad...@linux.intel.com
mailto:oliver.mcfad...@linux.intel.com wrote:
On Tue, Oct 02, 2012 at 04:20:51PM +0300, Negreanu, Adrian M wrote:
On Tue, Oct 2, 2012 at 3:01 PM,
Note the blocks of the `if-else' statement are swapped; the functional
change is only inside the condition of the `if' statement.
Signed-off-by: Oliver McFadden oliver.mcfad...@linux.intel.com
---
src/mesa/drivers/common/meta.c | 46
1 files changed, 23
CC: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Oliver McFadden oliver.mcfad...@linux.intel.com
---
src/mesa/drivers/common/meta.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index
On Thu, Oct 04, 2012 at 02:18:44PM +0300, Tapani Pälli wrote:
On 10/04/2012 02:11 PM, Negreanu, Adrian M wrote:
On Thu, Oct 4, 2012 at 1:58 PM, Oliver McFadden
oliver.mcfad...@linux.intel.com
mailto:oliver.mcfad...@linux.intel.com wrote:
On Tue, Oct 02, 2012 at 04:20:51PM
Hi All,
After receiving a fair bit of feedback (thanks!), I've updated the
EGL_EXT_image_dma_buf_import spec
and expanded it to resolve a number of the issues. Please find the latest draft
below and let me
know any additional feedback you might have, either on the lists or by private
e-mail -
Hi Rob,
-Original Message-
From: robdcl...@gmail.com [mailto:robdcl...@gmail.com] On Behalf Of Rob Clark
Sent: 03 October 2012 13:39
To: Maarten Lankhorst
Cc: Tom Cooksey; mesa-dev@lists.freedesktop.org;
linaro-mm-...@lists.linaro.org; dri-
de...@lists.freedesktop.org; Jesse
On Wed, Oct 03, 2012 at 08:15:07PM +0800, Liu Xin wrote:
Hi, Gallium Hackers,
We are working on Gallium3D on android-x86, APU. We want to run general
compute programs on r600 GPU, specifically, Radeon HD6310(Evergreen
family).
The first thing drawn our eyes are
The generated td files won't initially show up in the *.td depend, which
opens up a small race in which parallel build can fail.
Signed-off-by: Maarten Lankhorst maarten.lankho...@canonical.com
---
diff --git a/src/gallium/drivers/radeon/Makefile
b/src/gallium/drivers/radeon/Makefile
index
On 10/02/2012 05:00 PM, Ivan Kalvachev wrote:
Hello,
I would like to make a request.
Would you kindly change the name of libGL.so.1.2.0 to libGL_mesa.so*
and make all required aliases of libGL.so* as symlinks to it.
The advantages.
1. Binary drivers won't overwrite the mesa library when they
Op 04-10-12 15:50, Maarten Lankhorst schreef:
The generated td files won't initially show up in the *.td depend, which
opens up a small race in which parallel build can fail.
Seems the upstream fix cebbdd4ac23725 wasn't pushed to 9.0 branch yet.
~Maarten
On Wed, Oct 3, 2012 at 5:50 PM, Marek Olšák mar...@gmail.com wrote:
The decompression is done in-place and only the compressed tiles are
decompressed. Note: R6xx-R7xx can do that only with Z16 and Z32F.
The texture unit is programmed to use non-displayable tiling and depth
ordering of
On 4 October 2012 03:43, Oliver McFadden oliver.mcfad...@linux.intel.comwrote:
On Wed, Oct 03, 2012 at 07:54:50PM -0700, Matt Turner wrote:
mesa: setup_glsl_generate_mipmap(): meta program compile failed
This is not a commit title. After reading the title, I should have at
least some
On Thu, Oct 04, 2012 at 10:42:45PM +0800, Liu Xin wrote:
Hi, Tom,
thank you for your instant response. we decide to try clover for r600. it
should work on ubuntu(11.10), right?
have you refined tgsi compiler for r600?
Build instructions for clover + r600g are here:
On Thu, Oct 4, 2012 at 10:53 AM, Tom Stellard t...@stellard.net wrote:
On Thu, Oct 04, 2012 at 10:42:45PM +0800, Liu Xin wrote:
Hi, Tom,
thank you for your instant response. we decide to try clover for r600. it
should work on ubuntu(11.10), right?
have you refined tgsi compiler for r600?
On Thu, Oct 4, 2012 at 4:06 PM, Jerome Glisse j.gli...@gmail.com wrote:
On Wed, Oct 3, 2012 at 5:50 PM, Marek Olšák mar...@gmail.com wrote:
The decompression is done in-place and only the compressed tiles are
decompressed. Note: R6xx-R7xx can do that only with Z16 and Z32F.
The texture unit
Hi, Tom,
thank you for your instant response. we decide to try clover for r600. it
should work on ubuntu(11.10), right?
have you refined tgsi compiler for r600?
thanks,
--lx
On Thu, Oct 4, 2012 at 9:42 PM, Tom Stellard t...@stellard.net wrote:
On Wed, Oct 03, 2012 at 08:15:07PM +0800,
On 10/01/2012 03:21 AM, Oliver McFadden wrote:
Signed-off-by: Oliver McFadden oliver.mcfad...@linux.intel.com
CC: Chad Versace chad.vers...@linux.intel.com
---
v2: don't split drv/app debug messages; instead print everything that may be
useful. Suggested by community on mailing list.
The
https://bugs.freedesktop.org/show_bug.cgi?id=55636
Priority: medium
Bug ID: 55636
Assignee: mesa-dev@lists.freedesktop.org
Summary: Debian Wheezy Bad resolution new laptop i7 (2º
generation)
Severity: major
Oliver McFadden oliver.mcfad...@linux.intel.com writes:
You should really signoff your patches; for example:
git commit -a -s
Signed-off-by is Linux kernel process, not Mesa process.
pgpMonww96JYP.pgp
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___
mesa-dev mailing
Kenneth Graunke kenn...@whitecape.org writes:
On 10/02/2012 07:52 PM, Eric Anholt wrote:
Based on split_virtual_grfs(), we choose the same set every time, so set it
in
stone. This will help us avoid regenerating the somewhat expensive
class/register set setup every compile.
---
Chad Versace chad.vers...@linux.intel.com writes:
I would have used the checked variant of the xcb call,
xcb_dri2_wait_xbc, and then returned 1 if an error had occured. Why
did you choose to use the unchecked variant?
I'm aware that the old DRI2WaitSBC also always blindly returned
success,
Matt Turner matts...@gmail.com writes:
No one tests yacc/byacc. Let's just request bison specifically.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46815
These two are
Reviewed-by: Eric Anholt e...@anholt.net
pgpAvIIEWS2ZI.pgp
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Rob Bradford r...@robster.org.uk writes:
From: Rob Bradford r...@linux.intel.com
413c49141 added an optimisation to improve the performance of teximage under a
limited set of circumstances. If GL_EXT_unpack_subimage has been used then we
we must also skip this optimisation since the
On 10/01/2012 04:25 PM, Oliver McFadden wrote:
On Mon, Oct 01, 2012 at 02:55:31PM -0700, Kenneth Graunke wrote:
On 10/01/2012 02:35 PM, Eric Anholt wrote:
Oliver McFadden oliver.mcfad...@linux.intel.com writes:
diff --git a/src/mesa/drivers/dri/intel/intel_context.c
Hi,
RFC and consideration.. Specify MCJit for ppc64.
- Per commentary and direction in the llvm community, support for ppc64
is going into MCJIT rather than the old JIT. There is no existing
support in prior llvm versions, so no need to specify LLVM version
numbers.
Signed-off-by: Will
Chad Versace chad.vers...@linux.intel.com writes:
On 10/01/2012 04:25 PM, Oliver McFadden wrote:
On Mon, Oct 01, 2012 at 02:55:31PM -0700, Kenneth Graunke wrote:
On 10/01/2012 02:35 PM, Eric Anholt wrote:
Oliver McFadden oliver.mcfad...@linux.intel.com writes:
diff --git
No idea why this is #ifdef'd. Trace and Noop are definitely useful no matter
how Mesa is built.
---
.../auxiliary/target-helpers/inline_debug_helper.h |8
1 file changed, 8 deletions(-)
diff --git a/src/gallium/auxiliary/target-helpers/inline_debug_helper.h
John Kåre Alsaker john.kare.alsa...@gmail.com writes:
I would like add support for sRGB KHR images to EGL. This is primarily
so Wayland compositors can create sRGB views of client buffers, but
there's nothing preventing it from being useful in other cases.
To allow this I propose a new EGL
This is super basic, but it let me visualize a problem I had with
opt_compute_to_mrf().
---
src/mesa/drivers/dri/i965/brw_context.h |8 +++
src/mesa/drivers/dri/i965/brw_disasm.c |7 +--
src/mesa/drivers/dri/i965/brw_vec4.cpp | 83 +++
This will let us reuse brw_fs_cfg.cpp from brw_vec4_*.
---
src/mesa/drivers/dri/i965/brw_fs.cpp |1 -
src/mesa/drivers/dri/i965/brw_fs.h | 14 +++---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |1 -
src/mesa/drivers/dri/i965/brw_shader.h | 25
This should improve our ability to register allocate without spilling.
Unfortuantely, due to the live variable analysis being ignorant of loops, we
still have register allocation failures on some programs.
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 54 +++
---
src/mesa/drivers/dri/i965/Makefile.sources |2 +-
src/mesa/drivers/dri/i965/brw_cfg.cpp | 250
src/mesa/drivers/dri/i965/brw_cfg.h| 101
src/mesa/drivers/dri/i965/brw_fs_cfg.cpp | 250
fs_bblock_link - bblock_link
fs_bblock - bblock_t (to avoid conflicting with all the fs_bblock *bblock)
fs_cfg - cfg_t (to avoid conflicting with all the fs_cfg *cfg)
---
src/mesa/drivers/dri/i965/brw_cfg.cpp | 44 ++--
src/mesa/drivers/dri/i965/brw_cfg.h
---
src/mesa/drivers/dri/i965/brw_cfg.cpp | 20 ++--
src/mesa/drivers/dri/i965/brw_cfg.h|6 +++---
.../drivers/dri/i965/brw_fs_copy_propagation.cpp |2 +-
src/mesa/drivers/dri/i965/brw_fs_cse.cpp |2 +-
For tracking live variables, we want to know when a register is completely
rewritten, so we need to be able to compare a writemask to the size of the
register. There's also potential use for this in register coalescing.
---
src/mesa/drivers/dri/i965/brw_vec4.cpp |4 +--
These messages always have m0 = g0 and m1 = offset, and write has m2 = data.
Avoids regression in opt_compute_to_mrf() in next commit.
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
We're always doing it for an immediately preceding instruction, and we can
make that instruction write directly into the MRF instead of using a
temporary.
Along with reducing instructions, it avoids confusing the upcoming live
variables code (which saw our use of all channels of the temporary
Note that BRW_PREDICATE_NONE is 0 and BRW_PREDICATE_NORMAL is 1, so that's a
lot like the true/false we had in the FS before.
---
src/mesa/drivers/dri/i965/brw_cfg.cpp|4 ++--
src/mesa/drivers/dri/i965/brw_fs.cpp | 18 +-
This is derived from the FS visitor code for the same, but tracks each channel
separately (otherwise, some typical fill-a-channel-at-a-time patterns would
produce excessive live intervals across loops and produce spilling).
---
src/mesa/drivers/dri/i965/Makefile.sources |1 +
On 10/01/2012 03:43 PM, Paul Berry wrote:
Previously, we considered all registers as candidates for spilling.
This was counterproductive--for any registers that have already been
removed from the interference graph, there is no benefit to spilling
them, since they don't contribute to register
Out of curiousity is mcjit for ppc64 somewhat working already?
But otherwise looks good to me.
Roland
Am 04.10.2012 23:25, schrieb Will Schmidt:
Hi,
RFC and consideration.. Specify MCJit for ppc64.
- Per commentary and direction in the llvm community, support for ppc64
is going into
On 10/04/2012 01:38 PM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
I would have used the checked variant of the xcb call,
xcb_dri2_wait_xbc, and then returned 1 if an error had occured. Why
did you choose to use the unchecked variant?
I'm aware that the old
On 10/04/2012 02:37 PM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
On 10/01/2012 04:25 PM, Oliver McFadden wrote:
On Mon, Oct 01, 2012 at 02:55:31PM -0700, Kenneth Graunke wrote:
On 10/01/2012 02:35 PM, Eric Anholt wrote:
Oliver McFadden
If glxgears is started on a bare X server without a window manager, it does not
get a ConfigureNotify event. This means that the only time the viewport is
initialized is in main, when it calls reshape(winWidth, winHeight). This does
not take the size mangling caused by -fullscreen into account,
From: Tom Stellard thomas.stell...@amd.com
If an instruction reads from a constant register that contains
immediates using an invalid swizzle, we can avoid generating MOV
instructions to fix up the swizzle by loading the immediates into a
different constant register that can be read using a valid
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