On Tue, Oct 1, 2013 at 12:16 PM, Kenneth Graunke kenn...@whitecape.org wrote:
On 09/30/2013 07:16 PM, Ian Romanick wrote:
On 09/11/2013 10:00 PM, Chia-I Wu wrote:
From: Chia-I Wu o...@lunarg.com
Replicate the gradient of the top-left pixel to the other three pixels in
the
subspan, as how
On 09/30/2013 10:54 PM, Chia-I Wu wrote:
From: Chia-I Wu o...@lunarg.com
Consider only the top-left and top-right pixels to approximate DDX in a 2x2
subspan, unless the application requests a more accurate approximation via
GL_FRAGMENT_SHADER_DERIVATIVE_HINT or this optimization is disabled
I don't know if this really matters or not, but I managed to answer my question:
for i965, there is a chain of calls so that _mesa_install_exec_vtxfmt() is
called at context creation,
which sets both Exec and BeginEnd (for compatibility profiles) to the value as
found in vbo_context#exec.
I already fixed this in master:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=028b26e2efa7485fb7a5dd9be681074a36f9e442
Marek
On Mon, Sep 30, 2013 at 11:46 PM, Vincent Lejeune v...@ovi.com wrote:
---
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 3 ++-
1 file changed, 2
On Mon, Sep 30, 2013 at 10:44 PM, Eric Anholt e...@anholt.net wrote:
The previous interface relied on a static struct, which meant tha the
driver didn't get a chance to edit the struct before the struct got used.
For megadrivers, I want to return a variable struct based on what driver
is
Am 01.10.2013 03:57, schrieb Roland Mainz:
On Tue, Oct 1, 2013 at 3:43 AM, Ian Romanick i...@freedesktop.org wrote:
On 09/30/2013 05:47 PM, Roland Mainz wrote:
On Tue, Oct 1, 2013 at 2:27 AM, Ian Romanick i...@freedesktop.org wrote:
On 09/27/2013 04:46 PM, Kenneth Graunke wrote:
This was only
On 13-09-28 04:23 PM, Emil Velikov wrote:
On 28/09/13 20:00, Gaetan Nadon wrote:
The EGL library has some references to x11 but it gets the link flags
from the XCB_DRI2_LIBS iff HAVE_EGL_PLATFORM_X11 is true.
s/iff/if/
The X11_LIBS variable was probably coming from a PKG_CHECK_MODULES (x11)
On Mon, Sep 30, 2013 at 07:55:34AM -0700, Tom Stellard wrote:
On Sat, Sep 28, 2013 at 03:01:15PM +0100, Emil Velikov wrote:
On 28/09/13 04:48, Tom Stellard wrote:
On Sun, Sep 22, 2013 at 09:29:28PM +0100, Emil Velikov wrote:
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
As
Fixes build errors.
Signed-off-by: Alex Deucher alexander.deuc...@amd.com
---
src/gallium/state_trackers/xorg/xorg_crtc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/state_trackers/xorg/xorg_crtc.c
b/src/gallium/state_trackers/xorg/xorg_crtc.c
index 3cbffb5..0ab41b4 100644
On 10/01/2013 09:16 AM, Alex Deucher wrote:
Fixes build errors.
Signed-off-by: Alex Deucher alexander.deuc...@amd.com
---
src/gallium/state_trackers/xorg/xorg_crtc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/state_trackers/xorg/xorg_crtc.c
https://bugs.freedesktop.org/show_bug.cgi?id=70009
Priority: medium
Bug ID: 70009
Assignee: mesa-dev@lists.freedesktop.org
Summary: [bisected] some apps wine apps renders black
Severity: normal
Classification: Unclassified
https://bugs.freedesktop.org/show_bug.cgi?id=70009
Pavel Ondračka pavel.ondra...@email.cz changed:
What|Removed |Added
Summary|[bisected] some apps wine |[bisected] some
On 09/30/2013 10:11 PM, Kenneth Graunke wrote:
On 09/30/2013 05:16 PM, Ian Romanick wrote:
On 09/27/2013 04:45 PM, Kenneth Graunke wrote:
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_context.c | 10 +++---
On 09/30/2013 10:54 PM, Chia-I Wu wrote:
From: Chia-I Wu o...@lunarg.com
I agree with both of Ken's comments. With those fixed, this patch is
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Consider only the top-left and top-right pixels to approximate DDX in a 2x2
subspan, unless the
Fixes regression on r600g due to fast clear introduced by commit
edbbfac6.
---
src/gallium/state_trackers/egl/x11/native_dri2.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/gallium/state_trackers/egl/x11/native_dri2.c
b/src/gallium/state_trackers/egl/x11/native_dri2.c
With those fixes:
Reviewed-by: Chris Forbes chr...@ijw.co.nz
On Wed, Oct 2, 2013 at 6:38 AM, Ian Romanick i...@freedesktop.org wrote:
On 09/30/2013 10:54 PM, Chia-I Wu wrote:
From: Chia-I Wu o...@lunarg.com
I agree with both of Ken's comments. With those fixed, this patch is
Reviewed-by:
UVD can only support NV12 in the case of hardware decoding, but we
can still use all other formats for software decoding. Use the UNKNOWN
entrypoint to signal that we're not interesting in hardware decoding.
---
src/gallium/drivers/radeon/radeon_uvd.c | 7 +--
MPEG-2 and later video standards align the chroma sample position
horizontally with the leftmost luma sample position. Add a half-texel
offset to the chroma texture sampling coordinate to sample at the
this position instead of sampling in the center between the luma
texels. This avoids minor color
On Tue, Oct 1, 2013 at 3:06 PM, Grigori Goronzy g...@chown.ath.cx wrote:
UVD can only support NV12 in the case of hardware decoding, but we
can still use all other formats for software decoding. Use the UNKNOWN
entrypoint to signal that we're not interesting in hardware decoding.
FYI, in
Previously, we computed dFdy() using the following instruction:
add(8) dst1F src4,4,0)F -src.24,4,0F { align1 1Q }
That had the disadvantage that it computed the same value for all 4
pixels of a 2x2 subspan, which meant that it was less accurate than
dFdx(). This patch changes it to the
Thanks, I'll commit this.
BTW, I don't like that st/egl re-implements what st/dri does. It's
code duplication and this dri2 backend should be killed with fire and
st/dri should be used instead (with all the necessary modifications to
support non-GL state trackers).
Marek
On Tue, Oct 1, 2013 at
Acked-by: Chris Forbes chr...@ijw.co.nz
On Wed, Oct 2, 2013 at 8:38 AM, Paul Berry stereotype...@gmail.com wrote:
Previously, we computed dFdy() using the following instruction:
add(8) dst1F src4,4,0)F -src.24,4,0F { align1 1Q }
That had the disadvantage that it computed the same value for
On 30/09/13 21:44, Eric Anholt wrote:
Previously, we've split things such that mesa core is in libdricore,
exposing the whole Mesa core interface in the global namespace, and the
i965_dri.so code all links against that. Along with polluting application
namespace terribly, it requires extra
On 09/30/2013 05:45 PM, Ben Widawsky wrote:
After the last patch, we can replace the region allocated in the miptree
creation with a more straightforward (and hopefully smaller resulting)
buffer based on the bspec's allocation formula.
Since I am relatively new to this part of the bspec, I
On 09/30/2013 12:35 PM, Ben Widawsky wrote:
Starting with Ivybridge, the hierarchical had relaxed requirements for
its allocation. Following a simple formula in the bspec was all you
needed to satisfy the requirement.
To prepare the code for this, extract all places where the miptree was
used,
From: Marek Olšák marek.ol...@amd.com
---
src/mesa/main/texgetimage.c| 2 +-
src/mesa/main/texgetimage.h| 3 +++
src/mesa/state_tracker/st_format.c | 35 +++
3 files changed, 39 insertions(+), 1 deletion(-)
diff --git
On 10/01/2013 06:31 AM, Gaetan Nadon wrote:
On 13-09-28 04:23 PM, Emil Velikov wrote:
On 28/09/13 20:00, Gaetan Nadon wrote:
The EGL library has some references to x11 but it gets the link flags
from the XCB_DRI2_LIBS iff HAVE_EGL_PLATFORM_X11 is true.
s/iff/if/
The X11_LIBS variable was
On 30/09/13 21:44, Eric Anholt wrote:
---
configure.ac | 26 +++---
src/mesa/drivers/dri/Makefile.am | 2 ++
src/mesa/drivers/dri/swrast/Makefile.am | 18 +++---
src/mesa/drivers/dri/swrast/Makefile.sources |
On 30/09/13 21:44, Eric Anholt wrote:
Here are the megadrivers changes, after the prep series I posted earlier.
A few tiny updates to the prep series are available in my tree as
megadriver-prep and this series is available as megadrivers-5
FPS improvement on GLB2.7 with INTEL_NO_HW=1:
Michel Dänzer mic...@daenzer.net writes:
On Die, 2013-09-24 at 14:43 +0200, Marek Olšák wrote:
This fixes compressedteximage piglit tests.
+10 piglits
Cc: mesa-sta...@lists.freedesktop.org ?
Reviewed-by: Michel Dänzer michel.daen...@amd.com
In trying to cherry-pick this to stable I found
* This in essence means that Mesa would be
taking control of Haiku's OpenGL kit.
* This works by dispatching renderers from the
OpenGL add-ons directory
---
src/gallium/SConscript | 1 +
src/gallium/targets/libgl-haiku/GLDispatcher.cpp | 72 +++
Am Dienstag, 1. Oktober 2013, 11:16:49 schrieb Alex Deucher:
Fixes build errors.
Signed-off-by: Alex Deucher alexander.deuc...@amd.com
---
src/gallium/state_trackers/xorg/xorg_crtc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/state_trackers/xorg/xorg_crtc.c
In 3DSTATE_DEPTH_BUFFER, we set Width and Height to the miptree slice's
physical dimensions. (Logical and physical dimensions may differ for
multisample surfaces).
However, in SURFACE_STATE, we always set Width and Height to the slice's
logical dimensions. We should do the same for
Ping. Frank, I'm just pinging you because it's been six days since we've
corresponded. Just a reminder in case the last message got lost in an
email flood.
On 09/25/2013 10:18 AM, Chad Versace wrote:
On 07/22/2013 03:54 PM, Frank Henigman wrote: Extend the fast texture upload
from BGRA X-tiled
On Mon, Sep 30, 2013 at 12:35 PM, Ben Widawsky
benjamin.widaw...@intel.com wrote:
Starting with Ivybridge, the hierarchical had relaxed requirements for
its allocation.
This reads badly. How about
The HiZ buffer's allocation requirements were relaxed on Ivybridge.
On Tue, Oct 01, 2013 at 01:06:02PM -0700, Chad Versace wrote:
On 09/30/2013 12:35 PM, Ben Widawsky wrote:
Starting with Ivybridge, the hierarchical had relaxed requirements for
its allocation. Following a simple formula in the bspec was all you
needed to satisfy the requirement.
To prepare
On Tue, Oct 01, 2013 at 03:46:14PM -0700, Matt Turner wrote:
On Mon, Sep 30, 2013 at 12:35 PM, Ben Widawsky
benjamin.widaw...@intel.com wrote:
Starting with Ivybridge, the hierarchical had relaxed requirements for
its allocation.
This reads badly. How about
The HiZ buffer's allocation
On Tue, Oct 01, 2013 at 01:06:02PM -0700, Chad Versace wrote:
On 09/30/2013 12:35 PM, Ben Widawsky wrote:
Starting with Ivybridge, the hierarchical had relaxed requirements for
its allocation. Following a simple formula in the bspec was all you
needed to satisfy the requirement.
To prepare
On Tue, Oct 01, 2013 at 02:43:50PM -0700, Chad Versace wrote:
In 3DSTATE_DEPTH_BUFFER, we set Width and Height to the miptree slice's
physical dimensions. (Logical and physical dimensions may differ for
multisample surfaces).
However, in SURFACE_STATE, we always set Width and Height to the
Second pass at implementing support for ARB_shader_atomic_counters.
I'm only resending those patches that have changed since v1, and a few
new patches are included too (02, 04, 05, 07, 14). As before, the
complete series can be found in the atomic-counters branch of my
repository:
v2: Mark atomic counters as read-only variables. Move offset overlap
code to the linker. Use the contains_atomic() convenience method.
---
src/glsl/ast.h| 15
src/glsl/ast_to_hir.cpp | 57 ++-
src/glsl/ast_type.cpp
v2: Fix GLSL version in which the type became available. Add
contains_atomic() convenience method. Split off atomic counter
comparison error checking to a separate patch that will handle all
opaque types. Include new ir_variable fields for atomic types.
---
src/glsl/ast_to_hir.cpp
And use it to forbid comparisons of opaque operands. According to the
GL 4.2 specification:
Except for array indexing, structure member selection, and
parentheses, opaque variables are not allowed to be operands in
expressions.
---
src/glsl/ast_to_hir.cpp | 4
src/glsl/glsl_types.cpp |
---
src/glsl/ir_builder.cpp | 25 +
src/glsl/ir_builder.h | 8
2 files changed, 33 insertions(+)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index 98b4322..1913c72 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -21,6
And add Gen7 implementation.
v2: Fix off by one error in buffer size calculation.
Reviewed-by: Paul Berry stereotype...@gmail.com
---
src/mesa/drivers/dri/i965/brw_context.h | 7 +
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 35 +++
2 files changed, 37
v2: Represent atomics as GLSL intrinsics.
---
src/glsl/builtin_functions.cpp | 58 +
src/glsl/builtin_variables.cpp | 15 +++
src/glsl/glcpp/glcpp-parse.y| 3 +++
src/glsl/glsl_parser_extras.cpp | 6 +
src/glsl/glsl_parser_extras.h |
Almost a trivial change, it boils down to renaming a few identifiers
so their names still make sense for opaque types other than sampler.
---
src/glsl/opt_function_inlining.cpp | 66 +++---
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git
v2: Use the contains_atomic() convenience method. Add missing check
in fs_visitor::visit(ir_variable *).
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 ++
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_shader.cpp | 1 +
v2: Add comments on the purpose of the auxiliary data structures.
Check for atomic counter overlaps. Use the contains_atomic()
convenience method. Add static assert with the number of expected
shader stages.
---
src/glsl/Makefile.sources | 1 +
src/glsl/link_atomics.cpp | 237
The maximum number of atomic buffer objects is somewhat arbitrary, we
can change it in the future easily if it turns out it's not enough...
v2: Add comments with the relevant mesa dirty bits. Fix usage of
BRW_NEW_UNIFORM_BUFFER in the GS ABO state atom.
Reviewed-by: Paul Berry
The latency information has been obtained empirically from
measurements taken on Haswell and Ivy Bridge.
---
.../drivers/dri/i965/brw_schedule_instructions.cpp | 41 ++
1 file changed, 41 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
This can deal with all the 15 32-bit untyped atomic operations the
hardware supports, but only INC and PREDEC are going to be exposed
through the API for now.
v2: Represent atomics as GLSL intrinsics. Add support for variably
indexed atomic counter arrays.
---
This can deal with all the 15 32-bit untyped atomic operations the
hardware supports, but only INC and PREDEC are going to be exposed
through the API for now.
v2: Represent atomics as GLSL intrinsics. Add support for variably
indexed atomic counter arrays. Fix interaction with fragment
On Mon, Sep 30, 2013 at 10:21 PM, Kenneth Graunke kenn...@whitecape.org wrote:
On 09/27/2013 06:24 PM, Emil Velikov wrote:
On 28/09/13 00:45, Kenneth Graunke wrote:
This series combines brw_context.[ch] and intel_context.[ch],
and cleans up our context creation code quite a bit. A bunch of
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