On Thu, 02 Jan 2014 05:57:46 +0100
Andreas Hartmetz ahartm...@gmail.com wrote:
On Wednesday 01 January 2014 16:58:46 Lauri Kasanen wrote:
@@ -257,6 +258,7 @@ struct radeon_winsys {
unsigned size,
unsigned
On Sun, 15 Dec 2013 12:38:28 +0200
Lauri Kasanen c...@gmx.com wrote:
There is a GLX extension for this behavior, glx_swap_control_tear, which mesa
doesn't
support ATM. But as usual, even after it becomes supported, there will be
thousands
of applications that won't add support for it,
https://bugs.freedesktop.org/show_bug.cgi?id=57372
Dennis Schridde devuran...@gmx.net changed:
What|Removed |Added
CC||devuran...@gmx.net
Patch adds a new virtual function for ir_instruction base class which
has to be implemented by each instruction. This data will be used by the
shader binary cache implementation.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/Makefile.sources | 1 +
src/glsl/ir.h |
Class will be used by the shader binary cache implementation.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/memory_writer.h | 147 +++
1 file changed, 147 insertions(+)
create mode 100644 src/glsl/memory_writer.h
diff --git
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/shaderapi.c | 44 ++--
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index 57511e8..c07b226 100644
---
Class will be used by the shader binary cache implementation.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/memory_map.h | 174 ++
1 file changed, 174 insertions(+)
create mode 100644 src/glsl/memory_map.h
diff --git
Shader binary cache requires this to be able to cache hash data from
the gl_shader_program structure.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/program/hash_table.h | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/program/hash_table.h
These utility functions can be used to (de)serialize gl_shader and
gl_shader_program structures. This makes it possible to implement a
shader compiler cache for individual shaders and functionality required
by OES_get_program_binary extension.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
Binary shader cache needs this to allocate and fill gl_shader symbol table.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/linker.cpp | 2 +-
src/glsl/linker.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
Hi;
Here's another take on the get_program_binary extension. I've rewritten big
chunks of it based on Paul's review and comments earlier. Here's a brief list
out of my head of things changed:
- uses mesa compilation time as verification method for cache, not git sha
- much smaller
Patch adds a string that can be used by binary cache to identify
that shader binaries were generated with exact same Mesa library.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/shader_cache_magic.h | 36
1 file changed, 36 insertions(+)
ir_deserializer can create a gl_shader structure out of binary data, this will
be used by shader binary cache implementation.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/Makefile.sources| 1 +
src/glsl/ir_deserializer.cpp | 979
When the Gallium i965 driver was renamed to ilo the driver descriptor
was never changed. The pipe-loader driver is required to have the same
descriptor name as the driver name, so for consistency change the DRI
driver descriptor to match.
Signed-off-by: st...@snewbury.org.uk
---
Forgot to add signed-off-by...
In trying to get gallium-nine working with the ilo Gallium driver I
noticed there's no ilo pipe-loader driver being built.
This patch simply puts in place the missing pieces.
The driver descriptor is named ilo, rather than i965 as the ilo DRI
driver currently
CC: 10.0 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/radeonsi/radeonsi_pipe.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index 0fec6d5..3ed1029 100644
---
Note: I don't have hardware to test this, but I believe it to be correct.
Found while tracking down a related leak in evergreen context management.
---
src/mesa/drivers/dri/radeon/radeon_common_context.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
CC: 10.0 mesa-sta...@lists.freedesktop.org
---
src/gallium/state_trackers/dri/common/dri_screen.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/gallium/state_trackers/dri/common/dri_screen.c
b/src/gallium/state_trackers/dri/common/dri_screen.c
index 7410dbe..a657249 100644
---
Further valgrind memory leak fixes.
With this series applied, my evergreen (CEDAR) shows 0 bytes of
directly/indirectly/possibly lost memory, and everything that's
still in use at glxgears exit is marked as 'possibly reachable'.
The command used to test is:
valgrind --leak-check=full
ctx-DrawIndirectBuffer wasn't being free'd in _mesa_free_buffer_objects
With this patch, valgrind --leak-check=full glxgears on evergreen (CEDAR)
now shows:
LEAK SUMMARY:
definitely lost: 0 bytes in 0 blocks
indirectly lost: 0 bytes in 0 blocks
possibly lost: 0 bytes in 0 blocks
Erik Faye-Lund kusmab...@gmail.com writes:
Here's a resend of an older patch (original
1379968503-30246-1-git-send-email-kusmab...@gmail.com), this time
with a better commit message, and a similar treatment for
elif-after-else.
Thanks for the commit, Erik.
I've just pushed this out with the
---
src/glsl/builtin_functions.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 840a6c9..18cdb24 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -334,6 +334,12 @@
---
src/glsl/glcpp/glcpp-parse.y| 3 +++
src/glsl/glsl_parser_extras.cpp | 1 +
src/glsl/glsl_parser_extras.h | 2 ++
src/mesa/main/mtypes.h | 1 +
4 files changed, 7 insertions(+)
diff --git a/src/glsl/glcpp/glcpp-parse.y b/src/glsl/glcpp/glcpp-parse.y
index 7edc274..7b07498
---
src/glsl/builtin_functions.cpp | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 95114c8..94ae2a4 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@
---
src/glsl/glsl_parser_extras.cpp | 2 +-
src/mesa/main/extensions.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
index 456ca92..e839caf 100644
--- a/src/glsl/glsl_parser_extras.cpp
+++
---
src/glsl/ir_builder.cpp | 10 ++
src/glsl/ir_builder.h | 3 +++
2 files changed, 13 insertions(+)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp
index 6c49734..31ed191 100644
--- a/src/glsl/ir_builder.cpp
+++ b/src/glsl/ir_builder.cpp
@@ -211,6 +211,16 @@
---
src/glsl/builtin_functions.cpp | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 94ae2a4..f56be0c 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@
---
src/glsl/builtin_functions.cpp | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 18cdb24..95114c8 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@
---
docs/relnotes/10.1.html | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/relnotes/10.1.html b/docs/relnotes/10.1.html
index 778ae6a..1089c71 100644
--- a/docs/relnotes/10.1.html
+++ b/docs/relnotes/10.1.html
@@ -46,6 +46,7 @@ Note: some of the new features are only available with
- Correct typo in predicate function
- Split the patch that introduces ir_builder changes
- Drop trivial min3_expr(), max3_expr(), mid3_expr()
- Thanks to Roland Scheidegger and Mario Rugiero, catch all cases for
evaluation of mid3
- Squash trivial patches.
Tried something to fix my weird mail
---
src/mesa/main/bufferobj.c | 158 ++
src/mesa/main/bufferobj.h | 9 ++-
2 files changed, 165 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index a3d8f24..bad8f90 100644
---
From: Maxence Le Doré Maxence Le Doré
---
src/mesa/main/texobj.c | 40
1 file changed, 40 insertions(+)
diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index d6510fe..bddbc50 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
---
src/mesa/main/texobj.c | 52 ++
src/mesa/main/texobj.h | 3 +++
2 files changed, 55 insertions(+)
diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index bddbc50..66e2fb0 100644
--- a/src/mesa/main/texobj.c
+++
---
src/mesa/main/varray.c | 53 ++
src/mesa/main/varray.h | 3 +++
2 files changed, 56 insertions(+)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 0f38270..cf21770 100644
--- a/src/mesa/main/varray.c
+++
---
src/mesa/main/extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index f0e1858..968b88d 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -112,6 +112,7 @@ static const struct extension
---
src/mapi/glapi/gen/ARB_multi_bind.xml | 57 +
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.xml | 2 ++
src/mesa/main/tests/dispatch_sanity.cpp | 8 +
4 files changed, 68 insertions(+)
create mode 100644
---
src/mesa/main/samplerobj.c | 36
src/mesa/main/samplerobj.h | 2 ++
2 files changed, 38 insertions(+)
diff --git a/src/mesa/main/samplerobj.c b/src/mesa/main/samplerobj.c
index 7285ef5..a219630 100644
--- a/src/mesa/main/samplerobj.c
+++
Paul Berry stereotype...@gmail.com writes:
Note: this change is just invasive enough that it probably shouldn't be
picked over to stable before the 10.0 release. But I recommend picking it
over to stable after the 10.0 release.
It didn't happen before 10.0.1, but I've cherry-picked this over
On Thursday 02 January 2014 10:56:45 Lauri Kasanen wrote:
On Thu, 02 Jan 2014 05:57:46 +0100
Andreas Hartmetz ahartm...@gmail.com wrote:
On Wednesday 01 January 2014 16:58:46 Lauri Kasanen wrote:
@@ -257,6 +258,7 @@ struct radeon_winsys {
---
src/mesa/drivers/dri/i915/i830_state.c | 12
src/mesa/drivers/dri/i965/brw_util.c | 24 +---
2 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i830_state.c
b/src/mesa/drivers/dri/i915/i830_state.c
index
Sound strange if nvidia would had chosen a different
implementation of min/max blending (where even
intel i830 allow factors with min/max blending).
Indeed, the driver doesn't set src and dst factors to ONE
when GL_MIN or GL_MAX are set as blend equation. Maybe
Francisco Jerez (going to ask him)
---
src/mesa/main/blend.c | 3 +++
src/mesa/main/extensions.c | 1 +
src/mesa/main/mtypes.h | 1 +
3 files changed, 5 insertions(+)
diff --git a/src/mesa/main/blend.c b/src/mesa/main/blend.c
index 9e11ca7..4995143 100644
--- a/src/mesa/main/blend.c
+++ b/src/mesa/main/blend.c
@@ -326,6
---
src/mesa/state_tracker/st_atom_blend.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/state_tracker/st_atom_blend.c
b/src/mesa/state_tracker/st_atom_blend.c
index dea50af..7453053 100644
--- a/src/mesa/state_tracker/st_atom_blend.c
+++
---
src/mesa/drivers/dri/r200/r200_state.c | 16
1 file changed, 16 insertions(+)
diff --git a/src/mesa/drivers/dri/r200/r200_state.c
b/src/mesa/drivers/dri/r200/r200_state.c
index ee7b945..db232f6 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++
... where it can be.
---
src/mesa/drivers/dri/i915/intel_extensions.c | 1 +
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
src/mesa/drivers/dri/r200/r200_context.c | 1 +
src/mesa/main/extensions.c | 1 +
src/mesa/state_tracker/st_extensions.c | 1 +
5 files
---
src/mesa/swrast/s_blend.c | 16
1 file changed, 16 insertions(+)
diff --git a/src/mesa/swrast/s_blend.c b/src/mesa/swrast/s_blend.c
index 1037b62..59ffa7a 100644
--- a/src/mesa/swrast/s_blend.c
+++ b/src/mesa/swrast/s_blend.c
@@ -767,6 +767,16 @@ blend_general_float(struct
On Thu, Jan 2, 2014 at 8:18 PM, Maxence Le Doré
maxence.led...@gmail.com wrote:
Sound strange if nvidia would had chosen a different
implementation of min/max blending (where even
intel i830 allow factors with min/max blending).
Indeed, the driver doesn't set src and dst factors to ONE
when
On Wed, Jan 1, 2014 at 3:57 PM, Lauri Kasanen c...@gmx.com wrote:
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index 28921be..2c33ddf 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++
On 2 December 2013 11:39, Francisco Jerez curroje...@riseup.net wrote:
diff --git a/src/mesa/drivers/dri/i965/brw_surface_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_surface_visitor.cpp
new file mode 100644
index 000..07511b5
--- /dev/null
+++
On Thu, Jan 2, 2014 at 10:39 PM, Steven Newbury st...@snewbury.org.uk wrote:
Forgot to add signed-off-by...
In trying to get gallium-nine working with the ilo Gallium driver I
noticed there's no ilo pipe-loader driver being built.
This patch simply puts in place the missing pieces.
The
Will full PPGTT support it can be assumed that every file descriptor
gets its own hardware context. As such, there is no need to allocate
anew context in order to use the features provided by hardware contexts.
Eliminating this extra context allocation saves both physical memory
(currently PPGTT
When the depth buffer is already cleared, skip GEN6_HIZ_OP_DEPTH_CLEAR. This
is made possible by tracking which slices have been cleared in
struct intel_mipmap_level. The hiz_cleared flag is unset when the depth
buffer is rendered to or when a HiZ resolve is needed.
For Unigine Tropics, the FPS
On Fri, Dec 27, 2013 at 7:25 AM, Chad Versace
chad.vers...@linux.intel.com wrote:
On 12/10/2013 09:54 PM, Chia-I Wu wrote:
When the depth buffer is already cleared, skip GEN6_HIZ_OP_DEPTH_CLEAR.
This
is made possible by tracking which slices have been cleared in
struct intel_mipmap_level.
Hello;
Patch changes gl_uniform_storage to include a data container for misc
variables. This makes serilization of the storage easier. Patch is similar
to changes made earlier for ir_variable but smaller in amount of changes.
Here's a branch of oes_get_program_binary that benefits from this
Data section helps serialization of gl_uniform_storage which is required
for binary shader cache implementation, no functional changes.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/ir_uniform.h | 132 +
src/glsl/link_atomics.cpp
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