[Mesa-dev] [PATCH 0/9] Some egl/wayland patches

Since gallium egl state tracker was dropped, there was no way to use swrast with wayland, since it was not implemented for egl_dri2. https://bugs.freedesktop.org/show_bug.cgi?id=86701 This patch serie aimed at implementing swrast support for the wayland egl_dri2 backend. But I also went at fixing

[Mesa-dev] [PATCH 7/9] egl/wayland: assume EGL_WINDOW_BIT

Only EGL_WINDOW_BIT is supported. Remove tests related. Signed-off-by: Axel Davy axel.d...@ens.fr --- src/egl/drivers/dri2/platform_wayland.c | 38 +++-- 1 file changed, 13 insertions(+), 25 deletions(-) diff --git a/src/egl/drivers/dri2/platform_wayland.c

[Mesa-dev] [PATCH 8/9] egl/wayland: Implement swrast support

Signed-off-by: Axel Davy axel.d...@ens.fr --- src/egl/drivers/dri2/egl_dri2.c | 5 +- src/egl/drivers/dri2/egl_dri2.h | 4 + src/egl/drivers/dri2/platform_wayland.c | 704 +++- 3 files changed, 696 insertions(+), 17 deletions(-) diff --git

[Mesa-dev] [PATCH 6/9] egl/x11: move dri2_x11_swrast_create_image_khr to egl_dri2_fallback.h

Signed-off-by: Axel Davy axel.d...@ens.fr --- src/egl/drivers/dri2/egl_dri2_fallbacks.h | 9 + src/egl/drivers/dri2/platform_x11.c | 11 +-- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/egl/drivers/dri2/egl_dri2_fallbacks.h

[Mesa-dev] [PATCH 4/9] egl/wayland: Add support for render-nodes

It is possible the server advertises a render-node. In that case no authentication is needed, and Gem names are forbidden. Signed-off-by: Axel Davy axel.d...@ens.fr --- src/egl/drivers/dri2/egl_dri2.h | 1 + src/egl/drivers/dri2/platform_wayland.c | 58 +++--

[Mesa-dev] [PATCH 1/9] egl/wayland: properly destroy wayland objects

the wl_registry and the wl_queue allocated weren't destroyed. Signed-off-by: Axel Davy axel.d...@ens.fr --- src/egl/drivers/dri2/egl_dri2.c | 2 ++ src/egl/drivers/dri2/platform_wayland.c | 5 - 2 files changed, 6 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 9/9] egl/swrast: enable config extension for swrast

Enables to use dri config for swrast, like vblank_mode. Signed-off-by: Axel Davy axel.d...@ens.fr --- src/egl/drivers/dri2/egl_dri2.c| 21 ++--- src/gallium/state_trackers/dri/drisw.c | 1 + src/mesa/drivers/dri/swrast/swrast.c | 1 + 3 files changed, 12

[Mesa-dev] [PATCH 2/9] doc/egl: Remove depreciated EGL_SOFTWARE

EGL_SOFTWARE is not supported anywhere in the code, whereas LIBGL_ALWAYS_SOFTWARE is. Signed-off-by: Axel Davy axel.d...@ens.fr --- docs/egl.html | 8 1 file changed, 8 deletions(-) diff --git a/docs/egl.html b/docs/egl.html index d946bb0..3ab1a60 100644 --- a/docs/egl.html +++

[Mesa-dev] [PATCH 20/29] i965/fs: Import image format metadata queries.

Define some utility functions to query the bitfield layout of a given image format and whether it satisfies a number of more or less hardware-specific properties. v2: Drop VEC4 suport. --- src/mesa/drivers/dri/i965/brw_fs_surface_builder.h | 147 + 1 file changed, 147

[Mesa-dev] [PATCH 19/29] i965/fs: Import image memory offset calculation code.

Define a function to calculate the memory address of the image location given by a vector of coordinates. This is required in cases where we need to fall back to untyped surface access, which take a raw memory offset and know nothing about surface coordinates, type conversion or memory tiling and

[Mesa-dev] [PATCH 16/29] i965/fs: Import helpers to convert vectors into arrays and back.

These functions implement the memory layout of a vecN value in a message or return payload. The conversion is not always trivial because the shared unit may not support the SIMD16 or SIMD4x2 vector layouts, requiring splitting the payload in half and merging the reply in the former case, or

[Mesa-dev] [PATCH 23/29] i965/fs: Revisit GLSL IR atomic counter intrinsic translation.

This is a rewrite of the GLSL IR atomic counter intrinsics translation code based on the recently introduced surface builder. v2: Drop VEC4 suport. --- src/mesa/drivers/dri/i965/brw_fs.h | 3 +- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 79 2 files

[Mesa-dev] [PATCH 21/29] i965/fs: Import image format conversion primitives.

Define bitfield packing, unpacking and type conversion operations in terms of which the image format conversion code will be implemented. These don't directly know about image formats: The packing and unpacking functions take a 4-tuple of bit shifts and a 4-tuple of bit widths as arguments,

[Mesa-dev] [PATCH 27/29] i965/fs: Drop unused untyped surface read and atomic emit methods.

--- src/mesa/drivers/dri/i965/brw_fs.h | 7 -- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 12 ++- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 125 ++- 3 files changed, 10 insertions(+), 134 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 28/29] i965: Define implementation constants for ARB_shader_image_load_store.

Reviewed-by: Paul Berry stereotype...@gmail.com v2: Drop VS support pre-Gen8, drop GS support. --- src/mesa/drivers/dri/i965/brw_context.c | 12 1 file changed, 12 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index

[Mesa-dev] [PATCH 26/29] i965/fs: Import GLSL IR memory barrier intrinsic translation code.

v2: Drop VEC4 suport. --- src/mesa/drivers/dri/i965/brw_fs.h | 1 + src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 11 +++ 2 files changed, 12 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index e4f3c25..3b9907e 100644 ---

[Mesa-dev] [PATCH 15/29] i965/fs: Import array utils for the surface message builder.

Define a few transformations on register arrays which will be used frequently during the construction of typed and untyped surface message payloads. Their purpose is simple but the implementation is rather messy, so it makes a lot of sense to factor them out as separate functions. v2: Drop VEC4

[Mesa-dev] i965 implementation of the ARB_shader_image_load_store built-ins. (v2)

This v2 is motivated by the less than enthusiastic reception of my last two series implementing the image load, store and atomic intrinsics in the i965 back-end. It substitutes both. The built-ins are now implemented in the scalar back-end only, what means that IVB and HSW are no longer able to

[Mesa-dev] [PATCH 10/29] i965: Add support for handling image uniforms to the GLSL IR visitors.

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 25 src/mesa/drivers/dri/i965/brw_shader.cpp | 32 ++ src/mesa/drivers/dri/i965/brw_shader.h | 2 ++ src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 23 +- 4 files

[Mesa-dev] [PATCH 03/29] i965: Define consistent interface to disable control flow execution masking.

--- src/mesa/drivers/dri/i965/brw_ir_fs.h | 10 ++ src/mesa/drivers/dri/i965/brw_ir_vec4.h | 9 + 2 files changed, 19 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h index ce23fc5..6c65632 100644 ---

[Mesa-dev] [PATCH 07/29] i965/fs: Introduce FS IR builder.

The purpose of this change is threefold: First, it improves the modularity of the compiler back-end by separating the functionality required to construct an i965 IR program from the rest of the visitor god-object, what in turn will reduce the coupling between other components and the visitor

[Mesa-dev] [PATCH 11/29] i965: Add a visitor method to extract the result of a visit.

This method will be used by the implementation of the image and atomic counter built-ins to extract the result of evaluating its arguments. --- src/mesa/drivers/dri/i965/brw_fs.h | 3 +++ src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 +++ src/mesa/drivers/dri/i965/brw_vec4.h

[Mesa-dev] [PATCH 12/29] i965/fs: Obtain atomic counter locations by recursing through the visitor.

Until now atomic counter built-ins were handled in a way that prevented the visitor from encountering atomic counter IR variables and dereferences directly. With the new intrinsic lowering code it's going to be more convenient to be able to call back into the visitor to let it handle the ugly

[Mesa-dev] [PATCH 06/29] i965: Define consistent interface to enable instruction result saturation.

--- src/mesa/drivers/dri/i965/brw_ir_fs.h | 11 +++ src/mesa/drivers/dri/i965/brw_ir_vec4.h | 11 +++ 2 files changed, 22 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h index db021a5..0874a2c 100644 ---

[Mesa-dev] [PATCH 04/29] i965: Define consistent interface to predicate an instruction.

--- src/mesa/drivers/dri/i965/brw_ir_fs.h | 22 ++ src/mesa/drivers/dri/i965/brw_ir_vec4.h | 22 ++ 2 files changed, 44 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h index 6c65632..9453b5d

[Mesa-dev] [PATCH 09/29] i965: Define the setup_vector_uniform_values() backend_visitor interface.

This cleans up the VEC4 implementation of setup_uniform_values() somewhat and will avoid duplication of the image uniform upload code by having a common interface to upload a vector of uniforms on either back-end. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 12

[Mesa-dev] [PATCH 05/29] i965: Define consistent interface to enable instruction conditional modifiers.

--- src/mesa/drivers/dri/i965/brw_ir_fs.h | 11 +++ src/mesa/drivers/dri/i965/brw_ir_vec4.h | 11 +++ 2 files changed, 22 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h index 9453b5d..db021a5 100644 ---

[Mesa-dev] [PATCH 08/29] i965/vec4: Introduce VEC4 IR builder.

See i965/fs: Introduce FS IR builder. for the rationale. v2: Drop scalarizing VEC4 builder. --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_vec4_builder.h | 579 +++ 2 files changed, 580 insertions(+) create mode 100644

[Mesa-dev] [PATCH 24/29] i965/fs: Revisit NIR atomic counter intrinsic translation.

v2: Drop VEC4 suport. --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 58 +++- 1 file changed, 42 insertions(+), 16 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 555987d..1443ef0 100644 ---

[Mesa-dev] [PATCH 14/29] i965: Lift the constness restriction on surface indices passed to untyped ops.

--- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 8 ++-- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 8 ++-- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4 4 files changed, 12 insertions(+), 12

[Mesa-dev] [PATCH 22/29] i965/fs: Implement image load, store and atomic.

v2: Drop VEC4 suport. --- .../drivers/dri/i965/brw_fs_surface_builder.cpp| 216 + src/mesa/drivers/dri/i965/brw_fs_surface_builder.h | 17 ++ 2 files changed, 233 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp

[Mesa-dev] [PATCH 18/29] i965/fs: Import image access validity checks.

These utility functions check whether an image access is valid. According to the spec an invalid image access should have no effect on the image and yield well-defined results. Typically the hardware implements correct bounds and surface checking by itself, but in some cases (typed atomics on IVB

[Mesa-dev] [PATCH 29/29] i965: Expose ARB_shader_image_load_store.

Reviewed-by: Paul Berry stereotype...@gmail.com v2: Disable the extension for the time being if NIR is in use until it grows the necessary intrinsics. --- src/mesa/drivers/dri/i965/intel_extensions.c | 2 ++ 1 file changed, 2 insertions(+) diff --git

[Mesa-dev] [PATCH 25/29] i965/fs: Import GLSL IR image intrinsic translation code.

v2: Drop VEC4 suport. --- src/mesa/drivers/dri/i965/brw_fs.h | 1 + src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 142 +++ 2 files changed, 143 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index

[Mesa-dev] [PATCH 02/29] i965: Add register constructors taking an backend_reg as argument.

These are going to be used to convert an array_reg (chunk of the register space without fancy regioning parameters) back to a normal FS/VEC4 register. --- src/mesa/drivers/dri/i965/brw_fs.cpp| 6 ++ src/mesa/drivers/dri/i965/brw_ir_fs.h | 1 + src/mesa/drivers/dri/i965/brw_ir_vec4.h |

[Mesa-dev] [PATCH 01/29] i965/fs: Have component() set the register stride to zero.

--- src/mesa/drivers/dri/i965/brw_ir_fs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h index e2d2617..32fab65 100644 --- a/src/mesa/drivers/dri/i965/brw_ir_fs.h +++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h @@

[Mesa-dev] [PATCH 17/29] i965/fs: Import surface message builder functions.

Implement helper functions that can be used to construct and send untyped and typed surface read, write and atomic messages to the shared dataport unit. v2: Drop VEC4 suport. --- .../drivers/dri/i965/brw_fs_surface_builder.cpp| 232 +

[Mesa-dev] [PATCH 13/29] i965/vec4: Obtain atomic counter locations by recursing through the visitor.

Until now atomic counter built-ins were handled in a way that prevented the visitor from encountering atomic counter IR variables and dereferences directly. With the new intrinsic lowering code it's going to be more convenient to be able to call back into the visitor to let it handle the ugly

[Mesa-dev] [PATCH] clover: add --with-icd-file-dir option

The standard ICD file path is /etc/OpenCL/vendor/. However it doesn't fit well with custom build. This option allow ICD vendor file installation path override --- configure.ac | 6 ++ src/gallium/targets/opencl/Makefile.am | 2 +- 2 files changed, 7 insertions(+), 1

Re: [Mesa-dev] [PATCH] clover: add --with-icd-file-dir option

On Sat, May 2, 2015 at 1:19 PM, EdB edb+m...@sigluy.net wrote: The standard ICD file path is /etc/OpenCL/vendor/. However it doesn't fit well with custom build. This option allow ICD vendor file installation path override --- configure.ac | 6 ++

[Mesa-dev] [PATCH 3/9] glx/dri3: Add additional check for gpu offloading case

Checks blitImage is implemented. Initially having the __DRIimageExtension extension at version 9 at least meant blitImage was supported. However some implementations do advertise version = 9 without implementing it. Signed-off-by: Axel Davy axel.d...@ens.fr --- src/glx/dri3_glx.c | 5 + 1

[Mesa-dev] [PATCH 5/9] egl/wayland: Implement DRI_PRIME support

When the server gpu and requested gpu are different: . They likely don't support the same tiling modes . They likely do not have fast access to the same locations Thus we do: . render to a tiled buffer we do not share with the server . Copy the content at every swap to a buffer with no tiling

[Mesa-dev] [PATCH 12/19] gallium/cso: add support for tessellation shaders

From: Marek Olšák marek.ol...@amd.com --- src/gallium/auxiliary/cso_cache/cso_context.c | 93 +++ src/gallium/auxiliary/cso_cache/cso_context.h | 12 2 files changed, 105 insertions(+) diff --git a/src/gallium/auxiliary/cso_cache/cso_context.c

[Mesa-dev] [PATCH 15/19] tgsi/scan: allow scanning tessellation shaders

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/auxiliary/tgsi/tgsi_scan.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c b/src/gallium/auxiliary/tgsi/tgsi_scan.c index e6011d2..3f94bab 100644 ---

[Mesa-dev] [PATCH 11/19] gallium/u_blitter: disable tessellation for all operations

From: Marek Olšák marek.ol...@amd.com --- src/gallium/auxiliary/util/u_blitter.c | 27 +++ src/gallium/auxiliary/util/u_blitter.h | 16 +++- 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/util/u_blitter.c

[Mesa-dev] [PATCH 19/19] tgsi/dump: fix declaration printing of tessellation inputs/outputs

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu mareko: only output second dimension for non-patch semantics --- src/gallium/auxiliary/tgsi/tgsi_dump.c | 20 ++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c

[Mesa-dev] [PATCH 13/19] gallium/cso: set NULL shaders at context destruction

From: Marek Olšák marek.ol...@amd.com --- src/gallium/auxiliary/cso_cache/cso_context.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/gallium/auxiliary/cso_cache/cso_context.c b/src/gallium/auxiliary/cso_cache/cso_context.c index 021ea42..51aadfb 100644 ---

[Mesa-dev] [PATCH 03/19] gallium: add new semantics for tessellation

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/auxiliary/tgsi/tgsi_strings.c | 5 src/gallium/docs/source/tgsi.rst | 37 ++ src/gallium/include/pipe/p_shader_tokens.h | 7 +- 3 files changed, 48 insertions(+), 1 deletion(-) diff

[Mesa-dev] [PATCH 06/19] gallium: add tessellation shader properties

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/auxiliary/tgsi/tgsi_strings.c | 7 ++- src/gallium/docs/source/tgsi.rst | 33 ++ src/gallium/include/pipe/p_defines.h | 7 +++ src/gallium/include/pipe/p_shader_tokens.h | 7

[Mesa-dev] [PATCH 04/19] gallium: bump shader input and output limits

From: Marek Olšák marek.ol...@amd.com --- src/gallium/include/pipe/p_state.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h index e15860c..e713a44 100644 --- a/src/gallium/include/pipe/p_state.h +++

[Mesa-dev] [PATCH 16/19] tgsi/sanity: set implicit in/out array sizes based on patch sizes

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/auxiliary/tgsi/tgsi_sanity.c | 36 1 file changed, 32 insertions(+), 4 deletions(-) diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c index

[Mesa-dev] [PATCH 17/19] tgsi/ureg: use correct limit for max input count

From: Marek Olšák marek.ol...@amd.com --- src/gallium/auxiliary/tgsi/tgsi_ureg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c index a4c0fc5..55d8cf1 100644 ---

[Mesa-dev] [PATCH 10/19] gallium/util: print patch_vertices in util_dump_draw_info

From: Marek Olšák marek.ol...@amd.com --- src/gallium/auxiliary/util/u_dump_state.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/auxiliary/util/u_dump_state.c b/src/gallium/auxiliary/util/u_dump_state.c index e6614d5..4fa4e23 100644 ---

[Mesa-dev] [PATCH 00/19] gallium: basic tessellation support

This series adds tokens and updates some helper gallium functions to know about tessellation. This provides no actual support for tessellation in either core or drivers, however this will make it possible to work on the core and driver pieces without crazy interdependencies, as well as be landed

[Mesa-dev] [PATCH 07/19] gallium: add patch_vertices to draw info

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/include/pipe/p_state.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h index e713a44..449c7f1 100644 --- a/src/gallium/include/pipe/p_state.h +++

[Mesa-dev] [PATCH 18/19] tgsi/ureg: allow ureg_dst to have dimension indices

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/auxiliary/tgsi/tgsi_ureg.c | 24 -- src/gallium/auxiliary/tgsi/tgsi_ureg.h | 59 ++ 2 files changed, 75 insertions(+), 8 deletions(-) diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c

[Mesa-dev] ARB_query_buffer_object driver interface

Hello, I've started working on implementing ARB_query_buffer_object, and am trying to work out the driver interface. I'm thinking something along these lines: void (*CheckQuery)(struct gl_context *ctx, struct gl_query_object *q); void (*WaitQuery)(struct gl_context *ctx, struct

Re: [Mesa-dev] ARB_query_buffer_object driver interface

On Sat, May 2, 2015 at 9:47 PM, Ilia Mirkin imir...@alum.mit.edu wrote: Hello, I've started working on implementing ARB_query_buffer_object, and am trying to work out the driver interface. I'm thinking something along these lines: void (*CheckQuery)(struct gl_context *ctx, struct

[Mesa-dev] [PATCH 09/19] trace: implement new tessellation functions

From: Marek Olšák marek.ol...@amd.com --- src/gallium/drivers/trace/tr_context.c| 26 ++ src/gallium/drivers/trace/tr_dump_state.c | 2 ++ 2 files changed, 28 insertions(+) diff --git a/src/gallium/drivers/trace/tr_context.c b/src/gallium/drivers/trace/tr_context.c

[Mesa-dev] [PATCH 14/19] gallium: disable tessellation shaders for meta ops

From: Marek Olšák marek.ol...@amd.com --- src/gallium/auxiliary/hud/hud_context.c| 6 ++ src/gallium/auxiliary/postprocess/pp_run.c | 6 ++ src/gallium/auxiliary/util/u_blit.c| 6 ++ src/mesa/state_tracker/st_cb_bitmap.c | 8 +++-

[Mesa-dev] [PATCH 08/19] gallium: add set_tess_state to configure default tessellation parameters

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/docs/source/context.rst | 5 + src/gallium/include/pipe/p_context.h | 4 2 files changed, 9 insertions(+) diff --git a/src/gallium/docs/source/context.rst b/src/gallium/docs/source/context.rst index 5861f46..0908ee7

[Mesa-dev] [PATCH 01/19] gallium: add tessellation shader types

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/auxiliary/tgsi/tgsi_info.c | 4 src/gallium/auxiliary/tgsi/tgsi_strings.c | 4 +++- src/gallium/auxiliary/tgsi/tgsi_strings.h | 2 +- src/gallium/include/pipe/p_defines.h | 6 --

[Mesa-dev] [PATCH 02/19] gallium: add new PATCHES primitive type

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/auxiliary/tgsi/tgsi_strings.c | 3 ++- src/gallium/include/pipe/p_defines.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c

[Mesa-dev] [PATCH 05/19] gallium: add interfaces for controlling tess program state

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- src/gallium/include/pipe/p_context.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/gallium/include/pipe/p_context.h b/src/gallium/include/pipe/p_context.h index a4cae8e..74c2f2f 100644 ---