On Fri, Oct 16, 2015 at 08:24:11AM -0700, Jason Ekstrand wrote:
> On Fri, Oct 16, 2015 at 12:35 AM, Pohjolainen, Topi
> wrote:
> > On Fri, Oct 09, 2015 at 05:50:22AM -0700, Jason Ekstrand wrote:
> >> On Fri, Oct 9, 2015 at 12:10 AM, Pohjolainen, Topi
> >>
On 17.10.2015 00:10, Brian Paul wrote:
> On 10/16/2015 08:17 AM, Brian Paul wrote:
>> On 10/16/2015 12:36 AM, Michel Dänzer wrote:
>>>
>>> Hi Brian,
>>>
>>>
>>> On 15.10.2015 22:23, Brian Paul wrote:
Module: Mesa
Branch: master
Commit: 0de5e0f3fb0f3671a3ecec6ab4473f9131ecd0ae
Gstreamer-vaapi for one.
-Original Message-
From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
Sent: Friday, October 16, 2015 9:26 PM
To: Christian König
Cc: ML mesa-dev; Das, Indrajit-kumar
Subject: Re: [Mesa-dev] [PATCH 2/2] Added support for NV12 to IYUV conversion
in vlVaGetImage
On 16.10.2015 18:02, Emil Velikov wrote:
On 16 October 2015 at 15:53, Christian König wrote:
From: Indrajit Das
Reviewed-by: Christian König
Nicely spotted !
For the future use correct prefix for the summary
The amount of memory that the GPU can use in any single batch is the
amount of memory it can map into its page tables, that is the GTT size.
With per-process GTT (i.e. every context has its own set of page tables),
this value may differ from the global GTT size (and is often larger).
When
Neil Roberts writes:
> Just a thought, would it be better to move this check into the
> eliminate_find_live_channel optimisation? That way it could catch
> sources that become immediates through later optimisations. One problem
> with this that I've seen before is that
Hi Abdiel,
Abdiel Janulgue writes:
> Signed-off-by: Abdiel Janulgue
> ---
> src/mesa/drivers/dri/i965/brw_defines.h | 20
> 1 file changed, 20 insertions(+)
>
> diff --git
On 17/10/15 03:56, Brian Paul wrote:
If we didn't find a gallium surface format that exactly matched the
glDrawPixels format/type combination, we used some other 32-bit packed
RGBA format and swizzled the whole image in the mesa texstore/format code.
That slow path can be avoided in some common
Assuming no piglit regressions,
Reviewed-by: Samuel Iglesias Gonsálvez
Thanks!
Sam
On 17/10/15 11:51, Timothy Arceri wrote:
> This also removes the validation from the parser as it is not required
> and once arb_enhanced_layouts comes along we wont be able to do
I thought just changing the prim type would cause the loop to not get
closed in the end, albeit I looked at it only briefly (I thought the
DRAW_SPLIT_AFTER/BEFORE flags were supposed to be able to deal with this
but couldn't figure out how). But if this works correctly,
Reviewed-by: Roland
On 10/19/2015 12:43 PM, Pierre Moreau wrote:
On 11:06 AM - Oct 19 2015, Samuel Pitoiset wrote:
On 10/19/2015 11:01 AM, Pierre Moreau wrote:
Hi Samuel,
(some comments below)
On 11:36 PM - Oct 18 2015, Samuel Pitoiset wrote:
While we are at it, store the rotate offset for occlusion queries
On 19/10/15 13:18, Samuel Iglesias Gonsálvez wrote:
> Reviewed-by: Samuel Iglesias Gonsálvez
>
Just one thing I forgot to say, Can you be more verbose about what it
fixes in the subject line?
"glsl: fix regression when building interface field name for SSBOs"
or
On 16/10/15 22:25, Brian Paul wrote:
When a long GL_LINE_LOOP prim was split across primitives we drew
stray lines. See previous commit for details.
This patch converts GL_LINE_LOOP prims into GL_LINE_STRIP prims so
that drivers don't have to worry about the _mesa_prim::begin/end flags.
On 19/10/15 11:10, Timothy Arceri wrote:
> On Mon, 2015-10-19 at 11:00 +0200, Samuel Iglesias Gonsalvez wrote:
>> Fixes a regression added by bb5aeb854915ba67abc56257f830d002c956439e.
>>
>> Signed-off-by: Samuel Iglesias Gonsalvez
>
> Thanks. Reviewed-by: Timothy Arceri
On Sun, 2015-10-18 at 21:31 -0700, Kristian Høgsberg Kristensen wrote:
> Instead of looping through single-component reads, read all components
> in one go.
>
> Signed-off-by: Kristian Høgsberg Kristensen
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 25
Hi Lucas,
Pardon for jumping it like this.
On 19 October 2015 at 10:25, Lucas Stach wrote:
[snip]
> This series implements a way to fuse multiple DRM devices into a single
> EGL device, solely on the base that current EGL users expect that a
> single device is able to
Hi Samuel,
(some comments below)
On 11:36 PM - Oct 18 2015, Samuel Pitoiset wrote:
> While we are at it, store the rotate offset for occlusion queries to
> nv50_hw_query like on nvc0.
>
> Signed-off-by: Samuel Pitoiset
> ---
>
Fixes a regression added by bb5aeb854915ba67abc56257f830d002c956439e.
Signed-off-by: Samuel Iglesias Gonsalvez
---
Piglit test that checks the regression:
http://patchwork.freedesktop.org/patch/62183/
src/glsl/lower_ubo_reference.cpp | 2 +-
1 file changed, 1
On Mon, 2015-10-19 at 11:00 +0200, Samuel Iglesias Gonsalvez wrote:
> Fixes a regression added by bb5aeb854915ba67abc56257f830d002c956439e.
>
> Signed-off-by: Samuel Iglesias Gonsalvez
Thanks. Reviewed-by: Timothy Arceri
I'm surprised this didn't
On Sun, 2015-10-18 at 21:31 -0700, Kristian Høgsberg Kristensen wrote:
> We always set the mask to 0x, which is what it defaults to when no
> header is present. Let's drop the header instead.
Right, according to the PRM (3.9.9 Typed/Untyped Surface Read/Write and
Typed/Untyped Atomic
On Sun, 2015-10-18 at 21:31 -0700, Kristian Høgsberg Kristensen wrote:
> An immdiate is already uniform so just return it up front. Without this,
> brw_fs_surface_builder ends up passing immediate surface indices through
> SHADER_OPCODE_BROADCAST. This writes to a stride 0 dst, which we can't
>
On 10/19/2015 10:43 AM, Pierre Moreau wrote:
Hi Samuel,
(some comments further down)
On 11:30 PM - Oct 18 2015, Samuel Pitoiset wrote:
Like for nvc0, this will allow to split different types of queries and
to prepare the way for both global performance counters and MP counters.
While we
On 10/19/2015 11:01 AM, Pierre Moreau wrote:
Hi Samuel,
(some comments below)
On 11:36 PM - Oct 18 2015, Samuel Pitoiset wrote:
While we are at it, store the rotate offset for occlusion queries to
nv50_hw_query like on nvc0.
Signed-off-by: Samuel Pitoiset
---
Just a thought, would it be better to move this check into the
eliminate_find_live_channel optimisation? That way it could catch
sources that become immediates through later optimisations. One problem
with this that I've seen before is that eliminating the
FIND_LIVE_CHANNEL doesn't cause the
Hi Samuel,
(some comments further down)
On 11:30 PM - Oct 18 2015, Samuel Pitoiset wrote:
> Like for nvc0, this will allow to split different types of queries and
> to prepare the way for both global performance counters and MP counters.
>
> While we are at it, make use of nv50_query struct
On 18 October 2015 at 13:45, Timothy Arceri wrote:
> On Sun, 2015-10-18 at 11:34 +0100, Emil Velikov wrote:
>> Hi Timothy,
>>
>> On 17 October 2015 at 23:19, Timothy Arceri
>> wrote:
>> > Fixes regression cased by
On 11:06 AM - Oct 19 2015, Samuel Pitoiset wrote:
>
>
> On 10/19/2015 11:01 AM, Pierre Moreau wrote:
> >Hi Samuel,
> >
> >(some comments below)
> >
> >On 11:36 PM - Oct 18 2015, Samuel Pitoiset wrote:
> >>While we are at it, store the rotate offset for occlusion queries to
> >>nv50_hw_query like
Hey Kristian,
Kristian Høgsberg Kristensen writes:
> We always set the mask to 0x, which is what it defaults to when no
> header is present. Let's drop the header instead.
>
> Signed-off-by: Kristian Høgsberg Kristensen
> ---
>
Hi Christian,
Am Sonntag, den 18.10.2015, 21:41 +0200 schrieb Christian Gmeiner:
> Hi Thierry,
>
> Thanks for reviewing this patches.
>
> 2015-10-16 15:31 GMT+02:00 Thierry Reding :
> > Hi Christian,
> >
> > First off, thanks for reviving this effort. It's been one of
On Sun, 2015-10-18 at 21:31 -0700, Kristian Høgsberg Kristensen wrote:
> I've been giving the SSBO functionality a closer look and I found a
> few problems, each addressed by a patch in this series. The commit
> messages describe the issues and the fixes, but the net effect takes
> my vertex
Ping on these two trivial patches ?
-Emil
On 7 October 2015 at 12:38, Emil Velikov wrote:
> There is only one function that can be called, which is well known at
> compilation time.
>
> The abstraction used here seems unnecessary, so let's use a direct call
> to
Undoes early hacks, and ensures nir/glsl_types.cpp is built once, and
only once.
The root problem is that SCons doesn't know about NIR nor any source
file in the NIR_FILES source list.
Tested with libgl-gdi and libgl-xlib scons targets.
---
src/gallium/targets/libgl-gdi/SConscript |
On 10/19/2015 08:01 AM, Jose Fonseca wrote:
Undoes early hacks, and ensures nir/glsl_types.cpp is built once, and
only once.
The root problem is that SCons doesn't know about NIR nor any source
file in the NIR_FILES source list.
Tested with libgl-gdi and libgl-xlib scons targets.
---
On 7 October 2015 at 11:11, Emil Velikov wrote:
> Hi all,
>
> A while back we had a case where NIR had C99 initializers in its public
> headers. That's not desired as ISO C++ does not allow them.
>
> So I took a quick look about wiring up a compilation test at 'make
>
On 17/10/15 17:44, Rob Clark wrote:
On Sat, Oct 17, 2015 at 12:36 PM, Brian Paul wrote:
On 10/17/2015 10:07 AM, Brian Paul wrote:
On 10/17/2015 07:04 AM, Rob Clark wrote:
On Fri, Oct 16, 2015 at 11:11 PM, Brian Paul wrote:
Hi Rob,
Your recent
https://bugs.freedesktop.org/show_bug.cgi?id=92536
Bug ID: 92536
Summary: [BSW] [Regrassion] piglit
spec/egl_khr_create_context/valid forward-compatible
flag gl fail
Product: Mesa
Version: 11.0
On 10/19/2015 12:52 AM, Michel Dänzer wrote:
On 17.10.2015 00:10, Brian Paul wrote:
On 10/16/2015 08:17 AM, Brian Paul wrote:
On 10/16/2015 12:36 AM, Michel Dänzer wrote:
Hi Brian,
On 15.10.2015 22:23, Brian Paul wrote:
Module: Mesa
Branch: master
Commit:
On 10/18/2015 03:06 PM, Sinclair Yeh wrote:
On Fri, Oct 16, 2015 at 03:25:16PM -0600, Brian Paul wrote:
When long GL_LINE_LOOP primitives don't fit in one vertex buffer they
have to be split across buffers. The code to do this was basically correct
but drivers had to pay special attention to
Signed-off-by: Emil Velikov
---
docs/relnotes/11.1.0.html| 1 +
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/docs/relnotes/11.1.0.html b/docs/relnotes/11.1.0.html
index dcf425e..3d948eb 100644
Hi all,
This is a resent of the previous RFC series with a few minor changes
- fs_reg:;smear() has been moved out of get_timestamp()
- clock2x32ARB() has proper return value
- the nir intrinsic no longer claims to have a variable
I'm still rocking a SNB hardware so I did not really got the
Signed-off-by: Emil Velikov
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 9 +
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 10 ++
2 files changed, 19 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
Signed-off-by: Emil Velikov
---
src/glsl/glcpp/glcpp-parse.y| 3 +++
src/glsl/glsl_parser_extras.cpp | 1 +
src/glsl/glsl_parser_extras.h | 2 ++
3 files changed, 6 insertions(+)
diff --git a/src/glsl/glcpp/glcpp-parse.y b/src/glsl/glcpp/glcpp-parse.y
index
We're about to reuse get_timestamp() for the nir_intrinsic_shader_clock.
The in the latter the generalisation does not apply, so move the smear()
where needed. This also makes the function analogous to the vec4 one.
Signed-off-by: Emil Velikov
---
v2: correctly set the return type
Signed-off-by: Emil Velikov
---
src/glsl/builtin_functions.cpp | 43 ++
1 file changed, 43 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index
Signed-off-by: Emil Velikov
---
src/mesa/main/extensions.c | 1 +
src/mesa/main/mtypes.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index b2c88c3..64972fa 100644
--- a/src/mesa/main/extensions.c
v2: Add flags and inline comment/description.
v3: None of the input/outputs are variables
Signed-off-by: Emil Velikov
---
src/glsl/nir/glsl_to_nir.cpp | 6 ++
src/glsl/nir/nir_intrinsics.h | 8
2 files changed, 14 insertions(+)
diff --git
Reviewed-by: Roland Scheidegger
Am 19.10.2015 um 16:42 schrieb Brian Paul:
> Spotted by Roland. Luckily, this code should never really be hit
> since the const buffer size and offset should already be multiples
> of 16. I could probably add more assertions to that effect,
Reviewed-by: Christian König
For mesa you can push small fixes like this even without a review when
nobody objects after a few days.
Regards,
Christian.
On 19.10.2015 16:55, Liu, Leo wrote:
Ping...
-Original Message-
From: Liu, Leo
Sent: Wednesday,
Spotted by Roland. Luckily, this code should never really be hit
since the const buffer size and offset should already be multiples
of 16. I could probably add more assertions to that effect, but
let's just fix the arithmetic for now.
---
src/gallium/drivers/svga/svga_state_constants.c | 2 +-
Ping...
>-Original Message-
>From: Liu, Leo
>Sent: Wednesday, October 14, 2015 2:49 PM
>To: mesa-dev@lists.freedesktop.org
>Cc: Liu, Leo; 10.6 11.0
>Subject: [PATCH] st/omx/dec/h264: fix field picture type 0 poc disorder
>
>Signed-off-by: Leo Liu
>Cc: "10.6 11.0"
On 10/19/2015 04:53 AM, Roland Scheidegger wrote:
I thought just changing the prim type would cause the loop to not get
closed in the end, albeit I looked at it only briefly (I thought the
DRAW_SPLIT_AFTER/BEFORE flags were supposed to be able to deal with this
but couldn't figure out how). But
On 19 October 2015 at 15:55, Liu, Leo wrote:
> Ping...
>
FYI adding actual commit message does make reviewers happy.
Then again, although it makes sense, I don't feel qualified to review this :(
-Emil
___
mesa-dev mailing list
On 17 October 2015 at 00:14, Julien Isorce wrote:
> Inspired from
> http://cgit.freedesktop.org/vaapi/intel-driver/tree/src/i965_drv_video.c
>
Please mention the actual usecase here and/or how you've tested this.
> Signed-off-by: Julien Isorce
>
On 10/17/2015 04:57 PM, Emil Velikov wrote:
Move the winsys into the pipe-target, bla bla bla
XXX: separate pipe-drivers are likely to be busted
Signed-off-by: Emil Velikov
---
src/gallium/auxiliary/pipe-loader/pipe_loader_sw.c | 94 +-
On Thu, Oct 15, 2015 at 06:03:34PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 15, 2015 at 02:19:09PM +, Predut, Marius wrote:
> > > -Original Message-
> > > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > > Sent: Wednesday, October 07, 2015 1:53 PM
> > > To: Predut,
On 17 October 2015 at 00:14, Julien Isorce wrote:
> This patch allows to use gallium vaapi without requiring
> a X server running for your second graphic card.
>
I've sent a lengthy series which should mitigate the need of some hunks.
> Signed-off-by: Julien Isorce
On 10/17/2015 04:57 PM, Emil Velikov wrote:
i.e. plug some (hard to hit) memory leaks.
Signed-off-by: Emil Velikov
---
src/gallium/auxiliary/pipe-loader/pipe_loader_sw.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
On 17 October 2015 at 00:14, Julien Isorce wrote:
> Signed-off-by: Julien Isorce
> ---
> src/gallium/drivers/nouveau/nvc0/nvc0_resource.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git
On 17 October 2015 at 00:14, Julien Isorce wrote:
> If formats are not the same it seems to re-create the video
> buffer with the right format.
> But if the creation of this new video buffer fails the surface
> loose its video buffer.
> Let's just destroy the previous
On 17 October 2015 at 00:14, Julien Isorce wrote:
> Also add RGBA, RGBX and BGRX.
> Also extend ChromaToPipe and implement PipeToYCbCr.
>
> Note that gstreamer-vaapi check all the VAImageFormat fields.
>
> Signed-off-by: Julien Isorce
> ---
>
On Mon, Oct 19, 2015 at 12:07 AM, Pohjolainen, Topi
wrote:
> On Fri, Oct 16, 2015 at 08:24:11AM -0700, Jason Ekstrand wrote:
>> On Fri, Oct 16, 2015 at 12:35 AM, Pohjolainen, Topi
>> wrote:
>> > On Fri, Oct 09, 2015 at 05:50:22AM -0700,
On 10/17/2015 04:57 PM, Emil Velikov wrote:
Hi all,
Here goes a series (which is slightly overdue), that reworks the
target-helpers into a pipe-loader like interface. As such the
state-tracker do not need to know that there is a difference between the
two and it only uses the pipe-loader
I don't have anything against new properties but why exactly is it
needed? As far as I can tell, clip/cull distances aren't declared as
arrays but just (up to two each) ordinary outputs, thus using the usage
masks should work just fine. Or is this handled differently by some
shader stages?
Roland
On Mon, Oct 19, 2015 at 3:51 PM, Ilia Mirkin wrote:
> On Mon, Oct 19, 2015 at 3:47 PM, Rob Clark wrote:
>> Also, there is some trivial shader variant handling in mesa st which
>> would have to be ported to NIR. Or, perhaps, just somehow expose the
>>
Am 19.10.2015 um 21:54 schrieb Rob Clark:
> The goal is to allow the pipe driver to request something other than
> TGSI, but detect whether what is getting is TGSI vs what it requested.
> The pipe drivers will always have to support TGSI (and convert that into
> whatever it is that they prefer),
Am 19.10.2015 um 21:54 schrieb Rob Clark:
> The goal is to allow the pipe driver to request something other than
> TGSI, but detect whether what is getting is TGSI vs what it requested.
> The pipe drivers will always have to support TGSI (and convert that into
> whatever it is that they prefer),
AMD/NVIDIA hardware has a limit on how many cull/clip distances can be
used at a time. On NVIDIA hw, there's a bitmask which you flip to
determine if a distance is meant to clip or cull. It's nice not to
have to analyze the output writes of a shader to tell how many clip
distances are used.
On
Yes, but I still don't see much change from getting this information
from the property rather than how tgsi_scan does it now, which is by
just using the usage mask from the output declaration. So the writes
shouldn't have to be analyzed.
(There's also a slight change in patch 4/4, namely these
The overall idea looks quite sane to me.
Albeit obviously as you mentioned you'd really have to support all
shader stages and deal with the variants (though there aren't many left).
Roland
Am 19.10.2015 um 21:54 schrieb Rob Clark:
> From: Rob Clark
>
> (grr, resend to
On Thu, Aug 13, 2015 at 2:51 PM, Anuj Phogat wrote:
> Vertical alignment is not applicable to 1D textures.
>
> Signed-off-by: Anuj Phogat
> ---
> src/mesa/drivers/dri/i965/brw_tex_layout.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
On Mon, Oct 19, 2015 at 11:31 PM, Roland Scheidegger wrote:
> Yes, but I still don't see much change from getting this information
> from the property rather than how tgsi_scan does it now, which is by
> just using the usage mask from the output declaration. So the writes
>
On Mon, Oct 19, 2015 at 4:19 AM, Francisco Jerez wrote:
> Neil Roberts writes:
>
>> Just a thought, would it be better to move this check into the
>> eliminate_find_live_channel optimisation? That way it could catch
>> sources that become immediates
From: Rob Clark
(grr, resend to the right list..)
Still quite rough around the edges, but now it's at the point of sorta-
kinda-working-sometimes. So I guess time to get wider feedback.
The initial goal is to figure out things that glsl_to_nir does
differently from
Acked-by: Sinclair Yeh
On Fri, Oct 16, 2015 at 03:25:17PM -0600, Brian Paul wrote:
> When a long GL_LINE_LOOP prim was split across primitives we drew
> stray lines. See previous commit for details.
>
> This patch converts GL_LINE_LOOP prims into GL_LINE_STRIP prims so
>
On Sun, Oct 18, 2015 at 9:38 PM, Tobias Klausmann
wrote:
>
>
> On 18.10.2015 19:14, Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> This is more practical and needed by gallium.
>> ---
>> src/glsl/linker.cpp| 33
>>
On Mon, Oct 19, 2015 at 4:24 PM, Roland Scheidegger wrote:
> Am 19.10.2015 um 21:54 schrieb Rob Clark:
>> The goal is to allow the pipe driver to request something other than
>> TGSI, but detect whether what is getting is TGSI vs what it requested.
>> The pipe drivers will
On Sat, Oct 10, 2015 at 9:09 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> src/mesa/state_tracker/st_atom_shader.c | 10 +-
> src/mesa/state_tracker/st_cb_bitmap.c | 2 +-
> src/mesa/state_tracker/st_cb_drawpixels.c | 2 +-
>
On Mon, Oct 19, 2015 at 7:45 AM, Emil Velikov wrote:
> We're about to reuse get_timestamp() for the nir_intrinsic_shader_clock.
> The in the latter the generalisation does not apply, so move the smear()
> where needed. This also makes the function analogous to the vec4
On Mon, Oct 19, 2015 at 2:31 PM, Ilia Mirkin wrote:
> This series is Reviewed-by: Ilia Mirkin
> provided that you run a couple of piglit tests through valgrind and
> get no additional memory leaks.
>
> -ilia
>
> On Sat, Oct 10, 2015 at 9:09 PM, Marek
On Mon, Oct 19, 2015 at 7:46 AM, Emil Velikov wrote:
> Signed-off-by: Emil Velikov
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 9 +
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 10 ++
> 2 files changed, 19
On Mon, Oct 19, 2015 at 2:29 PM, Matt Turner wrote:
> On Mon, Oct 19, 2015 at 7:45 AM, Emil Velikov
> wrote:
>> We're about to reuse get_timestamp() for the nir_intrinsic_shader_clock.
>> The in the latter the generalisation does not apply, so move
When coming directly from glsl_to_nir (rather than via TGSI where
information about, for example, mat4's is lost), both const_index
fields will be used (vs. tgsi_to_nir where the 2nd is always zero).
For example:
decl_var uniform INTERP_QUALIFIER_NONE mat4 ModelViewProjectionMatrix (0, 0)
We can get the tokens from variant->shader so drop the extra arg. This
will make things easier to support either getting TGSI or NIR as input.
---
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 223 -
src/mesa/state_tracker/st_program.c| 43 +-
2 files changed, 260 insertions(+), 6 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
For now under debug flag, since only suitable for debugging/testing.
---
src/gallium/drivers/freedreno/freedreno_screen.c | 5 +++-
src/gallium/drivers/freedreno/freedreno_util.h | 1 +
.../drivers/freedreno/ir3/ir3_compiler_nir.c | 15 ++-
Otherwise, passing -1 gets you:
error: invalid conversion from 'int' to 'nir_variable_mode' [-fpermissive]
Signed-off-by: Rob Clark
---
src/glsl/nir/nir.c | 4
src/glsl/nir/nir.h | 1 +
src/glsl/nir/nir_lower_io.c | 2 +-
Complete hack just for debugging. It isn't intended that mixing and
matching glsl->tgsi->nir vs glsl->nir between shader stages should
actually work.
---
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
This series is Reviewed-by: Ilia Mirkin
provided that you run a couple of piglit tests through valgrind and
get no additional memory leaks.
-ilia
On Sat, Oct 10, 2015 at 9:09 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
>
On Mon, Oct 19, 2015 at 11:55 AM, Connor Abbott wrote:
> On Mon, Oct 19, 2015 at 2:29 PM, Matt Turner wrote:
>> On Mon, Oct 19, 2015 at 7:45 AM, Emil Velikov
>> wrote:
>>> We're about to reuse get_timestamp() for the
i.e. plug some (hard to hit) memory leaks.
v2: really teardown the winsys (it rebase fallout), per Brian.
Signed-off-by: Emil Velikov
---
src/gallium/auxiliary/pipe-loader/pipe_loader_sw.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
On Mon, Oct 19, 2015 at 3:19 AM, Francisco Jerez wrote:
> Hey Kristian,
>
> Kristian Høgsberg Kristensen writes:
>
>> We always set the mask to 0x, which is what it defaults to when no
>> header is present. Let's drop the header instead.
>>
>>
The goal is to allow the pipe driver to request something other than
TGSI, but detect whether what is getting is TGSI vs what it requested.
The pipe drivers will always have to support TGSI (and convert that into
whatever it is that they prefer), but in some cases we should be able to
skip the
---
src/gallium/include/pipe/p_defines.h | 1 +
src/gallium/include/pipe/p_state.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/gallium/include/pipe/p_defines.h
b/src/gallium/include/pipe/p_defines.h
index 29b0bfb..0dbc54c 100644
--- a/src/gallium/include/pipe/p_defines.h
+++
vec4_live_variables tracks now each flag channel independently, so
vec4_dead_code_eliminate can update the writemask of null registers,
based on which component are alive at the moment. This would allow
vec4_cmod_propagation to optimize out several movs involving null
registers.
v2: added support
On 19 October 2015 at 17:07, Brian Paul wrote:
> On 10/17/2015 04:57 PM, Emil Velikov wrote:
>>
>> Hi all,
>>
>> Here goes a series (which is slightly overdue), that reworks the
>> target-helpers into a pipe-loader like interface. As such the
>> state-tracker do not need to
On Mon, Oct 19, 2015 at 10:46 AM, Emil Velikov wrote:
> Signed-off-by: Emil Velikov
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 9 +
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 10 ++
> 2 files changed, 19
On 19 October 2015 at 17:03, Brian Paul wrote:
> On 10/17/2015 04:57 PM, Emil Velikov wrote:
>>
>> Move the winsys into the pipe-target, bla bla bla
>>
>> XXX: separate pipe-drivers are likely to be busted
>>
>> Signed-off-by: Emil Velikov
>> ---
>>
On Mon, Oct 19, 2015 at 7:45 AM, Emil Velikov wrote:
> v2: Add flags and inline comment/description.
> v3: None of the input/outputs are variables
>
> Signed-off-by: Emil Velikov
> ---
> src/glsl/nir/glsl_to_nir.cpp | 6 ++
>
On Mon, Oct 19, 2015 at 7:45 AM, Emil Velikov wrote:
> Hi all,
>
> This is a resent of the previous RFC series with a few minor changes
> - fs_reg:;smear() has been moved out of get_timestamp()
> - clock2x32ARB() has proper return value
> - the nir intrinsic no longer
On 10/16/2015 06:33 AM, Jason Ekstrand wrote:
> On Wed, Oct 14, 2015 at 6:56 PM, Eduardo Lima Mitev wrote:
>> We recently added support for GL_BGRA internal format when validating
>> combination of format+type+internal_format in Tex(Sub)ImageXD calls
>> (to fix
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