Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix st_src_reg_for_double constant.

float gets .xyzw and seems to do just fine. How/why is float/int/etc different from double? On Mon, Jul 4, 2016 at 8:27 PM, Dave Airlie wrote: > From: Dave Airlie > > This needs to set the src swizzle so it doesn't access the .zw > members ever when we are

[Mesa-dev] [PATCH] anv/wsi: create swapchain images using specified image usage

From: Lionel Landwerlin The image usage specified by the caller of vkCreateSwapchainKHR should be passed onto the internal image creation. Otherwise the driver might later crash when the user tries to use the image as a combined sampler even though the creation was

[Mesa-dev] [PATCH] anv/wsi: create swapchain images using specified image usage

From: Lionel Landwerlin The image usage specified by the caller of vkCreateSwapchainKHR should be passed onto the internal image creation. Otherwise the driver might later crash when the user tries to use the image as a combined sampler even though the creation was

Re: [Mesa-dev] V4 ARB_enhanced_layouts packing support for i965 Gen6+

Ping... On Fri, 2016-06-24 at 13:52 +1000, Timothy Arceri wrote: > V4: > - add vec4 backend support and enable for Gen6+ > > V3: > - Rewrite patch 9 (add support for packing arrays) to not add > hacks to the type_size() functions. > - Add packing support for the load_output intrinsics (patch

[Mesa-dev] [PATCH] st/glsl_to_tgsi: fix st_src_reg_for_double constant.

From: Dave Airlie This needs to set the src swizzle so it doesn't access the .zw members ever when we are just emitting a 0 constant here. This fixes: vert-conversion-explicit-dvec3-bvec3.shader_test and a bunch of other fp64 tests on softpipe and radeonsi. Signed-off-by:

Re: [Mesa-dev] [PATCH] nvc0/ir: reset the base offset for indirect images accesses

On 07/05/2016 12:57 AM, Ilia Mirkin wrote: This makes the code identical to the new code I added in suq handling? If so, r-b. As a separate patch, I'd encourage a refactor of the logic. Sure, this was my plan too. On Jul 4, 2016 6:08 PM, "Samuel Pitoiset"

Re: [Mesa-dev] [PATCH] nvc0/ir: rename NVE4_SU_INFO_XXX to NVC0_SU_INFO_XXX

Reviewed-by: Ilia Mirkin On Jul 4, 2016 6:20 PM, "Samuel Pitoiset" wrote: > While we are at it, fix a typo inside the comment which describes > what those constants are for. > > Signed-off-by: Samuel Pitoiset > --- >

Re: [Mesa-dev] [PATCH] nvc0/ir: reset the base offset for indirect images accesses

This makes the code identical to the new code I added in suq handling? If so, r-b. As a separate patch, I'd encourage a refactor of the logic. On Jul 4, 2016 6:08 PM, "Samuel Pitoiset" wrote: > In presence of an indirect image access, the base offset should be >

Re: [Mesa-dev] [PATCH 1/1] r600g: Add double precision FMA ops

Pushed, thanks! Marek On Sat, Jul 2, 2016 at 10:14 PM, Jan Vesely wrote: > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96782 > Fixes: 54c4d525da7c7fc1e103d7a3e6db015abb132d5d ("r600g: Enable FMA on chips > that support it") > > Signed-off-by: Jan Vesely

Re: [Mesa-dev] [PATCH v2 00/13] gallium/radeon: flushed depth textures for radeonsi

I skimmed through the v2 deltas and they look good to me. Marek On Mon, Jul 4, 2016 at 9:20 PM, Nicolai Hähnle wrote: > Hi, > > only minor changes relative to v1: addressed comments by Marek on patch 3 > and (now) patch 10, and dropped the R600/R700-only patch, though this

Re: [Mesa-dev] [PATCH v2 07/13] gallium/radeon: replace is_flushing_texture with db_compatible

Reviewed-by: Marek Olšák Marek On Mon, Jul 4, 2016 at 9:20 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > This is a left-over of when I considered generalizing the separate stencil > support. I do prefer the new name

Re: [Mesa-dev] [PATCH v2 06/13] gallium/radeon: add can_sample_z/s flags for textures

Reviewed-by: Marek Olšák Marek On Mon, Jul 4, 2016 at 9:20 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > v2: adjust r600_init_color_surface as well > > Reviewed-by: Marek Olšák (v1) > --- >

[Mesa-dev] [PATCH] nvc0/ir: rename NVE4_SU_INFO_XXX to NVC0_SU_INFO_XXX

While we are at it, fix a typo inside the comment which describes what those constants are for. Signed-off-by: Samuel Pitoiset --- .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 98 +++--- 1 file changed, 49 insertions(+), 49 deletions(-) diff

[Mesa-dev] [PATCH] nvc0/ir: reset the base offset for indirect images accesses

In presence of an indirect image access, the base offset should be zeroed because the stride will be computed twice. This is a pretty rare situation but it can happen when tex.r > 0. Signed-off-by: Samuel Pitoiset Cc: "11.2 12.0" ---

Re: [Mesa-dev] [Mesa-stable] [PATCH] radeon uvd add uvd fw version for amdgpu

Hi Emil, I have added comments for each patch, and applied for branch 12.0. Please find attached patches. Thanks, Sonny From: mesa-dev on behalf of Christian König Sent: Friday, July 1, 2016

Re: [Mesa-dev] clover: Implement linking of multiple CL programs.

On Sun, Jul 03, 2016 at 05:51:09PM -0700, Francisco Jerez wrote: > This series is the result of a long back and forth of patches between > Serge and me. Most of the changes are already reviewed by either of > us, but I'm sending them again over the mailing list just in case > somebody else wants

Re: [Mesa-dev] [PATCH 20/47] clover/llvm: Clean up codestyle of get_kernel_args().

On Mon, 2016-07-04 at 12:31 -0700, Francisco Jerez wrote: > Jan Vesely writes: > > > On Sun, 2016-07-03 at 17:51 -0700, Francisco Jerez wrote: > > > Reviewed-by: Serge Martin > > > --- > > >  .../state_trackers/clover/llvm/invocation.cpp  | 223 >

Re: [Mesa-dev] [PATCH 10/47] clover/llvm: Clean up compilation into LLVM IR.

On Mon, 2016-07-04 at 12:32 -0700, Francisco Jerez wrote: > Jan Vesely writes: > > > On Sun, 2016-07-03 at 17:51 -0700, Francisco Jerez wrote: > > > Some assorted and mostly trivial clean-ups for the source to > > > bitcode > > > compilation path. > > > > > >

Re: [Mesa-dev] [PATCH 10/47] clover/llvm: Clean up compilation into LLVM IR.

Jan Vesely writes: > On Sun, 2016-07-03 at 17:51 -0700, Francisco Jerez wrote: >> Some assorted and mostly trivial clean-ups for the source to bitcode >> compilation path. >> >> Reviewed-by: Serge Martin >> --- >>  

Re: [Mesa-dev] [PATCH 20/47] clover/llvm: Clean up codestyle of get_kernel_args().

Jan Vesely writes: > On Sun, 2016-07-03 at 17:51 -0700, Francisco Jerez wrote: >> Reviewed-by: Serge Martin >> --- >>  .../state_trackers/clover/llvm/invocation.cpp  | 223 >> ++--- >>  1 file changed, 103 insertions(+), 120

Re: [Mesa-dev] [PATCH] r600: fix duplicate 'const' declaration

Pushed, thanks! On 03.07.2016 21:03, franci...@gmail.com wrote: From: Francesco Ansanelli --- src/gallium/drivers/r600/evergreen_compute.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/evergreen_compute.c

Re: [Mesa-dev] [PATCH 6/6] radeonsi: print LLVM IRs to ddebug logs

On 02.07.2016 19:20, Marek Olšák wrote: On Sat, Jul 2, 2016 at 11:44 AM, Nicolai Hähnle wrote: On 01.07.2016 01:21, Marek Olšák wrote: From: Marek Olšák Getting LLVM IRs of hanging shaders have never been easier. ---

[Mesa-dev] [PATCH v2 12/13] gallium/radeon: add depth/stencil_adjusted output to surface computation

From: Nicolai Hähnle This fixes a rare bug with stencil texturing -- seen on Polaris and Tonga, though it's basically a function of the memory configuration so could affect other parts as well. Fixes piglit "unaligned-blit * stencil downsample" and various

[Mesa-dev] [PATCH v2 13/13] winsys/amdgpu: avoid flushed depth when possible

From: Nicolai Hähnle If a depth/stencil texture has no mipmaps, we can always get a layout that is compatible with DB and TC. Reviewed-by: Marek Olšák --- src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 11 --- 1 file changed, 8

[Mesa-dev] [PATCH v2 01/13] gallium/radeon: flush stdout after printing texture information

From: Nicolai Hähnle Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index

[Mesa-dev] [PATCH v2 08/13] radeonsi: sample from flushed depth texture when required

From: Nicolai Hähnle Note that this has no effect yet. A case where can_sample_z/s can be false in radeonsi will be added in a later patch. Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 35 +--

[Mesa-dev] [PATCH v2 11/13] gallium/radeon: allocate only the required plane for flushed depth

From: Nicolai Hähnle Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 37 --- 1 file changed, 34 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c

[Mesa-dev] [PATCH v2 07/13] gallium/radeon: replace is_flushing_texture with db_compatible

From: Nicolai Hähnle This is a left-over of when I considered generalizing the separate stencil support. I do prefer the new name since it emphasizes what flushing vs. non-flushing means from a functional point-of-view, namely special handling of the texture format. v2:

[Mesa-dev] [PATCH v2 06/13] gallium/radeon: add can_sample_z/s flags for textures

From: Nicolai Hähnle v2: adjust r600_init_color_surface as well Reviewed-by: Marek Olšák (v1) --- src/gallium/drivers/r600/r600_blit.c | 6 ++ src/gallium/drivers/r600/r600_pipe.h | 8

[Mesa-dev] [PATCH v2 09/13] radeonsi: extract DB->CB copy logic into its own function

From: Nicolai Hähnle Also clean up some of the looping. Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c | 97 +- 1 file changed, 61 insertions(+), 36 deletions(-) diff --git

[Mesa-dev] [PATCH v2 04/13] gallium/radeon/winsyses: remove unused stencil_offset

From: Nicolai Hähnle Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/radeon_winsys.h | 1 - src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 2 -- src/gallium/winsys/radeon/drm/radeon_drm_surface.c | 2 -- 3 files changed, 5

[Mesa-dev] [PATCH v2 05/13] radeonsi: correctly mark levels of 3D textures as fully decompressed

From: Nicolai Hähnle Account for the fact that max_layer is minified for higher levels. Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH v2 10/13] radeonsi: decompress to flushed depth texture when required

From: Nicolai Hähnle v2: s/dirty_level_mask/stencil_dirty_level_mask/ in stencil case Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c | 132 + 1 file changed, 103 insertions(+), 29 deletions(-)

[Mesa-dev] [PATCH v2 00/13] gallium/radeon: flushed depth textures for radeonsi

Hi, only minor changes relative to v1: addressed comments by Marek on patch 3 and (now) patch 10, and dropped the R600/R700-only patch, though this means minor changes in patches 6 & 7 so that r600_init_color_surface still compiles. Please review! Thanks, Nicolai --

[Mesa-dev] [PATCH v2 02/13] gallium/radeon: print StencilLayout only once

From: Nicolai Hähnle It is the same for all levels. Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c

[Mesa-dev] [PATCH v2 03/13] gallium/radeon: remove redundant null-pointer check

From: Nicolai Hähnle v2: keep using r600_texture_reference Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c

Re: [Mesa-dev] [PATCH 1/2] radeon/vce: increase cpb height alignment

Am 04.07.2016 um 17:46 schrieb Leo Liu: Height should be aligned with 2 macroblocks, thus making safer for tiled mode Signed-off-by: Leo Liu For both patches Reviewed-by: Christian König . --- src/gallium/drivers/radeon/radeon_vce.c | 2 +- 1

[Mesa-dev] [PATCH 1/2] radeon/vce: increase cpb height alignment

Height should be aligned with 2 macroblocks, thus making safer for tiled mode Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_vce.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c

[Mesa-dev] [PATCH 2/2] radeon/vce: update encRefPic addr and array mode to tiled

Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_vce_52.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeon/radeon_vce_52.c b/src/gallium/drivers/radeon/radeon_vce_52.c index 7d33313..869b29b 100644 ---

Re: [Mesa-dev] [PATCH] anv/wsi: create swapchain images using specified image usage

Reviewed-by: Jason Ekstrand Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96791 Cc: "12.0" I've added the above tags and pushed the patch. Thanks! --Jason On Mon, Jul 4, 2016 at 10:06 AM, Lionel Landwerlin <

[Mesa-dev] [PATCH] anv/wsi: create swapchain images using specified image usage

The image usage specified by the caller of vkCreateSwapchainKHR should be passed onto the internal image creation. Otherwise the driver might later crash when the user tries to use the image as a combined sampler even though the creation was explicitly created with VK_IMAGE_USAGE_TRANSFER_SRC_BIT.

Re: [Mesa-dev] [v2 14/18] i965/blorp: Use flat inputs instead of uniforms

LGTM. R-B still applies On Mon, Jul 4, 2016 at 9:45 AM, Topi Pohjolainen wrote: > v2 (Jason): Use LOAD_INPUT() macro > > Signed-off-by: Topi Pohjolainen > Reviewed-by: Jason Ekstrand (v1) > --- >

[Mesa-dev] [v2 14/18] i965/blorp: Use flat inputs instead of uniforms

v2 (Jason): Use LOAD_INPUT() macro Signed-off-by: Topi Pohjolainen Reviewed-by: Jason Ekstrand (v1) --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 24 +--- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 9 + 2

Re: [Mesa-dev] [v2 7/18] i965/blorp: Load tranformation coordinates as vec4

On Mon, Jul 04, 2016 at 08:05:50AM -0700, Jason Ekstrand wrote: >Thanks for the quick turnaround. Patches 6, 6.1, and 7 are > >Reviewed-by: Jason Ekstrand <[1]ja...@jlekstrand.net> > >I assume that the "use flat inputs" patch just tweaks the LOAD_INPUT >macro in the obvious way?

Re: [Mesa-dev] [PATCH 11/14] radeonsi: decompress to flushed depth texture when required

On 02.07.2016 17:32, Marek Olšák wrote: On Fri, Jul 1, 2016 at 4:25 PM, Nicolai Hähnle wrote: From: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_blit.c | 132 + 1 file changed, 103 insertions(+), 29

Re: [Mesa-dev] [PATCH 05/14] r600g: remove obsolete flushed texture initialization in color surface setup

On 02.07.2016 14:57, Marek Olšák wrote: On Fri, Jul 1, 2016 at 4:25 PM, Nicolai Hähnle wrote: From: Nicolai Hähnle Seems to have been unnecessary for quite some time, and seems like an odd place to do the initialization anyway. Are you sure?

Re: [Mesa-dev] i965/blorp: Use flat vertex inputs instead of uniforms

On Jul 4, 2016 1:05 AM, "Pohjolainen, Topi" wrote: > > On Mon, Jul 04, 2016 at 10:10:03AM +0300, Pohjolainen, Topi wrote: > > On Fri, Jul 01, 2016 at 01:34:41PM -0700, Jason Ekstrand wrote: > > >On Thu, Jun 23, 2016 at 12:16 PM, Topi Pohjolainen > > >

Re: [Mesa-dev] [v2 7/18] i965/blorp: Load tranformation coordinates as vec4

Thanks for the quick turnaround. Patches 6, 6.1, and 7 are Reviewed-by: Jason Ekstrand I assume that the "use flat inputs" patch just tweaks the LOAD_INPUT macro in the obvious way? If so, then we should be good to go. Thanks for working on this! I like blorp not

Re: [Mesa-dev] [PATCH] gm107/ir: fix sign bit emission for FADD32I

Oh wait, we don't fold it in because it's a SUB, duh. So that bit makes sense. I'd slightly prefer flipping the neg modifier, but your call. On Jul 4, 2016 8:17 AM, "Samuel Pitoiset" wrote: > > > On 07/04/2016 01:59 PM, Ilia Mirkin wrote: > >> That flips the sign of

Re: [Mesa-dev] [PATCH] gm107/ir: fix sign bit emission for FADD32I

On 07/04/2016 01:59 PM, Ilia Mirkin wrote: That flips the sign of the immediate. Why not flip 0x35, which is an explicit neg modifier? I guess we mess with the immediate in the other emitters, so r-b either way. Sure, that flips the sign yeah. I guess we mess up with the neg modifier

Re: [Mesa-dev] [PATCH] gm107/ir: fix sign bit emission for FADD32I

That flips the sign of the immediate. Why not flip 0x35, which is an explicit neg modifier? I guess we mess with the immediate in the other emitters, so r-b either way. As an aside, how did you hit this? Should have gotten folded in... On Jul 4, 2016 7:12 AM, "Samuel Pitoiset"

[Mesa-dev] [PATCH] gm107/ir: fix sign bit emission for FADD32I

When emitting OP_SUB, the sign bit for FADD and FADD32I is not at the same position. It's at position 45 for FADD but 51 for FADD32I. This fixes the following piglit test: tests/spec/arb_fragment_program/fdo30337b.shader_test Signed-off-by: Samuel Pitoiset Cc:

Re: [Mesa-dev] [PATCH] gallium/radeon: add and use radeon_info::max_alloc_size (v2)

Reviewed-by: Vedran Miletić On 07/01/2016 04:18 PM, Marek Olšák wrote: From: Marek Olšák v2: - squashed the patches - use INT_MAX - clamp max_const_buffer_size - check the DRM version in radeon --- src/gallium/drivers/r600/r600_pipe.c

Re: [Mesa-dev] [PATCH 01/12] gallium/util: make util_copy_framebuffer_state(src=NULL) work

Patches 1, 2: Reviewed-by: Marek Olšák Marek On Sat, Jul 2, 2016 at 6:52 PM, Rob Clark wrote: > From: Rob Clark > > Be more consistent with the other u_inlines util_copy_xyz_state() > helpers and support NULL src. > >

[Mesa-dev] [Bug 90264] [Regression, bisected] Tooltip corruption in Chrome

https://bugs.freedesktop.org/show_bug.cgi?id=90264 --- Comment #63 from Paviluf --- I still have this problem. I often see part of the previous tooltip. Chrome 51 Fedora 24 Kernel 4.6.3 Nouveau driver The good news is that this bug have been fixed but I don't know in what

Re: [Mesa-dev] i965/blorp: Use flat vertex inputs instead of uniforms

On Mon, Jul 04, 2016 at 10:10:03AM +0300, Pohjolainen, Topi wrote: > On Fri, Jul 01, 2016 at 01:34:41PM -0700, Jason Ekstrand wrote: > >On Thu, Jun 23, 2016 at 12:16 PM, Topi Pohjolainen > ><[1]topi.pohjolai...@intel.com> wrote: > > > > In addition to the actual vertex coordinates

Re: [Mesa-dev] i965/blorp: Use flat vertex inputs instead of uniforms

On Fri, Jul 01, 2016 at 01:34:41PM -0700, Jason Ekstrand wrote: >On Thu, Jun 23, 2016 at 12:16 PM, Topi Pohjolainen ><[1]topi.pohjolai...@intel.com> wrote: > > In addition to the actual vertex coordinates blorp will get another > vertex input buffer providing the constants that

[Mesa-dev] [v2 6.1/18] i965/blorp: Rename LOAD_UNIFORM to LOAD_INPUT

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index

[Mesa-dev] [v2 6/18] i965/blorp: Organize pixel kill and blend/scaled inputs into vec4s

In addition, as these are never used in parallel, add a few assertions. v2 (Jason): Skip some complexity by putting them into a union but pad rectangle grid into a vec4 instead. Also keep the LOAD_UNIFORM macro. Signed-off-by: Topi Pohjolainen

[Mesa-dev] [v2 7/18] i965/blorp: Load tranformation coordinates as vec4

In preparation for loading as flat vertex input. v2: Use LOAD_INPUT() macro Signed-off-by: Topi Pohjolainen Reviewed-by: Jason Ekstrand (v1) --- src/mesa/drivers/dri/i965/brw_blorp.h| 3 +--

Re: [Mesa-dev] Mesa (master): st/glsl_to_tgsi: don't increase immediate index by 1.

On 02.07.2016 16:02, Dave Airlie wrote: > Module: Mesa > Branch: master > Commit: 27d456cc87a01998c6fe1dbf45937e2ca6128495 > URL: > http://cgit.freedesktop.org/mesa/mesa/commit/?id=27d456cc87a01998c6fe1dbf45937e2ca6128495 > > Author: Dave Airlie > Date: Tue Jun 7