Re: [Mesa-dev] [PATCH] mesa: don't attempt to unlock an unlocked debug state mutex

On Tue, Dec 20, 2016 at 11:52:26AM -0800, Kenneth Graunke wrote: > On Tuesday, December 20, 2016 12:08:06 PM PST Jonathan Gray wrote: > > Can someone push this to master? > > Pushed: > > To ssh://git.freedesktop.org/git/mesa/mesa >ab8ea1b..62b8bcd master -> master > > Have you thought

Re: [Mesa-dev] [PATCH 5/6] nir: Add a pass for moving SPIR-V continue blocks to the ends of loops

On Wed, 2016-12-21 at 20:50 -0800, Jason Ekstrand wrote: > On Dec 21, 2016 9:12 PM, "Timothy Arceri" om> wrote: > On Mon, 2016-12-19 at 20:11 -0800, Jason Ekstrand wrote: > > When shaders come in from SPIR-V, we handle continue blocks by > > placing > > the contents

Re: [Mesa-dev] [PATCH 6/6] i965: Use nir_opt_trivial_continues and nir_opt_if

On Dec 21, 2016 9:17 PM, "Timothy Arceri" wrote: On Mon, 2016-12-19 at 20:11 -0800, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/brw_nir.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_nir.c >

Re: [Mesa-dev] [PATCH 5/6] nir: Add a pass for moving SPIR-V continue blocks to the ends of loops

On Dec 21, 2016 9:12 PM, "Timothy Arceri" wrote: On Mon, 2016-12-19 at 20:11 -0800, Jason Ekstrand wrote: > When shaders come in from SPIR-V, we handle continue blocks by > placing > the contents of the continue inside of a "if (!first_iteration)". We > do > this

[Mesa-dev] [PATCH 4/4] llvmpipe: do transpose/untwiddle after conversion for 8bit formats

From: Roland Scheidegger Generally we should do tranpose after conversion, if the format has less than 32 bits per channel (if it has 32 bits, conversion is going to be a no-op anyway...). This is obviously because there's less vectors to deal with. Though the advantage for

[Mesa-dev] [PATCH 3/4] gallivm: generalize 4x4f->1x16ub special case conversion

From: Roland Scheidegger This special packing path can be easily extended to handle not just float->unorm8 but also float->snorm8 and uint32->uint8 and int32->int8 (i.e. all interesting cases for llvmpipe fs backend code). The packing parts all stay the same (only the last

[Mesa-dev] [PATCH 1/4] llvmpipe: use scalar load instead of vectors for small vectors in fs backend

From: Roland Scheidegger llvm has _huge_ problems trying to load things like <4 x i8> vectors and stitching such loads together to form 128bit vectors. My understanding of the problem is that the type legalizer tries to extend that to really a <4 x i32> vector and not a <16 x

[Mesa-dev] [PATCH 2/4] llvmpipe: use alpha from already converted color if possible

From: Roland Scheidegger For rgbx formats, there is no point in doing alpha conversion again (and with different tranpose even, so llvm can't eliminate it). Albeit it looks like there's some minimal changes needed in the blend code (found by code inspection, no test seemed to

Re: [Mesa-dev] [PATCH 6/6] i965: Use nir_opt_trivial_continues and nir_opt_if

On Mon, 2016-12-19 at 20:11 -0800, Jason Ekstrand wrote: > --- >  src/mesa/drivers/dri/i965/brw_nir.c | 2 ++ >  1 file changed, 2 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_nir.c > b/src/mesa/drivers/dri/i965/brw_nir.c > index 0c1fb44..a091861 100644 > ---

Re: [Mesa-dev] [PATCH 5/6] nir: Add a pass for moving SPIR-V continue blocks to the ends of loops

On Mon, 2016-12-19 at 20:11 -0800, Jason Ekstrand wrote: > When shaders come in from SPIR-V, we handle continue blocks by > placing > the contents of the continue inside of a "if (!first_iteration)".  We > do > this so that we can properly handle the fact that continues in SPIR-V > jump to the

Re: [Mesa-dev] [PATCH 4/6] nir: Add an optimization pass to remove trivial continues

On Dec 21, 2016 8:11 PM, "Timothy Arceri" wrote: On Mon, 2016-12-19 at 20:11 -0800, Jason Ekstrand wrote: > --- > src/compiler/Makefile.sources| 1 + > src/compiler/nir/nir.h | 2 + >

[Mesa-dev] [PATCH 13/13] i965: disable loop unrolling in GLSL IR

There is a single regression in loop unrolling which is: loops HURT: shaders/orbital_explorer.shader_test GS SIMD8:0 -> 1 However the loop is huge so it seems reasonable not to unroll it. It's surprising that GLSL IR does unroll it. shader-db results BDW: total instructions in shared

[Mesa-dev] [PATCH 08/13] nir: update fixup_phi_srcs() to handle registers

We need to do this because we partially get out of SSA when unrolling and cloning loops. --- src/compiler/nir/nir_clone.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/compiler/nir/nir_clone.c b/src/compiler/nir/nir_clone.c index fb1558c..91ffe62 100644 ---

[Mesa-dev] [PATCH 12/13] i965: use nir loop unrolling pass

shader-db results for BDW: total instructions in shared programs: 12589614 -> 12590119 (0.00%) instructions in affected programs: 50525 -> 51030 (1.00%) helped: 7 HURT: 145 total cycles in shared programs: 241524604 -> 241490502 (-0.01%) cycles in affected programs: 1941404 -> 1907302 (-1.76%)

[Mesa-dev] [PATCH 07/13] nir: create helper for fixing phi srcs when cloning

This will be useful for fixing phi srcs when cloning a loop body during loop unrolling. Reviewed-by: Jason Ekstrand --- src/compiler/nir/nir_clone.c | 36 +--- 1 file changed, 21 insertions(+), 15 deletions(-) diff --git

[Mesa-dev] [PATCH 11/13] nir: pass compiler rather than devinfo to functions that call nir_optimize

Later we will pass compiler to nir_optimise to be used by the loop unroll pass. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 10 -- src/mesa/drivers/dri/i965/brw_nir.c | 7 --- src/mesa/drivers/dri/i965/brw_nir.h | 4 ++--

[Mesa-dev] [PATCH 09/13] nir: add helper for cloning nir_cf_list

V2: - updated to create a generic list clone helper nir_cf_list_clone() - continue to assert on clone when fallback flag not set as suggested by Jason. Reviewed-by: Jason Ekstrand --- src/compiler/nir/nir_clone.c| 62 +++--

[Mesa-dev] [PATCH 10/13] nir: add a loop unrolling pass

V2: - tidy ups suggested by Connor. - tidy up cloning logic and handle copy propagation based of suggestion by Connor. - use nir_ssa_def_rewrite_uses to fix up lcssa phis suggested by Connor. - add support for complex loop unrolling (two terminators) - handle case were the ssa defs use outside

[Mesa-dev] [PATCH 02/13] i965: allow sampler indirects on all gens

Without this we will regress the max-samplers piglit test on Gen6 and lower when loop unrolling is done in NIR. There is a check in the GLSL IR linker that errors when it finds indirects and EmitNoIndirectSampler is set. As far as I can tell there is no reason for not enabling this for all gens

[Mesa-dev] [PATCH 03/13] i965: use nir_lower_indirect_derefs() for GLSL

This moves the nir_lower_indirect_derefs() call into brw_preprocess_nir() so thats is called by both OpenGL and Vulkan and removes that call to the old GLSL IR pass lower_variable_index_to_cond_assign() We want to do this pass in nir to be able to move loop unrolling to nir. There is a increase

[Mesa-dev] [PATCH 05/13] nir: Add a LCSAA-pass

From: Thomas Helland V2: Do a "depth first search" to convert to LCSSA V3: Small comment fixup V4: Rebase, adapt to removal of function overloads V5: Rebase, adapt to relocation of nir to compiler/nir Still need to adapt to potential if-uses Work around

[Mesa-dev] [PATCH 06/13] nir: don't count removal of lcssa_phi as progress

V2: - make the is_lcssa_phi bool const, suggested by Topi. --- src/compiler/nir/nir_opt_remove_phis.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_opt_remove_phis.c b/src/compiler/nir/nir_opt_remove_phis.c index acaa6e1..99d5d35 100644 ---

[Mesa-dev] [PATCH 04/13] nir: Add a loop analysis pass

From: Thomas Helland This pass detects induction variables and calculates the trip count of loops to be used for loop unrolling. I've removed support for float induction values for now, for the simple reason that they don't appear in my shader-db collection, and so I

[Mesa-dev] [PATCH 01/13] nir: Add a couple quick-and-dirty out-of-SSA helpers

From: Jason Ekstrand These are designed for use within an optimization pass when SSA becomes more pain than it's worth. They're very naive and don't generate anything close to optimal register-based NIR. Also, they may result in shaders which do not validate because of,

[Mesa-dev] V8 Loop unrolling in NIR

V8: - bunch of tidy ups mostly suggestions from Jason. - fixed some regressions since V6 caused by V7 handling less trivial loops. Piglit tests sent to cover these cases. New piglit tests: https://patchwork.freedesktop.org/patch/129066/ This series seems to regress some Vulkan CTS tests but

Re: [Mesa-dev] Mesa commit a5e733c

>From: Rob Clark >On Wed, Dec 21, 2016 at 12:32 PM, Charmaine Lee wrote: >> >> Hi Rob, >> >> Your mesa commit a5e733c mesa: drop current draw/read buffer when ctx is >> released >> is causing rendering issue when running with vmware svga driver. >>

Re: [Mesa-dev] [PATCH 4/6] nir: Add an optimization pass to remove trivial continues

On Mon, 2016-12-19 at 20:11 -0800, Jason Ekstrand wrote: > --- >  src/compiler/Makefile.sources|   1 + >  src/compiler/nir/nir.h   |   2 + >  src/compiler/nir/nir_opt_trivial_continues.c | 141 > +++ >  3 files changed, 144 insertions(+) >

Re: [Mesa-dev] [PATCH 3/6] nir: Expose function_impl versions of copy-prop and dce

Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/6] nir: Correctly handle blocks in cf_node_cf_tree_next

Reviewed-by: Timothy Arceri On Mon, 2016-12-19 at 20:11 -0800, Jason Ekstrand wrote: > --- >  src/compiler/nir/nir.c | 2 +- >  1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c > index e522a67..b8d1abd

[Mesa-dev] [PATCH] radv: set some proper values for interp offset limits.

From: Dave Airlie These are taken from the amdgpu-pro driver, and cause no CTS change. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_device.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_device.c

Re: [Mesa-dev] [PATCH] radv: fix dual source blending

On Monday 19 December 2016, Bas Nieuwenhuizen wrote: > Reviewed-by: Bas Nieuwenhuizen > > Does dual source blending work now with this patch? And do you need me > to commit it? It does for me. And no, I believe I have commit access. Thanks for the review! > - Bas >

[Mesa-dev] [PATCH] radv: bump texel offsets to align with radeonsi

From: Dave Airlie it appears from the amdgpu-pro results the hw can do more, but let's just align with radeonsi for now. No CTS regressions. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_device.c | 8 1 file changed, 4 insertions(+), 4

Re: [Mesa-dev] [PATCH] radv: enable shaderStorageImageExtendedFormats

Not sure why this was disabled in the first place? Reviewed-by: Bas Nieuwenhuizen On Thu, Dec 22, 2016 at 1:21 AM, Dave Airlie wrote: > From: Dave Airlie > > This passes all the CTS tests that get enabled for this. > >

[Mesa-dev] [PATCH] radv: enable shaderStorageImageExtendedFormats

From: Dave Airlie This passes all the CTS tests that get enabled for this. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device.c

Re: [Mesa-dev] [PATCH] radv: enable shaderGatherImageExtended

Reviewed-by: Bas Nieuwenhuizen On Thu, Dec 22, 2016 at 12:46 AM, Dave Airlie wrote: > From: Dave Airlie > > Thanks to Ilia's patch this works fine on radv. > > No regressions in CTS, all enabled tests pass. > > Signed-off-by:

[Mesa-dev] [PATCH] radv: enable shaderGatherImageExtended

From: Dave Airlie Thanks to Ilia's patch this works fine on radv. No regressions in CTS, all enabled tests pass. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH] radv/image: only touch queue family info for concurrent images.

Acked-by: Edward O'Callaghan On 12/22/2016 10:30 AM, Dave Airlie wrote: > From: Dave Airlie > > The spec says to ignore these fields for exclusive images. > > Fixes crashes in: > dEQP-VK.clipping.* > > Signed-off-by: Dave Airlie

[Mesa-dev] [PATCH] radv/image: only touch queue family info for concurrent images.

From: Dave Airlie The spec says to ignore these fields for exclusive images. Fixes crashes in: dEQP-VK.clipping.* Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_image.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH V3 1/2] nir: update nir_lower_returns to only predicate instructions when needed

Unless an if statement contains nested returns we can simply add any following instructions to the branch without the return. V2: fix handling if_nested_return value when there is a sibling if/loop that doesn't contain a return. (Spotted by Ken) V3: - add a better comment to the new variable -

[Mesa-dev] [PATCH 2/2] i965: make use of nir_lower_returns() for GL

Fixes two new piglit tests: spec/glsl-1.10/execution/vs-nested-return-sibling-loop.shader_test spec/glsl-1.10/execution/vs-nested-return-sibling-loop2.shader_test shader-db results for BDW: total instructions in shared programs: 12903158 -> 12903134 (-0.00%) instructions in affected programs:

[Mesa-dev] [PATCH 3/6] gallium/hud: move file initialization to a function

The function will be used later to create the filedescriptor for other metrics. --- src/gallium/auxiliary/hud/hud_context.c | 17 + src/gallium/auxiliary/hud/hud_driver_query.c | 12 +--- src/gallium/auxiliary/hud/hud_private.h | 2 ++ 3 files changed, 20

[Mesa-dev] [PATCH 1/6] gallium/hud: dump hud_driver_query values to files

Dump values for every selected data source in GALLIUM_HUD. Every data source has its own file and the filename is equal to the data source identifier. --- src/gallium/auxiliary/hud/hud_context.c | 6 ++ src/gallium/auxiliary/hud/hud_driver_query.c | 2 ++

[Mesa-dev] [PATCH 6/6] docs: document GALLIUM_HUD_DUMP_DIR envvar

--- docs/envvars.html | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/envvars.html b/docs/envvars.html index 5dd7bab..9eee8db 100644 --- a/docs/envvars.html +++ b/docs/envvars.html @@ -219,6 +219,8 @@ Mesa EGL supports different sets of environment variables. See the disable for

[Mesa-dev] [PATCH 5/6] gallium/hud: set filedescriptor for fps graph

--- src/gallium/auxiliary/hud/hud_fps.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/auxiliary/hud/hud_fps.c b/src/gallium/auxiliary/hud/hud_fps.c index a360bc2..ddf30e4 100644 --- a/src/gallium/auxiliary/hud/hud_fps.c +++ b/src/gallium/auxiliary/hud/hud_fps.c @@ -88,5 +88,7

[Mesa-dev] [PATCH 4/6] gallium/hud: set filedescriptor for cpu graph

--- src/gallium/auxiliary/hud/hud_cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/auxiliary/hud/hud_cpu.c b/src/gallium/auxiliary/hud/hud_cpu.c index c06e777..c65444e 100644 --- a/src/gallium/auxiliary/hud/hud_cpu.c +++ b/src/gallium/auxiliary/hud/hud_cpu.c @@ -213,6

[Mesa-dev] [PATCH 2/6] gallium/hud: add dump directory enviroment variable

Set GALLIUM_HUD_DUMP_DIR to dump values to files in this directory. No values are dumped if the environment variable is not set, the directory doesn't exist or the user doesn't have write access. --- src/gallium/auxiliary/hud/hud_driver_query.c | 12 +++- 1 file changed, 11

[Mesa-dev] [RFC 0/6] gallium/hud: write displayed graph values into files

Introduce a new envvar (GALLIUM_HUD_DUMP_DIR) to write the displayed hud values into files. For example: GALLIUM_HUD_DUMP_DIR="/tmp/" GALLIUM_HUD="fps,cpu+GPU-load" glxgears In the /tmp directory it will create 3 files (fps, cpu and GPU-load) with all the values inside.

Re: [Mesa-dev] [PATCH 1/2] radeonsi: add Polaris12 support (v3)

On Wed, Dec 21, 2016 at 9:40 AM, Andreas Boll wrote: > 2016-12-20 16:31 GMT+01:00 Alex Deucher : >> On Tue, Dec 20, 2016 at 6:49 AM, Andreas Boll >> wrote: >>> 2016-12-19 23:45 GMT+01:00 Alex Deucher

Re: [Mesa-dev] Mesa commit a5e733c

On Wed, Dec 21, 2016 at 12:32 PM, Charmaine Lee wrote: > > Hi Rob, > > Your mesa commit a5e733c mesa: drop current draw/read buffer when ctx is > released > is causing rendering issue when running with vmware svga driver. > > The problem is when the winsys draw/read

Re: [Mesa-dev] [PATCH 04/12] nir: Add a LCSAA-pass

On Tue, Dec 20, 2016 at 8:03 PM, Timothy Arceri < timothy.arc...@collabora.com> wrote: > On Tue, 2016-12-20 at 15:14 -0800, Jason Ekstrand wrote: > > I did have a couple of "real" comments on this one that I'd like to > > at least see a reply to. Does look pretty good though. > > > > On Sun, Dec

Re: [Mesa-dev] [PATCH v3 0/7] Add support for ARB_transform_feedback_overflow_query.

Bumping this thread on the list. Does anyone have some spare time to review it, please? :D It's still applying cleanly on master. And I believe all the suggestions were incorporated already. Thanks, Rafael On Tue, Dec 13, 2016 at 02:50:52PM -0800, Rafael Antognolli wrote: > This patch series

Re: [Mesa-dev] [PATCH 1/2] nir: update nir_lower_returns to only predicate instructions when needed

Ok... Different set of comments. Now, with less bogosity! On Mon, Dec 19, 2016 at 8:18 PM, Timothy Arceri < timothy.arc...@collabora.com> wrote: > Unless an if statement contains nested returns we can simply add > any following instructions to the branch without the return. > > V2: fix handling

Re: [Mesa-dev] [PATCH v2 000/103] i965 Haswell ARB_gpu_shader_fp64 / OpenGL 4.0

On Wed, Dec 21, 2016 at 10:01 AM, Matt Turner wrote: > On Tue, Oct 11, 2016 at 4:01 AM, Iago Toral Quiroga wrote: >> i965/disasm: fix subreg for dst in Align16 mode > > I just noticed that this commit has a rebase mistake. Tim changed the > code in July

Re: [Mesa-dev] [PATCH v2 000/103] i965 Haswell ARB_gpu_shader_fp64 / OpenGL 4.0

On Tue, Oct 11, 2016 at 4:01 AM, Iago Toral Quiroga wrote: > i965/disasm: fix subreg for dst in Align16 mode I just noticed that this commit has a rebase mistake. Tim changed the code in July to use PRIu64, but this patch reverts back to %u.

Re: [Mesa-dev] [PATCH v2] egl/dri2: implement query surface hook

Tested-by: Mark Janes Tapani Pälli writes: > This makes better guarantee that the values we return are > in sync what the underlying drawable currently has. > > Together with dEQP change in bug #98327 this fixes following test: > >

Re: [Mesa-dev] [PATCH 1/2] radeonsi: add Polaris12 support (v3)

2016-12-20 16:31 GMT+01:00 Alex Deucher : > On Tue, Dec 20, 2016 at 6:49 AM, Andreas Boll > wrote: >> 2016-12-19 23:45 GMT+01:00 Alex Deucher : >>> From: Junwei Zhang >>> >>> v2: use gfxip names for

Re: [Mesa-dev] [PATCH] loader: Add vim modeline

On Wed, Dec 21, 2016 at 9:15 AM, Thierry Reding wrote: > On Wed, Dec 21, 2016 at 08:49:18AM -0500, Ilia Mirkin wrote: >> So you want every file to have a modeline for every editor? Is there no way >> to do this at the directory level, like you can with emacs? I thought

Re: [Mesa-dev] [PATCH] loader: Add vim modeline

On Wed, Dec 21, 2016 at 08:49:18AM -0500, Ilia Mirkin wrote: > So you want every file to have a modeline for every editor? Is there no way > to do this at the directory level, like you can with emacs? I thought there > was some editorconfig thing... I'm sure there are ways to do that, I was

Re: [Mesa-dev] [PATCH] loader: Add vim modeline

So you want every file to have a modeline for every editor? Is there no way to do this at the directory level, like you can with emacs? I thought there was some editorconfig thing... On Dec 21, 2016 8:44 AM, "Thierry Reding" wrote: From: Thierry Reding

[Mesa-dev] [PATCH] loader: Add vim modeline

From: Thierry Reding Add a vim modeline that defines the identation style used in this file. This is useful to avoid vim's defaults (8-column tabs) from getting in the way. While at it, fix up a few cases where inconsistent indentation is used. Signed-off-by: Thierry Reding

[Mesa-dev] [PATCH v2] clover: Use Clang's diagnostics

Presently errors from frontend are handled only if they occur in clang::CompilerInvocation::CreateFromArgs(). This patch uses clang::DiagnosticsEngine to detect errors such as invalid values for Clang frontend arguments. Fixes Piglit's cl/program/build/fail/invalid-version-declaration.cl test.

Re: [Mesa-dev] [PATCH 4/5] ttn: handle GLSL_SAMPLER_DIM_SUBPASS_MS case

Reviewed-by: Samuel Iglesias Gonsálvez On Thu, 2016-11-24 at 13:36 +0100, Juan A. Suarez Romero wrote: > Fixes a warning. > --- >  src/gallium/auxiliary/nir/tgsi_to_nir.c | 1 + >  1 file changed, 1 insertion(+) > > diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c >

Re: [Mesa-dev] [PATCH] i965: allow unsourced enabled VAO

Reviewed-by: Samuel Iglesias Gonsálvez On Thu, 2016-11-03 at 11:02 +0100, Juan A. Suarez Romero wrote: > The GL 4.5 spec says: > "If any enabled array’s buffer binding is zero when DrawArrays > or one of the other drawing commands defined in section 10.4 is >

Re: [Mesa-dev] [PATCH 4/5] ttn: handle GLSL_SAMPLER_DIM_SUBPASS_MS case

Gently pinging if someone could do a quick review. Thanks in advance! J.A. On Thu, 2016-11-24 at 13:36 +0100, Juan A. Suarez Romero wrote: > Fixes a warning. > --- >  src/gallium/auxiliary/nir/tgsi_to_nir.c | 1 + >  1 file changed, 1 insertion(+) > > diff --git

[Mesa-dev] [PATCH] gbm-dri: Duplicate image after checking its format.

From: Mateusz Polrola If image will be duplicated before checking if its format is supported it may leak memory, as duplicated image for non supported formats is not being destroyed. Signed-off-by: Mateusz Polrola ---

[Mesa-dev] [PATCH v2] egl/dri2: implement query surface hook

This makes better guarantee that the values we return are in sync what the underlying drawable currently has. Together with dEQP change in bug #98327 this fixes following test: dEQP-EGL.functional.resize.surface_size.grow v2: avoid unnecessary x11 roundtrips (Chad Versace) Signed-off-by: