Re: [Mesa-dev] i965: On-demand render target flushing

Jason, Curro, do you have any opinion if this is worth pursuing? I need something for blorp blits at least - using blorp for texture uploads on top of current excessive flushing regresses perf. When working on gpu hangs on SKL we also identified compute flushing caches it shouldn't. I think

Re: [Mesa-dev] [PATCH] i965: Use WARN_ONCE instead of open coding it.

Rb On March 28, 2017 21:51:06 Kenneth Graunke wrote: --- src/mesa/drivers/dri/i965/brw_compute.c | 13 - 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_compute.c b/src/mesa/drivers/dri/i965/brw_compute.c index

Re: [Mesa-dev] [PATCH] i965: Combine intel_batchbuffer_reloc and intel_batchbuffer_reloc64

Reviewed-by: Jason Ekstrand On March 28, 2017 21:50:54 Kenneth Graunke wrote: These two functions do the exact same thing. One returns a uint64_t, and the other takes the same uint64_t and truncates it to a uint32_t. We only need the uint64_t

[Mesa-dev] [PATCH 1/2] mesa/glthread: add async support to glProgramUniform*() functions

--- src/mapi/glapi/gen/ARB_separate_shader_objects.xml | 68 +++--- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/src/mapi/glapi/gen/ARB_separate_shader_objects.xml b/src/mapi/glapi/gen/ARB_separate_shader_objects.xml index c9f481d..26a7afa 100644 ---

[Mesa-dev] [PATCH 2/2] mesa/glthread: fallback to sync if count validation fails

The old code would sync and then throw a cryptic error message. There is no need for a custome error, we can just fallback to the real function and have it do proper validation. Fixes piglit test: glsl-uniform-out-of-bounds Which was returning the wrong error code. ---

Re: [Mesa-dev] [PATCH] AndroidIA: android: Pass sse4.1 flag as appropriate.

Reviewed-by: Tapani Pälli On 03/28/2017 09:38 PM, Harish Krupo wrote: We have functions which depend on sse4.1 support but we didnt pass the right compile flag for it. This patch fixes it. Signed-off-by: Kalyan Kondapally Signed-off-by:

[Mesa-dev] [PATCH] radv: move to using nir clip/cull merge pass.

From: Dave Airlie Doing this before tessellation makes doing some bits of tessellation a bit cleaner. It also cleans up a bit of the llvm generator code. Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 144

[Mesa-dev] [PATCH] i965: Use WARN_ONCE instead of open coding it.

--- src/mesa/drivers/dri/i965/brw_compute.c | 13 - 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_compute.c b/src/mesa/drivers/dri/i965/brw_compute.c index 16b5df7ca4e..21da2ad17b5 100644 --- a/src/mesa/drivers/dri/i965/brw_compute.c +++

[Mesa-dev] [PATCH] i965: Combine intel_batchbuffer_reloc and intel_batchbuffer_reloc64

These two functions do the exact same thing. One returns a uint64_t, and the other takes the same uint64_t and truncates it to a uint32_t. We only need the uint64_t variant - the caller can truncate if it wants. This patch gives us one function, intel_batchbuffer_reloc, that does the 64-bit

[Mesa-dev] [Bug 100441] glsl/tests/optimization-test.sh regression

https://bugs.freedesktop.org/show_bug.cgi?id=100441 Bug ID: 100441 Summary: glsl/tests/optimization-test.sh regression Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: All Status: NEW Keywords:

[Mesa-dev] [PATCH] mesa/glthread: print out syncs when MARSHAL_MAX_CMD_SIZE is exceeded

--- src/mapi/glapi/gen/gl_marshal.py | 1 + src/mesa/main/marshal.h | 13 + 2 files changed, 14 insertions(+) diff --git a/src/mapi/glapi/gen/gl_marshal.py b/src/mapi/glapi/gen/gl_marshal.py index c89d397..9639f9c 100644 --- a/src/mapi/glapi/gen/gl_marshal.py +++

Re: [Mesa-dev] [PATCH v2 0/6] radv sparseBinding

On 29 March 2017 at 10:03, Bas Nieuwenhuizen wrote: > This series introduces the sparseBinding capability to radv. > > I've mostly rebased & clarified the core remapping algorithm in patch 1, > as well as fixed some bugs that I found. > > No regressions on CTS, all new

[Mesa-dev] [PATCH v2 2/2] anv: Advertise larger heap sizes

Instead of just advertising the aperture size, we do something more intelligent. On systems with a full 48-bit PPGTT, we can address 100% of the available system RAM from the GPU. In order to keep clients from burning 100% of your available RAM for graphics resources, we have a nice little

[Mesa-dev] [PATCH v2 1/2] anv: Add support for 48-bit addresses

This commit adds support for using the full 48-bit address space on Broadwell and newer hardware. Thanks to certain limitations, not all objects can be placed above the 32-bit boundary. In particular, general and state base address need to live within 32 bits. (See also

[Mesa-dev] [PATCH v2 0/2] anv: Use the full 48-bit address space

This patch series is largely a re-send of the series with a couple of tweaks to patch 1. Most notably, I did a bunch of digging as to why allowing dynamic and instruction state buffers to get a 48-bit address is problematic. The details are in the big fat comment I added to

Re: [Mesa-dev] [PATCH v5 1/5] genxml: New generated header genX_bits.h (v5)

On 28 March 2017 at 20:43, Chad Versace wrote: > On Tue 28 Mar 2017, Emil Velikov wrote: >> Hi Chad, >> >> On 25 March 2017 at 02:28, Chad Versace wrote: >> > genX_bits.h contains the sizes of bitfields in genxml instructions, >> > structures,

[Mesa-dev] [Bug 100424] X hang (in kernel) after some event in Serious Sam Fusion using radv. 4.9/and-staging-4.9

https://bugs.freedesktop.org/show_bug.cgi?id=100424 --- Comment #3 from Darren Salt --- Happening with 4.11-rc4; essentially the same backtrace. I'll try bumping llvm next (probably to 4.0~svn294803), although I expect little difference. -- You are receiving this

[Mesa-dev] [Bug 100424] X hang (in kernel) after some event in Serious Sam Fusion using radv. 4.9/amd-staging-4.9

https://bugs.freedesktop.org/show_bug.cgi?id=100424 Darren Salt changed: What|Removed |Added Summary|X hang (in kernel) after|X hang (in

[Mesa-dev] [PATCH] anv/batch_chain: Handle another OOM in cmd_buffer_execbuf

Found by inspection while rebasing other patches. --- src/intel/vulkan/anv_batch_chain.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c index 5d7abc6..5a6c0ba 100644 ---

Re: [Mesa-dev] [PATCH v2 01/10] swr: [rasterizer codegen] Refactor codegen

Hi Tim, On 27 March 2017 at 17:17, Tim Rowley wrote: > Move common codegen functions into gen_common.py. > > v2: change gen_knobs.py to find the template file internally, like > the rest of the gen scripts. Hard-coding file names and location inside generator scripts

[Mesa-dev] [Bug 100438] glsl/ir.cpp:1376: ir_dereference_variable::ir_dereference_variable(ir_variable*): Assertion `var != NULL' failed.

https://bugs.freedesktop.org/show_bug.cgi?id=100438 --- Comment #1 from Timothy Arceri --- (In reply to Vinson Lee from comment #0) > mesa: 7ee91af30074a4381e4353122319e3b4b3fe7cbd (master 17.1.0-devel) > > This GLSL shader triggers an assert. > > void main() > { >

[Mesa-dev] [PATCH v2 3/6] radv: Implement sparse image creation.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_image.c | 23 +-- src/amd/vulkan/radv_private.h | 1 + 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index

[Mesa-dev] [PATCH v2 4/6] radv: Implement sparse memory binding.

v2: Only submit when semaphores are specified. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_device.c | 84 +--- 1 file changed, 80 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_device.c

[Mesa-dev] [PATCH v2 6/6] radv: Enable sparseBinding feature.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_device.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index d10d420c3cf..64970bd1b3a 100644 ---

[Mesa-dev] [PATCH v2 5/6] radv/amdgpu: Use reference counting for bos.

Per the Vulkan spec, memory objects may be deleted before the buffers and images using them are deleted, although those resources then cannot be used except for deletion themselves. For the virtual buffers, we need to access them on resource destruction to unmap the regions, so this results in a

[Mesa-dev] [PATCH v2 1/6] radv/amdgpu: Add winsys implementation of virtual buffers.

v2: - Added comments. - Fixed a double unmap bug. - Actually unmap the non-edge old ranges. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_radeon_winsys.h | 5 + src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 237 +++---

[Mesa-dev] [PATCH v2 0/6] radv sparseBinding

This series introduces the sparseBinding capability to radv. I've mostly rebased & clarified the core remapping algorithm in patch 1, as well as fixed some bugs that I found. No regressions on CTS, all new non-skipping tests (~400) pass. Bas Nieuwenhuizen (6): radv/amdgpu: Add winsys

[Mesa-dev] [PATCH v2 2/6] radv: Implement sparse buffer creation.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_device.c | 22 -- src/amd/vulkan/radv_private.h | 1 + 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index

Re: [Mesa-dev] [PATCH 2/3] anv: Flush caches prior to PIPELINE_SELECT on all gens

On Tue, Mar 28, 2017 at 7:07 AM, Emil Velikov wrote: > Hi all, > > On 15 March 2017 at 18:58, Jason Ekstrand wrote: > > The programming note that says we need to do this still exists in the > > SkyLake PRM and, from looking at the bspec, seems to

Re: [Mesa-dev] [PATCH v2 04/18] util/vk: Add helpers for finding an extension struct

Already upstream. On Mon 13 Mar 2017, Jason Ekstrand wrote: > --- > src/util/vk_util.h | 17 + > 1 file changed, 17 insertions(+) > > diff --git a/src/util/vk_util.h b/src/util/vk_util.h > index e0b5d0b..0b9cb47 100644 > --- a/src/util/vk_util.h > +++ b/src/util/vk_util.h > @@

Re: [Mesa-dev] [PATCH v2 03/18] anv/physical_device: Rename uuid to pipeline_cache_uuid

On Mon 13 Mar 2017, Jason Ekstrand wrote: > We're about to have more UUIDs for different things so this one really > needs to be properly labeled. > --- > src/intel/vulkan/anv_device.c | 5 +++-- > src/intel/vulkan/anv_pipeline_cache.c | 4 ++-- > src/intel/vulkan/anv_private.h| 2

Re: [Mesa-dev] [PATCH v2 02/18] anv: Refactor device_get_cache_uuid into physical_device_init_uuids

On Mon 13 Mar 2017, Jason Ekstrand wrote: > --- > src/intel/vulkan/anv_device.c | 31 +-- > 1 file changed, 17 insertions(+), 14 deletions(-) > > diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c > index 5db0a6c..13c1c50 100644 > ---

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

On 29/03/17 03:59, Emil Velikov wrote: Hi Chad, On 24 March 2017 at 20:44, Chad Versace wrote: On Tue 21 Mar 2017, Matt Turner wrote: On Mon, Mar 20, 2017 at 12:39 PM, Emil Velikov wrote: On 20 March 2017 at 18:30, Matt Turner

[Mesa-dev] [Bug 100438] glsl/ir.cpp:1376: ir_dereference_variable::ir_dereference_variable(ir_variable*): Assertion `var != NULL' failed.

https://bugs.freedesktop.org/show_bug.cgi?id=100438 Bug ID: 100438 Summary: glsl/ir.cpp:1376: ir_dereference_variable::ir_dereference_variable(ir_va riable*): Assertion `var != NULL' failed. Product: Mesa

[Mesa-dev] [PATCH v3] swr: [rasterizer codegen] Fix windows build

Fix codegen build break that was introduced earlier v2: update rules for gen_knobs.cpp and gen_knobs.h v3: Introduce bldroot and revert generator file changes, making patch simpler. --- src/gallium/drivers/swr/SConscript | 38 +++--- 1 file changed, 31

[Mesa-dev] [PATCH 2/2] anv: Query the kernel for reset status

When a client causes a GPU hang (or experiences issues due to a hang in another client) we want to let it know as soon as possible. In particular, if it submits work with a fence and calls vkWaitForFences or vkQueueQaitIdle and it returns VK_SUCCESS, then the client should be able to trust the

[Mesa-dev] [PATCH 1/2] anv: Check for device loss at the end of WaitForFences

It's possible that the device could have been lost while we were waiting. We should let the user know if this has happened. --- src/intel/vulkan/anv_device.c | 19 ++- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/src/intel/vulkan/anv_device.c

[Mesa-dev] [Bug 100201] llvmpipe Windows scons build with MSVC toolchain and LLVM 4.0 fails

https://bugs.freedesktop.org/show_bug.cgi?id=100201 --- Comment #7 from Jose Fonseca --- The links errors are possibly due to Mesa and LLVM not being built exactly with the same compiler as Mesa, no? Or perhaps we need to update mesa/scons/llvm.py with a special case for

Re: [Mesa-dev] Meson mesademos (Was: [RFC libdrm 0/2] Replace the build system with meson)

Quoting Jose Fonseca (2017-03-28 13:45:57) > On 28/03/17 21:32, Dylan Baker wrote: > > Quoting Jose Fonseca (2017-03-28 09:19:48) > >> On 28/03/17 00:12, Dylan Baker wrote: > >>> Quoting Jose Fonseca (2017-03-27 09:58:59) > On 27/03/17 17:42, Dylan Baker wrote: > > Quoting Jose Fonseca

[Mesa-dev] [Bug 100425] glGenFramebuffersEXT appears to be null on (some?) Mesa 12.0.6 systems

https://bugs.freedesktop.org/show_bug.cgi?id=100425 Timothy Arceri changed: What|Removed |Added Status|NEEDINFO|RESOLVED

Re: [Mesa-dev] Meson mesademos (Was: [RFC libdrm 0/2] Replace the build system with meson)

On 28/03/17 21:32, Dylan Baker wrote: Quoting Jose Fonseca (2017-03-28 09:19:48) On 28/03/17 00:12, Dylan Baker wrote: Quoting Jose Fonseca (2017-03-27 09:58:59) On 27/03/17 17:42, Dylan Baker wrote: Quoting Jose Fonseca (2017-03-27 09:31:04) On 27/03/17 17:24, Dylan Baker wrote: Quoting

[Mesa-dev] [PATCH] st: Add cubeMapFace parameter to st_finalize_texture.

st_finalize_texture always accesses image at face 0, but it may not be set if we are working with cubemap that had other face set. This fixes crash in piglit same-attachment-glFramebufferTexture2D-GL_DEPTH_STENCIL_ATTACHMENT. --- Hi, this is my attempt to fix crash in piglit test

Re: [Mesa-dev] [PATCH] mesa glthread: allow asynchronous pixel transfer operation when a buffer is bound

On Mon, 27 Mar 2017 16:10:32 +0200 Gregory Hainaut wrote: > Hello, > > Sorry I was in vacation. I will update my patch with a hash map to > trace buffer creation/destruction. > > Cheers, > Gregory > > On 3/20/17, Nicolai Hähnle wrote: > > On

Re: [Mesa-dev] [PATCH] gbm/dri: Flush after unmap

Thomas Hellstrom writes: > Drivers may queue dma operations on the context at unmap time so we need > to flush to make sure the data gets to the bo. Ideally the application > would take care of this, but since there appears to be no exported gbm > flush functionality we

Re: [Mesa-dev] Meson mesademos (Was: [RFC libdrm 0/2] Replace the build system with meson)

Quoting Jose Fonseca (2017-03-28 09:19:48) > On 28/03/17 00:12, Dylan Baker wrote: > > Quoting Jose Fonseca (2017-03-27 09:58:59) > >> On 27/03/17 17:42, Dylan Baker wrote: > >>> Quoting Jose Fonseca (2017-03-27 09:31:04) > On 27/03/17 17:24, Dylan Baker wrote: > > Quoting Jose Fonseca

[Mesa-dev] [PATCH] radv: Assert when setting 0 registers in a sequence.

To catch more of those hangs early. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cs.h | 4 1 file changed, 4 insertions(+) diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h index 2c8935f3065..8fcdad9dbbd 100644 --- a/src/amd/vulkan/radv_cs.h

Re: [Mesa-dev] [PATCH 10/11] etnaviv: add support for rb swap

Hi Lucas 2017-03-27 10:40 GMT+02:00 Lucas Stach : > Am Sonntag, den 26.03.2017, 16:13 +0200 schrieb Christian Gmeiner: >> If we render to rb swapped format we will create a shader variant doing >> the involved swizzing in the pixel shader. >> >> Signed-off-by: Christian

Re: [Mesa-dev] [PATCH 09/11] etnaviv: adopt shader-db output for variant support

Hi Lucas 2017-03-27 10:43 GMT+02:00 Lucas Stach : > Am Sonntag, den 26.03.2017, 16:13 +0200 schrieb Christian Gmeiner: >> Signed-off-by: Christian Gmeiner > > s/adopt/adapt in the subject > Fixed locally. > Reviewed-by: Lucas Stach

Re: [Mesa-dev] [PATCH 07/11] etnaviv: add etna_shader_key and generate variants if needed

Hi Lucas >> diff --git a/src/gallium/drivers/etnaviv/etnaviv_shader.h >> b/src/gallium/drivers/etnaviv/etnaviv_shader.h >> index 9f26bef..b0d97a7 100644 >> --- a/src/gallium/drivers/etnaviv/etnaviv_shader.h >> +++ b/src/gallium/drivers/etnaviv/etnaviv_shader.h >> @@ -32,6 +32,21 @@ >> struct

Re: [Mesa-dev] [PATCH v2 07/25] trace: add resource_commit pass-through

Patches 6 & 7 return void, but patch 5 defines the return type as bool. With those fixed, patches 5-7 are: Reviewed-by: Marek Olšák Marek On Tue, Mar 28, 2017 at 11:11 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > --- >

Re: [Mesa-dev] [PATCH 2/2] mesa: load a user defined drirc file specified via an environment variable

On Tue, Mar 28, 2017 at 9:31 PM, Eric Anholt wrote: > Edmondo Tommasina writes: > >> On Mon, Mar 27, 2017 at 11:32 PM, Eric Anholt wrote: >>> Edmondo Tommasina writes: >>> On Mon, Mar 27, 2017 at

Re: [Mesa-dev] [PATCH v2 05/25] gallium: add sparse buffer interface and capability

On Tue, Mar 28, 2017 at 11:11 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > TODO fill out caps in all drivers > > v2: > - explain the resource_commit interface in more detail > --- > src/gallium/docs/source/context.rst | 25

Re: [Mesa-dev] [PATCH v5 1/5] genxml: New generated header genX_bits.h (v5)

On Tue 28 Mar 2017, Emil Velikov wrote: > Hi Chad, > > On 25 March 2017 at 02:28, Chad Versace wrote: > > genX_bits.h contains the sizes of bitfields in genxml instructions, > > structures, and registers. It also defines some functions to query those > > sizes. > > > >

[Mesa-dev] [PATCH] gbm/dri: Flush after unmap

Drivers may queue dma operations on the context at unmap time so we need to flush to make sure the data gets to the bo. Ideally the application would take care of this, but since there appears to be no exported gbm flush functionality we need to explicitly flush at unmap time. This fixes a

Re: [Mesa-dev] [PATCH 4/5] r600g: use a clever alignment for index buffer uploads

Actually nevermind. Patches 1-3: Reviewed-by: Marek Olšák Patches 4-5: These have no effect, because r600g hw doesn't use TC for index fetches. Marek On Tue, Mar 28, 2017 at 9:33 PM, Marek Olšák wrote: > BTW, I don't know if tcc_cache_line_size has the

Re: [Mesa-dev] [PATCH 4/5] r600g: use a clever alignment for index buffer uploads

Ok, I can look it up. Is there some docs where I find the right alignment value? On 28.03.2017 22:33, Marek Olšák wrote: > BTW, I don't know if tcc_cache_line_size has the correct value for > pre-GCN chips. > > Marek > > On Sun, Mar 26, 2017 at 5:36 PM, Constantine Kharlamov >

Re: [Mesa-dev] [PATCH 4/5] r600g: use a clever alignment for index buffer uploads

BTW, I don't know if tcc_cache_line_size has the correct value for pre-GCN chips. Marek On Sun, Mar 26, 2017 at 5:36 PM, Constantine Kharlamov wrote: > Stolen from radeonsi > > Signed-off-by: Constantine Kharlamov > --- >

Re: [Mesa-dev] [PATCH 2/2] mesa: load a user defined drirc file specified via an environment variable

Edmondo Tommasina writes: > On Mon, Mar 27, 2017 at 11:32 PM, Eric Anholt wrote: >> Edmondo Tommasina writes: >> >>> On Mon, Mar 27, 2017 at 6:05 PM, Eric Anholt wrote: Edmondo Tommasina

Re: [Mesa-dev] [PATCH 03/11] etnaviv: add basic shader variant support

Hi Lucas, 2017-03-27 10:56 GMT+02:00 Lucas Stach : > Am Sonntag, den 26.03.2017, 16:13 +0200 schrieb Christian Gmeiner: >> This commit adds some basic infrastructure to handle shader >> variants. We are still creating exactly one shader variant >> for each shader. >> >>

Re: [Mesa-dev] [PATCH 4/5] radv: move calculating fragment shader i/os to pipeline.

On 28 March 2017 at 21:05, Alex Smith wrote: > Hi Dave, > > This commit is causing some GPU hangs for us, on Polaris cards at least (470 > and 480). > > It also causes hangs in Dota 2 (on the initial logo screen at startup). > > Seems to be caused by the change to set

Re: [Mesa-dev] [PATCH 2/2] mesa: load a user defined drirc file specified via an environment variable

On Mon, Mar 27, 2017 at 11:32 PM, Eric Anholt wrote: > Edmondo Tommasina writes: > >> On Mon, Mar 27, 2017 at 6:05 PM, Eric Anholt wrote: >>> Edmondo Tommasina writes: >>> Define a new

Re: [Mesa-dev] [PATCH] st/nine: Fix support for ps 1.4 dw and dz modifiers

This probably should be CC Mesa 17 stable. I'll add it before push. On 26/03/2017 23:00, Axel Davy wrote: RCP was used incorrectly to support NINED3DSPSM_DW and NINED3DSPSM_DZ. src.x as used as input instead of src.w or src.z. Fixes: https://github.com/iXit/Mesa-3D/issues/271 Signed-off-by:

Re: [Mesa-dev] [PATCH v2 1/2] intel: android: remove libdrm_intel requirement

On Tuesday, March 28, 2017 7:47:39 AM PDT Emil Velikov wrote: > From: Emil Velikov > > The only part which requires libdrm_intel tools/aubinator is not built > on Android. > > Signed-off-by: Emil Velikov > --- > What was 1/3 of the series

Re: [Mesa-dev] [Mesa-stable] [PATCH] radv: Reduce number of max descriptor sets to 4.

On Tue, Mar 28, 2017 at 4:12 PM, Emil Velikov wrote: > On 17 March 2017 at 08:42, Bas Nieuwenhuizen wrote: >> We never supported more, as we can run out of user SGPRs on the VS. >> >> Fixes: f4e499ec791 ("radv: add initial non-conformant radv

Re: [Mesa-dev] [PATCH] radv: Invalidate L2 for TRANSFER_WRITE barriers

On Tue, Mar 28, 2017 at 6:31 PM, Alex Smith wrote: > On 28 March 2017 at 17:09, Emil Velikov wrote: >> >> On 22 March 2017 at 10:06, Bas Nieuwenhuizen >> wrote: >> > On Tue, Mar 21, 2017 at 1:02 PM, Alex Smith >> >

Re: [Mesa-dev] Meson mesademos (Was: [RFC libdrm 0/2] Replace the build system with meson)

On 03/28/2017 11:19 AM, Dylan Baker wrote: Quoting Jose Fonseca (2017-03-28 09:19:48) On 28/03/17 00:12, Dylan Baker wrote: Okay, I have libepoxy working for windows. I also got libepoxy working as a subproject, but it took a bit of hacking on their build system (there's some things they're

Re: [Mesa-dev] [PATCH 0/7] Adding more documentation to the release process

Hi Andres, Thanks for the corrections/updates. On 27 March 2017 at 19:48, Andres Gomez wrote: > A series of patches adding more details to the release process. > > Andres Gomez (7): > docs/releasing: format/style homogenization > docs/releasing: check in master for

[Mesa-dev] [Bug 100425] glGenFramebuffersEXT appears to be null on (some?) Mesa 12.0.6 systems

https://bugs.freedesktop.org/show_bug.cgi?id=100425 --- Comment #4 from Kai Ninomiya --- Thanks Timothy and Timo, if this isn't a major, widely-seen regression in 12.0.6 then there isn't much we can do. If Chromium added a workaround it would also be a few months before the

Re: [Mesa-dev] [PATCH v5 1/5] genxml: New generated header genX_bits.h (v5)

Quoting Chad Versace (2017-03-28 09:37:56) > On Sat 25 Mar 2017, Dylan Baker wrote: > > > > This is just a suggestion, feel free to ignore > > > > I forgot to do something here, but this is one case where using > > argparse.FileType might actually be the right thing to do. > > > > it would like

Re: [Mesa-dev] Meson mesademos (Was: [RFC libdrm 0/2] Replace the build system with meson)

Quoting Jose Fonseca (2017-03-28 09:19:48) > On 28/03/17 00:12, Dylan Baker wrote: > > > > Okay, I have libepoxy working for windows. I also got libepoxy working as a > > subproject, but it took a bit of hacking on their build system (there's > > some things they're doing that make them

Re: [Mesa-dev] [PATCH v2 2/4] si_compute: check NULL return from u_upload_alloc

On Tue, Mar 28, 2017 at 6:52 PM, Julien Isorce wrote: > - if (program->input_size || program->ir_type == > PIPE_SHADER_IR_NATIVE) > - si_upload_compute_input(sctx, code_object, info); > + if ((program->input_size || > +

[Mesa-dev] [Bug 100430] [radv] graphical glitches on dolphin emulator

https://bugs.freedesktop.org/show_bug.cgi?id=100430 --- Comment #5 from jdr...@gmail.com --- Created attachment 130506 --> https://bugs.freedesktop.org/attachment.cgi?id=130506=edit Screen part missing (fifo) Last one recorded with dolphin's fifo player. Hope it helps. -- You are receiving

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

Hi Chad, On 24 March 2017 at 20:44, Chad Versace wrote: > On Tue 21 Mar 2017, Matt Turner wrote: >> On Mon, Mar 20, 2017 at 12:39 PM, Emil Velikov >> wrote: >> > On 20 March 2017 at 18:30, Matt Turner wrote: >> >> On Mon,

[Mesa-dev] [Bug 100430] [radv] graphical glitches on dolphin emulator

https://bugs.freedesktop.org/show_bug.cgi?id=100430 --- Comment #4 from jdr...@gmail.com --- Created attachment 130505 --> https://bugs.freedesktop.org/attachment.cgi?id=130505=edit White Square on MarioKart (fifo) Same: 3 pictures saved -- You are receiving this mail because: You are the

Re: [Mesa-dev] [PATCH v2 2/4] si_compute: check NULL return from u_upload_alloc

Oops it should be just "return;" here. On 28 March 2017 at 17:52, Julien Isorce wrote: > - if (program->input_size || program->ir_type == > PIPE_SHADER_IR_NATIVE) > - si_upload_compute_input(sctx, code_object, info); > + if

[Mesa-dev] [Bug 100430] [radv] graphical glitches on dolphin emulator

https://bugs.freedesktop.org/show_bug.cgi?id=100430 --- Comment #3 from jdr...@gmail.com --- Created attachment 130504 --> https://bugs.freedesktop.org/attachment.cgi?id=130504=edit bad colors on MarioKart (fifo) I used the fifo player included in dolphin to record 3 images. -- You are

Re: [Mesa-dev] [PATCH v2 2/4] si_compute: check NULL return from u_upload_alloc

- if (program->input_size || program->ir_type == PIPE_SHADER_IR_NATIVE) - si_upload_compute_input(sctx, code_object, info); + if ((program->input_size || +program->ir_type == PIPE_SHADER_IR_NATIVE) && +unlikely(!si_upload_compute_input(sctx,

Re: [Mesa-dev] [PATCH v5 1/5] genxml: New generated header genX_bits.h (v5)

Hi Chad, On 25 March 2017 at 02:28, Chad Versace wrote: > genX_bits.h contains the sizes of bitfields in genxml instructions, > structures, and registers. It also defines some functions to query those > sizes. > > isl_surf_init() will use the new header to validate that

[Mesa-dev] [Bug 100430] [radv] graphical glitches on dolphin emulator

https://bugs.freedesktop.org/show_bug.cgi?id=100430 jdr...@gmail.com changed: What|Removed |Added CC||jdr...@gmail.com -- You are

Re: [Mesa-dev] [PATCH v5 1/5] genxml: New generated header genX_bits.h (v5)

On Sat 25 Mar 2017, Dylan Baker wrote: > Oh, for what it's worth (since I wrote part of this), with the one .keys() > thing > changed: > Reviewed-by: Dylan Baker Thanks ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH v5 1/5] genxml: New generated header genX_bits.h (v5)

On Sat 25 Mar 2017, Dylan Baker wrote: > Quoting Chad Versace (2017-03-24 19:28:23) > > genX_bits.h contains the sizes of bitfields in genxml instructions, > > structures, and registers. It also defines some functions to query those > > sizes. > > > > isl_surf_init() will use the new header to

[Mesa-dev] [Bug 100430] [radv] graphical glitches on dolphin emulator

https://bugs.freedesktop.org/show_bug.cgi?id=100430 --- Comment #2 from Ilia Mirkin --- I suspect you'll greatly increase the likelihood of getting this issue investigated if you include a dolphin fifo log which can be used to reproduce the issue. [Not sure how those are

Re: [Mesa-dev] [PATCH] radv: Invalidate L2 for TRANSFER_WRITE barriers

On 28 March 2017 at 17:09, Emil Velikov wrote: > On 22 March 2017 at 10:06, Bas Nieuwenhuizen > wrote: > > On Tue, Mar 21, 2017 at 1:02 PM, Alex Smith > wrote: > >> CP DMA and PKT3_WRITE_DATA (in CmdUpdateBuffer)

Re: [Mesa-dev] [PATCH v5 2/5] isl: Validate the calculated row pitch (v4)

On Tue, Mar 28, 2017 at 9:15 AM, Chad Versace wrote: > On Sat 25 Mar 2017, Jason Ekstrand wrote: > > > > > > On March 24, 2017 7:29:05 PM Chad Versace > wrote: > > > > > Validate that isl_surf::row_pitch fits in the below bitfields, > > > if

Re: [Mesa-dev] Meson mesademos (Was: [RFC libdrm 0/2] Replace the build system with meson)

On 28/03/17 00:12, Dylan Baker wrote: Quoting Jose Fonseca (2017-03-27 09:58:59) On 27/03/17 17:42, Dylan Baker wrote: Quoting Jose Fonseca (2017-03-27 09:31:04) On 27/03/17 17:24, Dylan Baker wrote: Quoting Jose Fonseca (2017-03-26 14:53:50) I've pushed the branch to mesa/demos, so we can

Re: [Mesa-dev] [PATCH v5 2/5] isl: Validate the calculated row pitch (v4)

On Sat 25 Mar 2017, Jason Ekstrand wrote: > > > On March 24, 2017 7:29:05 PM Chad Versace wrote: > > > Validate that isl_surf::row_pitch fits in the below bitfields, > > if applicable based on isl_surf::usage. > > > > RENDER_SURFACE_STATE::SurfacePitch > >

Re: [Mesa-dev] [PATCH] radv: Invalidate L2 for TRANSFER_WRITE barriers

On 22 March 2017 at 10:06, Bas Nieuwenhuizen wrote: > On Tue, Mar 21, 2017 at 1:02 PM, Alex Smith > wrote: >> CP DMA and PKT3_WRITE_DATA (in CmdUpdateBuffer) don't (currently) write >> through L2. Therefore, to make these writes visible to

Re: [Mesa-dev] [PATCH 4/4] anv: Use subpass dependencies for flushes

Nanley, Mind taking a look at these? On Tue, Mar 14, 2017 at 7:55 AM, Jason Ekstrand wrote: > Instead of figuring it all out ourselves, just use the information given > to us by the client. > --- > src/intel/vulkan/anv_blorp.c | 88 -- >

[Mesa-dev] [Bug 100430] [radv] graphical glitches on dolphin emulator

https://bugs.freedesktop.org/show_bug.cgi?id=100430 Christian Lanig changed: What|Removed |Added CC|

Re: [Mesa-dev] [PATCH] tests/cache_test: allow crossing mount points

On Tue, 2017-03-28 at 17:50 +0200, Nicolai Hähnle wrote: > The crossing happens because I'm running it inside a docker container, > > which uses internally an overlayfs. This means that some of those > > subdirectories can be in one mountpoint and others in other mountpoint. > >   This seems to

Re: [Mesa-dev] [PATCH] tests/cache_test: allow crossing mount points

On 28.03.2017 17:32, Juan A. Suarez Romero wrote: On Tue, 2017-03-28 at 16:53 +0200, Nicolai Hähnle wrote: On 25.03.2017 01:40, Juan A. Suarez Romero wrote: When using an overlayfs system (like a Docker container), rmrf_local() fails because part of the files to be removed are in different

[Mesa-dev] [Bug 100430] [radv] graphical glitches on dolphin emulator

https://bugs.freedesktop.org/show_bug.cgi?id=100430 --- Comment #1 from Christian Lanig --- I confirm this bug. Dolphin 5.0-741d230-dirty Ubuntu 17.04 with MESA git and Kernel 4.11 RC4 Ryzen 7 1700X RX 480 8GiB 32 DDR4 2933 MHz ECC -- You are receiving this mail

Re: [Mesa-dev] [PATCH 2/2] st/mesa: EGLImageTarget* error handling

On 27.03.2017 12:11, Philipp Zabel wrote: Stop trying to specify texture or renderbuffer objects for unsupported EGL images. Generate the error codes specified in the OES_EGL_image extension. EGLImageTargetTexture2D and EGLImageTargetRenderbuffer would call the pipe driver's create_surface

Re: [Mesa-dev] [PATCH] tests/cache_test: allow crossing mount points

On Tue, 2017-03-28 at 16:53 +0200, Nicolai Hähnle wrote: > On 25.03.2017 01:40, Juan A. Suarez Romero wrote: > > When using an overlayfs system (like a Docker container), rmrf_local() > > fails because part of the files to be removed are in different mount > > points (layouts). And thus cache-test

Re: [Mesa-dev] [PATCH 2/2] nir: Add support for 8 and 16-bit types

Sorry I haven't gotten back on this. It got lost somehow. On Fri, Mar 10, 2017 at 1:56 AM, Iago Toral wrote: > On Thu, 2017-03-09 at 14:05 -0800, Jason Ekstrand wrote: > > --- > > src/compiler/nir/nir.h | 4 > >

Re: [Mesa-dev] [RFC 1/3] dri: add support for CONTEXT_FLAG_NO_ERROR_BIT_KHR

On 28.03.2017 06:35, Timothy Arceri wrote: The KHR_no_error spec says: "CONTEXT_FLAG_NO_ERROR_BIT_KHR is only supported if the OpenGL version has support for context flags (as defined in the OpenGL 4.5 core spec) or an extension supporting equivalent functionality is exposed." But

Re: [Mesa-dev] [PATCH] tests/cache_test: allow crossing mount points

On 25.03.2017 01:40, Juan A. Suarez Romero wrote: When using an overlayfs system (like a Docker container), rmrf_local() fails because part of the files to be removed are in different mount points (layouts). And thus cache-test fails. Can you explain a bit more how this can happen? I thought

[Mesa-dev] [PATCH v2 1/2] intel: android: remove libdrm_intel requirement

From: Emil Velikov The only part which requires libdrm_intel tools/aubinator is not built on Android. Signed-off-by: Emil Velikov --- What was 1/3 of the series has superseded by Ken with commit 0c3fbf8028b6f44a341548d341fa660e6b120647

[Mesa-dev] [PATCH v2 2/2] intel: automake: move INTEL_CFLAGS as applicable

From: Emil Velikov Only common/decoder.[ch] requires it [for intel_aub.h]. v2: The code was moved to from intel/tools to intel/common, update accordingly. Signed-off-by: Emil Velikov --- src/intel/Makefile.am| 1 -

Re: [Mesa-dev] [PATCH 2/2] gallium/util: libunwind support

On 24.03.2017 22:21, Rob Clark wrote: It's kinda sad that (a) we don't have debug_backtrace support on !X86 and that (b) we re-invent our own crude backtrace support in the first place. If available, use libunwind instead. The backtrace format is based on what xserver and weston use, since it

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