Re: [Mesa-dev] [PATCH] i965/surface_state: Remove the mcs_buf->offset == 0 restriction

On Friday, July 14, 2017 3:38:30 PM PDT Jason Ekstrand wrote: > This assert was removed in b0cc55f29831638069407a4c1a5c809b26902ab6 but > got added back in 1a43d774b613d0b00e26b28cc752d944ce8049aa, probably by > accident. > --- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 1 - > 1 file

Re: [Mesa-dev] [PATCH 3/3] radv: Implement VK_KHR_external_memory

On Fri, Jul 14, 2017 at 5:08 PM, Bas Nieuwenhuizen wrote: > From: Jason Ekstrand > > This effectively reverts commit 43a171878bb4b5aedb36a. Technically, > VK_KHR_get_memory_requirements2 and VK_KHR_dedicated_allocation are > required for the KHR

Re: [Mesa-dev] [PATCH 2/3] radv: Add support for VK_KHR_dedicated_allocation.

Reviewed-by: Jason Ekstrand On Fri, Jul 14, 2017 at 5:08 PM, Bas Nieuwenhuizen wrote: > Signed-off-by: Bas Nieuwenhuizen > --- > src/amd/vulkan/radv_device.c | 36 ++ > ++-- >

Re: [Mesa-dev] [PATCH 1/3] radv: Add support for VK_KHR_get_memory_requirements2.

This is obvious. Reviewed-by: Jason Ekstrand On Fri, Jul 14, 2017 at 5:07 PM, Bas Nieuwenhuizen wrote: > Fished the SparseImage call out of the headers as the spec missed > the definition. > > Signed-off-by: Bas Nieuwenhuizen

Re: [Mesa-dev] [PATCH] i965: Compile with -msse3

On Fri, Jul 14, 2017 at 6:36 PM, Ian Romanick wrote: > On 07/14/2017 06:35 PM, Ian Romanick wrote: >> On 07/14/2017 12:19 PM, Matt Turner wrote: >>> All CPUs that can be paired with a GPU supported by i965_dri.so supports >>> SSE3. This allows us to ensure that some

Re: [Mesa-dev] [PATCH 1.2/8] spirv: Generate spirv_info.c

On Fri, Jul 14, 2017 at 6:39 PM, Ian Romanick wrote: > From: Ian Romanick > > The old table based spirv_*_to_string functions would return NULL for > any values "inside" the table that didn't have entries. The tables also > needed to be updated

Re: [Mesa-dev] [PATCH 1.1/8] spirv: Import the lastest 1.0.2 JSON from Khronos

As Emil pointed out on my spirv.h patch, it's the 1.2 JSON not 1.0.2. :-) With that fixed, Acked-by: Jason Ekstrand I don't plan to review all that json. :-) On Fri, Jul 14, 2017 at 6:39 PM, Ian Romanick wrote: > From: Ian Romanick

[Mesa-dev] [PATCH 1.2/8] spirv: Generate spirv_info.c

From: Ian Romanick The old table based spirv_*_to_string functions would return NULL for any values "inside" the table that didn't have entries. The tables also needed to be updated by hand each time a new spirv.h was imported. Generate the file instead.

Re: [Mesa-dev] [PATCH] i965: Compile with -msse3

On 07/14/2017 06:35 PM, Ian Romanick wrote: > On 07/14/2017 12:19 PM, Matt Turner wrote: >> All CPUs that can be paired with a GPU supported by i965_dri.so supports >> SSE3. This allows us to ensure that some vectorized version of the tiled >> memcpy path is enabled on 32-bit systems. > > Yes.

Re: [Mesa-dev] [PATCH] i965: Compile with -msse3

On 07/14/2017 12:19 PM, Matt Turner wrote: > All CPUs that can be paired with a GPU supported by i965_dri.so supports > SSE3. This allows us to ensure that some vectorized version of the tiled > memcpy path is enabled on 32-bit systems. Yes. It might be worth noting in the commit message that

Re: [Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

On 07/14/2017 05:45 AM, Emil Velikov wrote: > Hi gents, > > On 14 July 2017 at 02:57, Jason Ekstrand wrote: >> On Thu, Jul 13, 2017 at 6:38 PM, Ian Romanick wrote: > >>> >>> This will cause spirv_capability_to_string() to >>> happily return NULL

Re: [Mesa-dev] [PATCH 12/20] i965/fs: Handle explicit flag sources in flags_read()

Matt Turner writes: > The implementations of the ARB_shader_ballot intrinsics will explicitly > read the flag as a source register. > --- > src/intel/compiler/brw_fs.cpp | 18 ++ > 1 file changed, 14 insertions(+), 4 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH 11/20] i965/fs: Allow emit_uniformize() to broadcast a specific channel

Matt Turner writes: > This function will be used to implement read_invocation (by specifying a > specific channel) and read_first_invocation (by not specifying a > channel). > --- > src/intel/compiler/brw_fs_builder.h | 9 ++--- > 1 file changed, 6 insertions(+), 3

Re: [Mesa-dev] [PATCH 5/6] radeonsi: use slot indexes for bindless handles

On Wed, Jul 5, 2017 at 1:42 PM, Nicolai Hähnle wrote: > On 04.07.2017 15:05, Samuel Pitoiset wrote: >> >> Using VRAM address as bindless handles is not a good idea because >> we have to use LLVMIntToPTr and the LLVM CSE pass can't optimize >> because it has no information

Re: [Mesa-dev] [PATCH] dri: Make classic drivers allow __DRI_CTX_FLAG_NO_ERROR.

On 2017-07-15 01:10, Kenneth Graunke wrote: Grigori recently added EGL_KHR_create_context_no_error support, which causes EGL to pass a new __DRI_CTX_FLAG_NO_ERROR flag to drivers when requesting an appropriate context mode. driContextSetFlags() will already handle it properly for us, but the

Re: [Mesa-dev] [PATCH] dri: Make classic drivers allow __DRI_CTX_FLAG_NO_ERROR.

Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/3] radv: Add support for VK_KHR_dedicated_allocation.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_device.c | 36 -- src/amd/vulkan/radv_entrypoints_gen.py | 1 + 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_device.c

[Mesa-dev] [PATCH 3/3] radv: Implement VK_KHR_external_memory

From: Jason Ekstrand This effectively reverts commit 43a171878bb4b5aedb36a. Technically, VK_KHR_get_memory_requirements2 and VK_KHR_dedicated_allocation are required for the KHR version but this at least restores the removed functionality. This patch builds but has

[Mesa-dev] [PATCH 1/3] radv: Add support for VK_KHR_get_memory_requirements2.

Fished the SparseImage call out of the headers as the spec missed the definition. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_device.c | 31 +++ src/amd/vulkan/radv_entrypoints_gen.py | 1 + 2 files changed, 32 insertions(+)

Re: [Mesa-dev] [PATCH] i965: Compile with -msse3

On Friday, July 14, 2017 12:19:39 PM PDT Matt Turner wrote: > All CPUs that can be paired with a GPU supported by i965_dri.so supports > SSE3. This allows us to ensure that some vectorized version of the tiled > memcpy path is enabled on 32-bit systems. > > This also ensures that

Re: [Mesa-dev] [PATCH] drirc: whitelist glthread for The Witcher 2

I'm a bit nervous about whitelisting games without checking frametime variance. From experience with certain game patterns, threading can introduce stuttering in certain apps and cause the general experience to feel worse even though the general throughput appears to go up, as reported by

Re: [Mesa-dev] [PATCH v3 04/14] i965/bufmgr: Add a BO_ALLOC_ZEROED flag

On Wednesday, July 12, 2017 9:23:15 PM PDT Jason Ekstrand wrote: > Cc: Kenneth Graunke > > --- > src/mesa/drivers/dri/i965/brw_bufmgr.c | 28 ++-- > src/mesa/drivers/dri/i965/brw_bufmgr.h | 1 + > 2 files changed, 27 insertions(+), 2 deletions(-)

[Mesa-dev] [PATCH] dri: Make classic drivers allow __DRI_CTX_FLAG_NO_ERROR.

Grigori recently added EGL_KHR_create_context_no_error support, which causes EGL to pass a new __DRI_CTX_FLAG_NO_ERROR flag to drivers when requesting an appropriate context mode. driContextSetFlags() will already handle it properly for us, but the classic drivers all have code to explicitly balk

Re: [Mesa-dev] [PATCH v3 06/14] i965/miptree: Use BO_ALLOC_ZEROED for CCS_E buffers

Chad, you missed this one. On Wed, Jul 12, 2017 at 9:23 PM, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 36 > ++- > 1 file changed, 13 insertions(+), 23 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH v3 12/14] i965: Pretend that CCS modified images are two planes

.. On Fri, Jul 14, 2017 at 3:50 PM, Chad Versace wrote: > On Wed 12 Jul 2017, Jason Ekstrand wrote: > > From: Ben Widawsky > > > > v2: move is_aux into if block. (Jason) > > Use else block instead of goto (Jason) > > > > v3: Fix up logic for is_aux

Re: [Mesa-dev] [PATCH v3 05/14] i965/screen: Allocate ZEROED BOs for images

On Fri, Jul 14, 2017 at 3:38 PM, Chad Versace wrote: > On Wed 12 Jul 2017, Jason Ekstrand wrote: > > --- > > src/mesa/drivers/dri/i965/intel_screen.c | 11 ++- > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > + /* We request that the bufmgr zero the

Re: [Mesa-dev] [PATCH v3 12/14] i965: Pretend that CCS modified images are two planes

On Wed 12 Jul 2017, Jason Ekstrand wrote: > From: Ben Widawsky > > v2: move is_aux into if block. (Jason) > Use else block instead of goto (Jason) > > v3: Fix up logic for is_aux (Ben) > Fix up size calculations and add FIXME (Ben) > > v4 (Jason Ekstrand): > Use the

Re: [Mesa-dev] [PATCH v3 11/14] i965/screen: Support import and export of surfaces with CCS

On Wed 12 Jul 2017, Jason Ekstrand wrote: > Reviewed-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/intel_screen.c | 69 > +--- > 1 file changed, 64 insertions(+), 5 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH v3 10/14] i965/miptree: Allocate mcs_buf for an image's CCS

On Wed 12 Jul 2017, Jason Ekstrand wrote: > From: Ben Widawsky > > This code will disable actually creating these buffers for the scanout, > but it puts the allocation in place. > > Primarily this patch is split out for review, it can be squashed in > later if preferred. > >

Re: [Mesa-dev] [PATCH v3 08/14] i965: Support images with aux buffers

On Wed 12 Jul 2017, Jason Ekstrand wrote: > From: Ben Widawsky > > Previously images did not support any auxiliary compression surfaces > (CCS, MCS, or HiZ). That's about to change. This patch just adds the > fields to __DRIimageRec to make auxiliary surfaces possible. > >

Re: [Mesa-dev] [PATCH v3 05/14] i965/screen: Allocate ZEROED BOs for images

On Wed 12 Jul 2017, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/intel_screen.c | 11 ++- > 1 file changed, 10 insertions(+), 1 deletion(-) > + /* We request that the bufmgr zero the buffer for us for two reasons: > +* > +* 1) If a buffer gets re-used from the pool,

[Mesa-dev] [PATCH] i965/surface_state: Remove the mcs_buf->offset == 0 restriction

This assert was removed in b0cc55f29831638069407a4c1a5c809b26902ab6 but got added back in 1a43d774b613d0b00e26b28cc752d944ce8049aa, probably by accident. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 1 - 1 file changed, 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH v3 04/14] i965/bufmgr: Add a BO_ALLOC_ZEROED flag

On Wed 12 Jul 2017, Jason Ekstrand wrote: > Cc: Kenneth Graunke > > --- > src/mesa/drivers/dri/i965/brw_bufmgr.c | 28 ++-- > src/mesa/drivers/dri/i965/brw_bufmgr.h | 1 + > 2 files changed, 27 insertions(+), 2 deletions(-) > + /* All new

Re: [Mesa-dev] [PATCH 05/20] i965/fs: Handle explicit flag destinations in flags_written()

Matt Turner writes: > The implementations of the ARB_shader_group_vote intrinsics will > explicitly write the flag as the destination register. > --- > src/intel/compiler/brw_fs.cpp | 12 ++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH v3 03/14] i965/miptree: Replace is_lossless_compressed with mt->aux_usage checks

On Wed 12 Jul 2017, Jason Ekstrand wrote: > Now that we have an actual aux_usage field, we no longer need the > complex logic of is_lossless_compressed in order to figure out if a > miptree is CCS_E compressed. As a side-effect, there is not longer any > need to overload MSAA_LAYOUT_CMS for CCS_E

Re: [Mesa-dev] [PATCH v3 02/14] i965/miptree: Allocate HiZ up-front

On Wed 12 Jul 2017, Jason Ekstrand wrote: > HiZ, like MCS and CCS_E, can compress more than just clear colors so we > want it turned on whenever the miptree is being used as a depth > attachment. It's theoretically possible for someone to create a depth > texture, upload data with

Re: [Mesa-dev] [PATCH v3 01/14] i965/miptree: Gather initial aux allocation into a single function

On Wed 12 Jul 2017, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 83 > +-- > 1 file changed, 53 insertions(+), 30 deletions(-) > +static bool > +intel_miptree_alloc_aux(struct brw_context *brw, > +struct

Re: [Mesa-dev] [PATCH v2 24/27] i965/screen: Support import and export of surfaces with CCS

On Fri 14 Jul 2017, Jason Ekstrand wrote: > On Fri, Jul 14, 2017 at 11:46 AM, Chad Versace <[1]chadvers...@chromium.org> > wrote: > > On Wed 12 Jul 2017, Jason Ekstrand wrote: > > On Wed, Jul 12, 2017 at 11:18 AM, Chad Versace <[1][2] > If it's an error that we recover from, then

Re: [Mesa-dev] [PATCH v2 22/27] i965/miptree: Allocate mcs_buf for an image's CCS

On Wed 12 Jul 2017, Jason Ekstrand wrote: > On Wed, Jul 12, 2017 at 11:05 AM, Chad Versace <[1]chadvers...@chromium.org> > wrote: > > On Thu 29 Jun 2017, Jason Ekstrand wrote: > Why require that aux_offset > 0? Why reject images where the aux surface > precedes the primary surface?

Re: [Mesa-dev] [PATCH] egl: Fix predecence problem when setting __DRI_CTX_FLAG_NO_ERROR

Tested-by: Mark Janes Kenneth Graunke writes: > This accidentally set __DRI_CTX_FLAG_NO_ERROR whenever any flags were > present. Just needs extra parenthesis. > > Fixes: 4909519a6655 (egl: Add EGL_KHR_create_context_no_error support) > --- >

Re: [Mesa-dev] [PATCH] drirc: whitelist glthread for The Witcher 2

I pushed both patches. Thanks! Marek On Mon, Jul 10, 2017 at 9:12 PM, Edmondo Tommasina wrote: > Performance delta on AMD Phenom II X3 720 / RX 470 > > The Witcher 2: +18% > --- > src/mesa/drivers/dri/common/drirc | 3 +++ > 1 file changed, 3 insertions(+) > >

Re: [Mesa-dev] [PATCH] egl: Fix predecence problem when setting __DRI_CTX_FLAG_NO_ERROR

On 2017-07-14 23:30, Kenneth Graunke wrote: This accidentally set __DRI_CTX_FLAG_NO_ERROR whenever any flags were present. Just needs extra parenthesis. Fixes: 4909519a6655 (egl: Add EGL_KHR_create_context_no_error support) Reviewed-by: Grigori Goronzy Sorry for breaking

[Mesa-dev] [PATCH] egl: Fix predecence problem when setting __DRI_CTX_FLAG_NO_ERROR

This accidentally set __DRI_CTX_FLAG_NO_ERROR whenever any flags were present. Just needs extra parenthesis. Fixes: 4909519a6655 (egl: Add EGL_KHR_create_context_no_error support) --- src/egl/drivers/dri2/egl_dri2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH v2] i965: Use {} to initialize GENX_* structs.

Rafael Antognolli writes: > gen4 have commands which start with KernelStartPointer, which is a > struct, so if we initialize it struct = { 0 }, we get warnings on some > compilers: > > "GCC (pre 4.9?) can throw a Wmissing-braces on[1] while clang >

[Mesa-dev] [PATCH] mesa/marshal: fix Windows build

This was broken by commit 1ad24faa. --- src/mesa/main/marshal.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/main/marshal.h b/src/mesa/main/marshal.h index f2dc842..63e0295 100644 --- a/src/mesa/main/marshal.h +++ b/src/mesa/main/marshal.h @@ -257,7 +257,7 @@

Re: [Mesa-dev] [PATCH v2] i965: Use {} to initialize GENX_* structs.

On Fri, Jul 14, 2017 at 02:15:19PM -0700, Rafael Antognolli wrote: > gen4 have commands which start with KernelStartPointer, which is a > struct, so if we initialize it struct = { 0 }, we get warnings on some > compilers: > > "GCC (pre 4.9?) can throw a Wmissing-braces on[1] while clang >

[Mesa-dev] [PATCH v2] i965: Use {} to initialize GENX_* structs.

gen4 have commands which start with KernelStartPointer, which is a struct, so if we initialize it struct = { 0 }, we get warnings on some compilers: "GCC (pre 4.9?) can throw a Wmissing-braces on[1] while clang -Wmissing-field-initializers [2]." - Emil This change works around that and will

Re: [Mesa-dev] [PATCH] i965: Use a ZERO() macro to initialize GENX_* structs.

On 14 July 2017 at 20:13, Matt Turner wrote: > On Fri, Jul 14, 2017 at 11:15 AM, Rafael Antognolli > wrote: >> gen4 have commands which start with KernelStartPointer, which is a >> struct, so if we initialize it struct = { 0 }, we get warnings on

Re: [Mesa-dev] [PATCH 27/27] radeonsi: enable support for EXT_memory_object v3

For patches 5, 8-10, 15, 18, 20-21, 27: Reviewed-by: Marek Olšák Marek On Thu, Jul 13, 2017 at 12:45 AM, Andres Rodriguez wrote: > v2: fix an indentation error > v3: don't enable for r600 > > Signed-off-by: Andres Rodriguez > --- >

Re: [Mesa-dev] [PATCH v2 24/27] i965/screen: Support import and export of surfaces with CCS

On Fri, Jul 14, 2017 at 11:46 AM, Chad Versace wrote: > On Wed 12 Jul 2017, Jason Ekstrand wrote: > > On Wed, Jul 12, 2017 at 11:18 AM, Chad Versace <[1] > chadvers...@chromium.org> > > wrote: > > > > On Thu 29 Jun 2017, Jason Ekstrand wrote: > > > Reviewed-by:

Re: [Mesa-dev] [PATCH 11/27] radeonsi: add basic memory object support v2

On Thu, Jul 13, 2017 at 12:45 AM, Andres Rodriguez wrote: > From: Dave Airlie > > v2: also consider gfx9 metadata > > Signed-off-by: Andres Rodriguez > --- > src/gallium/drivers/radeon/r600_pipe_common.h | 7 ++ >

Re: [Mesa-dev] [PATCH] swr: JitManager runtime determination of architecture

Reviewed-by: Bruce Cherniak > On Jul 14, 2017, at 3:01 PM, Tim Rowley wrote: > > Fixes performance regression from f50aa21456d - was forcing internal > code generation to target AVX (no gather, etc). > --- >

[Mesa-dev] [PATCH] swr: JitManager runtime determination of architecture

Fixes performance regression from f50aa21456d - was forcing internal code generation to target AVX (no gather, etc). --- src/gallium/drivers/swr/swr_screen.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/swr_screen.cpp

Re: [Mesa-dev] [PATCH] i965: Use a ZERO() macro to initialize GENX_* structs.

On Fri, Jul 14, 2017 at 12:27 PM, Rafael Antognolli wrote: > On Fri, Jul 14, 2017 at 12:13:59PM -0700, Matt Turner wrote: >> On Fri, Jul 14, 2017 at 11:15 AM, Rafael Antognolli >> wrote: >> > gen4 have commands which start with

[Mesa-dev] [ANNOUNCE] mesa 17.1.5

Mesa 17.1.5 is now available. In this release we have: In Mesa Core we include a fix to prevent a potential crash. The state tracker received a fix for properly releasing an EGLImage texture in case the image format is not supported. The SPIR-V compiler has gotten a fix for properly

[Mesa-dev] [AppVeyor] mesa master #4918 failed

Build mesa 4918 failed Commit 25d43cd656 by Andres Gomez on 7/14/2017 7:27 PM: docs: update calendar, add news item and link release notes for 17.1.5\n\nSigned-off-by: Andres Gomez Configure your notification preferences

Re: [Mesa-dev] [PATCH] i965: Use a ZERO() macro to initialize GENX_* structs.

On Fri, Jul 14, 2017 at 12:13:59PM -0700, Matt Turner wrote: > On Fri, Jul 14, 2017 at 11:15 AM, Rafael Antognolli > wrote: > > gen4 have commands which start with KernelStartPointer, which is a > > struct, so if we initialize it struct = { 0 }, we get warnings on

Re: [Mesa-dev] [PATCH 04/27] gallium: introduce memory object v2

On Thu, Jul 13, 2017 at 12:45 AM, Andres Rodriguez wrote: > From: Dave Airlie > > v2: fix comment regarding fd ownership, define pipe_memory_object > --- > src/gallium/drivers/ddebug/dd_screen.c | 40 > ++ >

[Mesa-dev] [PATCH] i965: Compile with -msse3

All CPUs that can be paired with a GPU supported by i965_dri.so supports SSE3. This allows us to ensure that some vectorized version of the tiled memcpy path is enabled on 32-bit systems. This also ensures that __builtin_ia32_clflush is always usable. Bugzilla:

Re: [Mesa-dev] [EGL android: accquire fence implementation] i965: Queue the buffer with a sync fence for Android OS (v2)

On Friday, July 14, 2017 10:50:39 AM PDT Rafael Antognolli wrote: > On Sat, Jul 15, 2017 at 01:58:19AM +0900, Tomasz Figa wrote: > > > So, the right place to do so would be inside platform_android.c, > > > right? And since I don't see any private struct that could store such > > > fence > > >

Re: [Mesa-dev] [PATCH] i965: Use a ZERO() macro to initialize GENX_* structs.

On Fri, Jul 14, 2017 at 11:15 AM, Rafael Antognolli wrote: > gen4 have commands which start with KernelStartPointer, which is a > struct, so if we initialize it struct = { 0 }, we get warnings on some > compilers. Which compilers? > > This macro works around that

Re: [Mesa-dev] [PATCH v2] i965: Convert CLIP_STATE to genxml.

On Friday, July 14, 2017 11:02:57 AM PDT you wrote: > Add the code into its own function and atom, since almost nothing is > shared with GEN >= 6. > > v2: Split GEN <=5 and GEN >= 6 into separate functions (Ken). > > Signed-off-by: Rafael Antognolli > Cc: Kenneth

Re: [Mesa-dev] [PATCH v2 24/27] i965/screen: Support import and export of surfaces with CCS

On Wed 12 Jul 2017, Jason Ekstrand wrote: > On Wed, Jul 12, 2017 at 11:18 AM, Chad Versace <[1]chadvers...@chromium.org> > wrote: > > On Thu 29 Jun 2017, Jason Ekstrand wrote: > > Reviewed-by: Topi Pohjolainen <[2]topi.pohjolai...@intel.com> > > --- > > 

[Mesa-dev] [PATCH v2 6/8] nir/spirv: Add support for SPV_KHR_variable_pointers

--- src/compiler/spirv/nir_spirv.h | 1 + src/compiler/spirv/spirv_to_nir.c | 38 +--- src/compiler/spirv/vtn_cfg.c | 5 ++-- src/compiler/spirv/vtn_private.h | 23 +++-- src/compiler/spirv/vtn_variables.c | 51

Re: [Mesa-dev] [PATCH] mesa/marshal: fix glNamedBufferData with NULL data

Reviewed-by: Marek Olšák Marek On Mon, Jul 10, 2017 at 4:28 PM, Grigori Goronzy wrote: > The semantics are similar to glBufferData. Fixes a crash with VMWare > Player. > > Signed-off-by: Grigori Goronzy > --- >

Re: [Mesa-dev] [PATCH v2 4/4] st/mesa: Add KHR_no_error toggle to driconf

For the series: Reviewed-by: Marek Olšák Marek On Thu, Jul 13, 2017 at 1:30 PM, Grigori Goronzy wrote: > Allows applications to be whitelisted. > > v2: Remove misguided DRI common part. > --- > src/gallium/state_trackers/dri/dri_context.c| 3 +++ >

[Mesa-dev] [PATCH] i965: Use a ZERO() macro to initialize GENX_* structs.

gen4 have commands which start with KernelStartPointer, which is a struct, so if we initialize it struct = { 0 }, we get warnings on some compilers. This macro works around that and will silent such warnings. Signed-off-by: Rafael Antognolli Cc: Jason Ekstrand

[Mesa-dev] [PATCH] radv: Implement VK_KHR_external_memory

This effectively reverts commit 43a171878bb4b5aedb36a. Technically, VK_KHR_get_memory_requirements2 and VK_KHR_dedicated_allocation are required for the KHR version but this at least restores the removed functionality. This patch builds but has received zero testing. Cc: Dave Airlie

[Mesa-dev] [PATCH v2] i965: Convert CLIP_STATE to genxml.

Add the code into its own function and atom, since almost nothing is shared with GEN >= 6. v2: Split GEN <=5 and GEN >= 6 into separate functions (Ken). Signed-off-by: Rafael Antognolli Cc: Kenneth Graunke ---

Re: [Mesa-dev] [PATCH 2/2] mesa/marshal: add marshalling for glClearBuffer*

For the series: Reviewed-by: Marek Olšák Marek On Sun, Jul 9, 2017 at 6:21 PM, Grigori Goronzy wrote: > Add async marshalling/unmarshalling for all glClearBuffer variants. > These entry points are commonly used in general and Alien Isolation >

Re: [Mesa-dev] [EGL android: accquire fence implementation] i965: Queue the buffer with a sync fence for Android OS (v2)

On Sat, Jul 15, 2017 at 01:58:19AM +0900, Tomasz Figa wrote: > > So, the right place to do so would be inside platform_android.c, > > right? And since I don't see any private struct that could store such fence > > there, one option would be to extend the struct dri2_egl_surface for > > android, >

Re: [Mesa-dev] [PATCH 0/8] anv, spirv: Implement VK_KHR_variable_pointers

On Fri, Jul 14, 2017 at 3:09 AM, Iago Toral wrote: > Patches 1-5 and 7-8 are: > Reviewed-by: Iago Toral Quiroga > > I dropped minor comments to patches 4-5, feel free to ignore them if > you don't consider them relevant though. > > I also dropped a couple

Re: [Mesa-dev] [PATCH 6/8] nir/spirv: Add support for SPV_KHR_variable_pointers

On Fri, Jul 14, 2017 at 2:57 AM, Iago Toral wrote: > On Thu, 2017-07-13 at 12:41 -0700, Jason Ekstrand wrote: > > --- > > src/compiler/spirv/nir_spirv.h | 1 + > > src/compiler/spirv/spirv_to_nir.c | 42 > > --- > >

Re: [Mesa-dev] [PATCH 5/8] nir/spirv: Add a helper for pushing SSA values

On Fri, Jul 14, 2017 at 2:04 AM, Iago Toral wrote: > On Thu, 2017-07-13 at 12:41 -0700, Jason Ekstrand wrote: > > --- > > src/compiler/spirv/spirv_to_nir.c | 5 +++-- > > src/compiler/spirv/vtn_cfg.c | 11 +-- > > src/compiler/spirv/vtn_private.h | 9

Re: [Mesa-dev] [PATCH 03/45] mesa/st: Handle 16-bit types at st_glsl_attrib_type_size

Can you move these cases to the end where the assertion is? Thanks, Marek On Thu, Jul 13, 2017 at 4:35 PM, Alejandro Piñeiro wrote: > From: Eduardo Lima Mitev > > Note that this doesn't mean full support on st for those types. This > change was done to

Re: [Mesa-dev] [PATCH 4/8] nir/spirv: Implement OpPtrAccessChain for buffers

On Fri, Jul 14, 2017 at 1:53 AM, Iago Toral wrote: > On Thu, 2017-07-13 at 12:41 -0700, Jason Ekstrand wrote: > > --- > > src/compiler/spirv/spirv_to_nir.c | 4 +++- > > src/compiler/spirv/vtn_private.h | 11 --- > > src/compiler/spirv/vtn_variables.c | 23

Re: [Mesa-dev] [PATCH 1/2] anv: advertise v6 of the wayland surface extension

Both are Reviewed-by: Jason Ekstrand On Fri, Jul 14, 2017 at 8:26 AM, Emil Velikov wrote: > From: Emil Velikov > > Jason updated the Khronos spec to explicitly state that Wayland surfaces > must support

Re: [Mesa-dev] [PATCH 1/7] intel: Move clflush helpers from anv to common/gen_clflush.h.

On Wed, Jul 5, 2017 at 3:56 PM, Kenneth Graunke wrote: > I want to use these in the OpenGL driver as well. FYI, this breaks building the i965 driver on non-x86 builds. Maybe my Android CI job should just stop doing that, but it did work before this. Rob > > Cc: Jason

Re: [Mesa-dev] [PATCH] anv: remove early out from cmd_buffer_setup_attachments

Hi James, I think this patch from Jason might fix the same problem : https://patchwork.freedesktop.org/patch/166280/ Series : https://patchwork.freedesktop.org/series/27142/ Cheers, - Lionel On 14/07/17 17:58, James Legg wrote: Even when there are no attachments, set up

Re: [Mesa-dev] [EGL android: accquire fence implementation] i965: Queue the buffer with a sync fence for Android OS (v2)

[resend from right email address, without bouncing recipients and with all the people involved in v1... Zhongmin, please remember to add all people participating in the discussion to CC next time.] On Sat, Jul 15, 2017 at 1:45 AM, Rafael Antognolli wrote: > On Fri,

Re: [Mesa-dev] [PATCH] i965: use strtol to convert the integer deviceID override

On Friday, July 14, 2017 5:56:58 AM PDT Emil Velikov wrote: > From: Emil Velikov > > One can override the deviceID, by setting the INTEL_DEVID_OVERRIDE > variable. A few symbolic names or a numerical value for the actual > device ID is accepted. > > At the same time

Re: [Mesa-dev] [EGL android: accquire fence implementation] i965: Queue the buffer with a sync fence for Android OS (v2)

On Sat, Jul 15, 2017 at 01:52:43AM +0900, Tomasz Figa wrote: > Hi Rafael, > > On Sat, Jul 15, 2017 at 1:45 AM, Rafael Antognolli > wrote: > > On Fri, Jul 14, 2017 at 09:13:49AM +0100, Chris Wilson wrote: > >> Quoting Zhongmin Wu (2017-07-14 07:55:45) > [snip] > >> >

[Mesa-dev] [PATCH] anv: remove early out from cmd_buffer_setup_attachments

Even when there are no attachments, set up cmd_buffer->state->render_pass_states, so that secondary command buffers with the VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT usage flag enabled can be used in VkCmdExecuteCommands with valid allocation sizes. CC:

Re: [Mesa-dev] [EGL android: accquire fence implementation] i965: Queue the buffer with a sync fence for Android OS (v2)

Hi Rafael, On Sat, Jul 15, 2017 at 1:45 AM, Rafael Antognolli wrote: > On Fri, Jul 14, 2017 at 09:13:49AM +0100, Chris Wilson wrote: >> Quoting Zhongmin Wu (2017-07-14 07:55:45) [snip] >> > extern uint32_t >> > diff --git a/src/mesa/drivers/dri/i915/intel_screen.c

Re: [Mesa-dev] [EGL android: accquire fence implementation] i965: Queue the buffer with a sync fence for Android OS (v2)

On Fri, Jul 14, 2017 at 09:13:49AM +0100, Chris Wilson wrote: > Quoting Zhongmin Wu (2017-07-14 07:55:45) > > Before we queued the buffer with a invalid fence (-1), it will > > make some benchmarks failed to test such as flatland. > > > > Now we get the out fence during the flushing buffer and

Re: [Mesa-dev] [PATCH v3 08/16] anv: Transition more color buffer layouts

On Mon, Jul 10, 2017 at 10:14:21AM -0700, Jason Ekstrand wrote: > On Wed, Jun 28, 2017 at 2:14 PM, Nanley Chery wrote: > > > v2: Expound on comment for the pipe controls (Jason Ekstrand). > > > > Signed-off-by: Nanley Chery > > --- > >

[Mesa-dev] [PATCH kmscube v2] Detect gst_bo_map/_unmap and use it (or avoid it)

Those functions are not available on libMali, thus breaking builds and creating havoc. Removing the specific parts of the code that deal with gbm_bo_map() and gbm_bo_unmap() renders the kmscube utility a little less useful, but still valuable. Signed-off-by: Daniel Díaz

Re: [Mesa-dev] [PATCH 3/8] radv: Drop support for VK_KHX_external_memory_*

Dave? On July 13, 2017 12:32:51 PM Jason Ekstrand wrote: These have been formally deprecated by Khronos never to be shipped again. The KHR versions should be implemented/used instead. --- src/amd/vulkan/radv_device.c | 68 +---

Re: [Mesa-dev] [PATCH kmscube] Detect gst_bo_map/_unmap and use it (or avoid it)

On Friday, 2017-07-14 09:45:33 -0500, Daniel Díaz wrote: > Those functions are not available on libMali, thus breaking > builds and creating havoc. > > Removing the specific parts of the code that deal with > gbm_bo_map() and gbm_bo_unmap() renders the kmscube utility > a little less useful, but

Re: [Mesa-dev] [PATCH v2] gallium/hud: use double values for all graphs

Pushed, thanks! Marek On Fri, Jul 14, 2017 at 9:59 AM, Christoph Haag wrote: > The fps graph for example calculates the fps as double with small > variations based on when query_new_value() is called, which causes > many values to be truncated on the cast to

Re: [Mesa-dev] [PATCH] etnaviv: Use the correct LOG instruction on GC3000

Am Dienstag, den 11.07.2017, 15:07 +0200 schrieb Wladimir J. van der Laan: > GC3000 has a new LOG instruction, similar to the new SIN and COS instructions. > > Generate the new instruction sequence when appropriate; there are > two occasions, as part of LIT and the generator for the LG2 >

[Mesa-dev] [PATCH 2/2] radv: advertise v6 of the wayland surface extension

From: Emil Velikov Jason updated the Khronos spec to explicitly state that Wayland surfaces must support VK_PRESENT_MODE_MAILBOX_KHR. RADV did so since day one. Cc: mesa-sta...@lists.freedesktop.org Cc: Jason Ekstrand Cc: Bas Nieuwenhuizen

[Mesa-dev] [PATCH 1/2] anv: advertise v6 of the wayland surface extension

From: Emil Velikov Jason updated the Khronos spec to explicitly state that Wayland surfaces must support VK_PRESENT_MODE_MAILBOX_KHR. ANV did so since day one (back in 2015) Cc: mesa-sta...@lists.freedesktop.org Cc: Jason Ekstrand

Re: [Mesa-dev] [PATCH] etnaviv: Reset indexed rendering information when not rendering indexed

Am Freitag, den 14.07.2017, 13:26 +0200 schrieb Wladimir J. van der Laan: > A dangling bo object would result in memory corruption while > loading a level in ioquake3_opengl2. > > Fixes a problem introduced in 330d0607ed60fd3edca192e54b4246310f06652f. > Fix suggested by Lucas Stach. > >

Re: [Mesa-dev] [PATCH 1/2] meta: Actually initialize ImmutableLevels to 1.

With or without Chris's suggestion on patch 2 (which I like), this series is Reviewed-by: Ian Romancik On 07/13/2017 09:38 PM, Kenneth Graunke wrote: > Otherwise, ImmutableLevels is 0, which is an illegal value. Later, > _mesa_meta_setup_sampler will use

[Mesa-dev] [PATCH kmscube] Detect gst_bo_map/_unmap and use it (or avoid it)

Those functions are not available on libMali, thus breaking builds and creating havoc. Removing the specific parts of the code that deal with gbm_bo_map() and gbm_bo_unmap() renders the kmscube utility a little less useful, but still valuable. Signed-off-by: Daniel Díaz

Re: [Mesa-dev] [PATCH 2/2] anv: Autogenerate extension query and lookup

On 14 July 2017 at 07:14, Jason Ekstrand wrote: > As time goes on, extension advertising is going to get more complex. > Today, we either implement an extension or we don't. However, in the > future, whether or not we advertise an extension will depend on kernel > or

Re: [Mesa-dev] [PATCH 00/45] anv: SPV_KHR_16bit_storage/VK_KHR_16bit_storage for gen8+

On 13/07/17 16:35, Alejandro Piñeiro wrote: > Hello, > > the following series adds the implementation of the > SPV_KHR_16bit_storage and VK_KHR_16bit_storage extensions on the anv > vulkan driver, in addition to the GLSL and NIR support needed. The > latter can be used as the base for future

Re: [Mesa-dev] [PATCH v2 02/11] egl/wayland: Fix whitespace damage

Hi Eric, On 13 July 2017 at 17:20, Eric Engestrom wrote: >> *out_count = j; >> if (j == 0) >> -return NULL; >> + return NULL; > > This line is getting way too much indentation :P > > I don't know enough about formats, so I'm only r-b'ing the

Re: [Mesa-dev] [PATCH v2 06/11] gbm: Check harder for supported formats

Hi, On 14 July 2017 at 12:01, Emil Velikov wrote: > On 13 July 2017 at 17:07, Jason Ekstrand wrote: >> What happened to the ARGB formats? >> > I think you meant the "BO_FORMAT" formats. And yes, those seems to > have disappeared and we'd want them

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