On Fri, 2017-10-20 at 13:18 +1100, Timothy Arceri wrote:
>
> On 20/10/17 03:31, Iago Toral Quiroga wrote:
> > The existing code was checking the whole interface variable rather
> > than its members, which is not what we want: we want to check
> > aliasing for each member in the interface
On 20/10/17 15:12, Dave Airlie wrote:
From: Dave Airlie
This struct used to rely on being in a union, it isn't anymore,
so we have to pick the correct outinfo struct now.
This should fix a regression since the union became a struct.
On 09/13/2017 11:43 PM, aravindan.muthuku...@intel.com wrote:
> From: Aravindan Muthukumar
>
> Avoiding the loop which was running with O(n) complexity.
> Now the complexity has been reduced to O(1)
>
> Algorithm calculates the index using matrix method.
> Matrix
From: Dave Airlie
This struct used to rely on being in a union, it isn't anymore,
so we have to pick the correct outinfo struct now.
This should fix a regression since the union became a struct.
dEQP-VK.tessellation.geometry_interaction.point_size.vertex_set_geometry_set
I only really skimmed over them but these look fine to me 3-4:
Reviewed-by: Timothy Arceri
Thanks!
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On 20/10/17 13:36, Ilia Mirkin wrote:
On Thu, Oct 19, 2017 at 10:18 PM, Timothy Arceri wrote:
On 20/10/17 03:31, Iago Toral Quiroga wrote:
The existing code was checking the whole interface variable rather
than its members, which is not what we want: we want to
Hi Ian, Kenneth,
On Wed, Sep 27, 2017 at 2:57 AM, Tomasz Figa wrote:
> Commit 259fc505454ea6a67aeacf6cdebf1398d9947759 added linker error for
> mismatching uniform precision, as required by GLES 3.0 specification and
> conformance test-suite.
>
> Several Android applications,
On Thu, Oct 19, 2017 at 10:18 PM, Timothy Arceri wrote:
>
>
> On 20/10/17 03:31, Iago Toral Quiroga wrote:
>>
>> The existing code was checking the whole interface variable rather
>> than its members, which is not what we want: we want to check
>> aliasing for each member
On 20/10/17 03:31, Iago Toral Quiroga wrote:
The existing code was checking the whole interface variable rather
than its members, which is not what we want: we want to check
aliasing for each member in the interface variable.
Surprisingly, there are piglit tests that verify this and were
On 20/10/17 09:13, Timothy Arceri wrote:
IMO you should just do this in brw_link() when its cheap. You will be
doing the deserialization at draw time here which is not what we want.
Can also drop the serialized_nir params if you follow my suggestions in
patch 14.
I still think you might want
On 20/10/17 09:03, Timothy Arceri wrote:
This and the previous patch feels wrong. The glsl shader cache shouldn't
be handling writing nir to disk. IMO you should add this functionality
to nir_serialize.c (maybe rename is nir_cache.c ??). That way we have
continue with the nir is a toolkit
On Wednesday, October 18, 2017 10:31:57 PM PDT Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/compiler/glsl/glsl_to_nir.cpp | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/compiler/glsl/glsl_to_nir.cpp
>
On Wednesday, October 18, 2017 10:31:56 PM PDT Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/compiler/nir/nir.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
> index fe48451694..cbba9c8749
On Wednesday, October 18, 2017 10:31:55 PM PDT Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c
>
On Wednesday, October 18, 2017 10:31:54 PM PDT Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/compiler/nir/nir_lower_system_values.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/compiler/nir/nir_lower_system_values.c
>
On Wednesday, October 18, 2017 10:31:53 PM PDT Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/compiler/glsl/builtin_variables.cpp | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/compiler/glsl/builtin_variables.cpp
>
On Wednesday, October 18, 2017 10:31:51 PM PDT Jordan Justen wrote:
> From: Jason Ekstrand
>
> Cc: mesa-sta...@lists.freedesktop.org
> ---
> src/compiler/nir/nir_intrinsics.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On Wednesday, October 18, 2017 10:31:50 PM PDT Jordan Justen wrote:
> From: Jason Ekstrand
>
> It's redundant with nir_shader::info::stage.
I hate the extra wordiness here, but removing the redundancy is
certainly a reasonable thing to do.
So, as much as I dislike
On Thu, Oct 19, 2017 at 4:18 PM, Kenneth Graunke wrote:
> The kernel doesn't initialize the value of the INSTPM or CS_DEBUG_MODE2
> registers at context initialization time. Instead, they're inherited
> from whatever happened to be running on the GPU prior to first run of
Align1 mode offers some nice features over align16, like access to more
data types and the ability to use a 16-bit immediate. This patch does
not start using any new features. It just emits ternary instructions in
align1 mode.
---
src/intel/compiler/brw_fs_generator.cpp | 12
1 file
On Fri, Sep 29, 2017 at 5:11 PM, Scott D Phillips
wrote:
> Matt Turner writes:
>
>> ---
>> src/intel/compiler/brw_disasm.c | 399
>> +---
>> src/intel/compiler/brw_eu_defines.h | 11 -
>> 2 files changed, 322
---
src/intel/compiler/brw_eu_emit.c | 219 +--
1 file changed, 166 insertions(+), 53 deletions(-)
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 7495a19fd8..4f98860044 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++
The kernel doesn't initialize the value of the INSTPM or CS_DEBUG_MODE2
registers at context initialization time. Instead, they're inherited
from whatever happened to be running on the GPU prior to first run of a
new context. So, when we started setting these, other contexts in the
system
Reviewed-by: Scott D Phillips
---
src/intel/compiler/brw_inst.h | 108 ++
1 file changed, 108 insertions(+)
diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h
index 1ddee77164..40723f9012 100644
---
On Fri, Sep 29, 2017 at 5:08 PM, Scott D Phillips
wrote:
> Matt Turner writes:
>
>> ---
>> src/intel/compiler/brw_inst.h | 114
>> ++
>> 1 file changed, 114 insertions(+)
>>
>> diff --git
---
src/intel/compiler/brw_disasm.c | 16 ++-
src/intel/compiler/brw_inst.h | 4 +-
src/intel/compiler/brw_reg_type.c | 99 ---
src/intel/compiler/brw_reg_type.h | 16 +--
4 files changed, 101 insertions(+), 34 deletions(-)
diff --git
On Fri, Sep 29, 2017 at 5:20 PM, Scott D Phillips
wrote:
> Matt Turner writes:
>
>> Align1 mode offers some nice features over align16, like access to more
>> data types and the ability to use a 16-bit immediate. This patch does
>> not start using
On Fri, Sep 29, 2017 at 5:07 PM, Scott D Phillips
wrote:
> Matt Turner writes:
>
>> ---
>> src/intel/compiler/brw_disasm.c | 12 ---
>> src/intel/compiler/brw_inst.h | 4 +--
>> src/intel/compiler/brw_reg_type.c | 76
>>
On 20/10/17 09:38, Jordan Justen wrote:
On 2017-10-19 15:07:45, Timothy Arceri wrote:
Maybe you should just do:
prog->nir->info = prog->info;
After you restore nir from the cache?
We only deserialize from nir if the gen program restore fails. So,
hopefully prog->nir will be NULL.
IMO we
On 2017-10-19 15:07:45, Timothy Arceri wrote:
> Maybe you should just do:
>
> prog->nir->info = prog->info;
>
> After you restore nir from the cache?
We only deserialize from nir if the gen program restore fails. So,
hopefully prog->nir will be NULL.
-Jordan
>
> On 19/10/17 16:32, Jordan
Reviewed-by: Bruce Cherniak
> On Oct 19, 2017, at 4:40 PM, George Kyriazis
> wrote:
>
> Remove allocation of > 2kbyte buffers into context memory in
> swr_copy_to_scatch_space() (which is used to copy small vertex/index buffers
> and
On 20/10/17 08:45, Ilia Mirkin wrote:
On Thu, Oct 19, 2017 at 5:35 PM, Timothy Arceri wrote:
On 20/10/17 08:27, Timothy Arceri wrote:
On 20/10/17 08:19, Timothy Arceri wrote:
On 20/10/17 04:21, Ilia Mirkin wrote:
On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin
Maybe add to docs?
On 19/10/17 16:32, Jordan Justen wrote:
The MESA_GLSL_CACHE_TIMESTAMP environment variable can be set to
override the driver timestamp. Usually the driver will specify a hash
of their driver build so the cache items become invalid with each
driver build.
We don't guarantee a
Reviewed-by: Timothy Arceri
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IMO you should just do this in brw_link() when its cheap. You will be
doing the deserialization at draw time here which is not what we want.
Can also drop the serialized_nir params if you follow my suggestions in
patch 14.
On 19/10/17 16:32, Jordan Justen wrote:
If the i965 gen program
Reviewed-by: Timothy Arceri
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Maybe you should just do:
prog->nir->info = prog->info;
After you restore nir from the cache?
On 19/10/17 16:32, Jordan Justen wrote:
When a program is restored from the shader cache, prog->nir will be
NULL, but prog->info will be restored.
Signed-off-by: Jordan Justen
This and the previous patch feels wrong. The glsl shader cache shouldn't
be handling writing nir to disk. IMO you should add this functionality
to nir_serialize.c (maybe rename is nir_cache.c ??). That way we have
continue with the nir is a toolkit theme and we can easily reused the
util to
Reviewed-by: Timothy Arceri
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It mostly works now.
---
src/amd/vulkan/radv_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 7f306db5c48..125498809ec 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@
From: Dave Airlie
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/common/ac_llvm_build.c | 8
src/amd/common/ac_llvm_build.h | 1 +
src/amd/common/ac_nir_to_llvm.c | 3 +++
3 files changed, 12 insertions(+)
diff --git
5-10:
Reviewed-by: Timothy Arceri
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On Thu, Oct 19, 2017 at 5:35 PM, Timothy Arceri wrote:
>
>
> On 20/10/17 08:27, Timothy Arceri wrote:
>>
>>
>>
>> On 20/10/17 08:19, Timothy Arceri wrote:
>>>
>>> On 20/10/17 04:21, Ilia Mirkin wrote:
On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin
Reviewed-by: Timothy Arceri
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Acked-by: Timothy Arceri
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Reviewed-by: Timothy Arceri
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Remove allocation of > 2kbyte buffers into context memory in
swr_copy_to_scatch_space() (which is used to copy small vertex/index buffers
and shader constants to a scratch space to be used by the upcoming draw.)
Large shader constant allocations need to be done in the circular scratch
buffer
On 20/10/17 08:27, Timothy Arceri wrote:
On 20/10/17 08:19, Timothy Arceri wrote:
On 20/10/17 04:21, Ilia Mirkin wrote:
On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin
wrote:
On Thu, Oct 19, 2017 at 12:40 PM, Iago Toral wrote:
On Thu, 2017-10-19
On 20/10/17 08:19, Timothy Arceri wrote:
On 20/10/17 04:21, Ilia Mirkin wrote:
On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin
wrote:
On Thu, Oct 19, 2017 at 12:40 PM, Iago Toral wrote:
On Thu, 2017-10-19 at 12:37 -0400, Ilia Mirkin wrote:
Will this
On Thu, Oct 19, 2017 at 5:19 PM, Timothy Arceri wrote:
> On 20/10/17 04:21, Ilia Mirkin wrote:
>>
>> On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin
>> wrote:
>>>
>>> On Thu, Oct 19, 2017 at 12:40 PM, Iago Toral wrote:
On
On 20/10/17 04:21, Ilia Mirkin wrote:
On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin wrote:
On Thu, Oct 19, 2017 at 12:40 PM, Iago Toral wrote:
On Thu, 2017-10-19 at 12:37 -0400, Ilia Mirkin wrote:
Will this work with SSO shaders? Presumably the
De-duplicating and then trimming down works for me.
On Thu, Oct 19, 2017 at 3:31 AM, Emil Velikov
wrote:
> On 18 October 2017 at 23:36, Gurchetan Singh
> wrote:
> >> Then again, I'd suggest keeping that as separate series. These patches
>
Galliums query_type used in APIs is unsigned.
Signed-off-by: Christian Gmeiner
Reviewed-by: Wladimir J. van der Laan
---
src/gallium/drivers/etnaviv/etnaviv_query.h| 2 +-
src/gallium/drivers/etnaviv/etnaviv_query_sw.c | 2 +-
2 files changed,
Passes most occlusion query piglits. The following piglits are broken:
- spec@arb_occlusion_query@occlusion_query_meta_fragments
- spec@arb_occlusion_query@occlusion_query_meta_save
- spec@arb_occlusion_query2@render
v1 -> v2:
- use one sample provider for all occlusion queries tyes
- add
Signed-off-by: Christian Gmeiner
Reviewed-by: Wladimir J. van der Laan
---
src/gallium/drivers/etnaviv/etnaviv_screen.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c
Update to etna_viv commit 6c9c706.
Signed-off-by: Christian Gmeiner
Reviewed-by: Wladimir J. van der Laan
---
src/gallium/drivers/etnaviv/hw/cmdstream.xml.h | 36 ++-
src/gallium/drivers/etnaviv/hw/common.xml.h| 117
No hardware query is supported yet.
v1 -> v2
- removed query_type from strcut etna_hw_sample_provider
Signed-off-by: Christian Gmeiner
---
src/gallium/drivers/etnaviv/Makefile.sources | 2 +
src/gallium/drivers/etnaviv/etnaviv_context.c | 11 ++
Works just fine for me, and patch looks good.
Reviewed-by: Lyude Paul
On Wed, 2017-10-18 at 16:55 -0700, Dylan Baker wrote:
> Signed-off-by: Dylan Baker
> ---
> src/egl/meson.build | 46 --
> 1 file
> There is one difference - how the sum is interpreted - uint64_t vs. bool
> value. In general the code
Ok in that case it's ok like this, just looked like unnecessary/accidental
duplication.
Regards,
Wladimir
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Reviewed-by: Bas Nieuwenhuizen
On Thu, Oct 19, 2017 at 8:54 PM, Fredrik Höglund wrote:
> The Vulkan specification says:
>
>"... an execution dependency with only VK_PIPELINE_STAGE_TOP_OF_-
> PIPE_BIT in the source stage mask will effectively
On Wed, Oct 11, 2017 at 5:18 PM, Samuel Pitoiset
wrote:
> If the secondary buffers don't use any descriptors we don't
> have to re-emit the ones from the primary command buffer.
>
> Signed-off-by: Samuel Pitoiset
> ---
>
On Tue, Oct 17, 2017 at 11:03 AM, Samuel Pitoiset
wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 38 ++
> 1 file changed, 26 insertions(+), 12 deletions(-)
>
> diff
The Vulkan specification says:
"... an execution dependency with only VK_PIPELINE_STAGE_TOP_OF_-
PIPE_BIT in the source stage mask will effectively not wait for
any prior commands to complete."
Signed-off-by: Fredrik Höglund
---
src/amd/vulkan/radv_cmd_buffer.c | 3
Reviewed-by: Bas Nieuwenhuizen
as well.
On Thu, Oct 19, 2017 at 12:27 AM, Timothy Arceri wrote:
> It looks the original indirect mask was probably copied from
> ANV.
>
> Sascha Willems demo results:
>
> tessellation ~4000 -> ~4200 fps
>
> V2:
On Wed, Oct 18, 2017 at 09:28:01PM +0200, Daniel Vetter wrote:
> On Wed, Oct 18, 2017 at 6:59 PM, Michel Dänzer wrote:
> > On 18/10/17 12:15 PM, Nicolai Hähnle wrote:
> >> On 18.10.2017 10:10, Daniel Vetter wrote:
> >>> On Tue, Oct 17, 2017 at 09:01:52PM +0200, Nicolai Hähnle
r-b for the series. MAybe add a fixes tag?
On Thu, Oct 19, 2017 at 12:35 PM, Samuel Pitoiset
wrote:
> Only on CIK and later. We should only update VGT_INDEX_TYPE but
> it seems easier to re-emit all the index buffer packets.
>
> Signed-off-by: Samuel Pitoiset
r-b
On Thu, Oct 19, 2017 at 4:25 PM, Samuel Pitoiset
wrote:
> CLEAR_STATE will initialize DB_COUNT_CONTROL to 0 for CIK+.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 1 -
> src/amd/vulkan/si_cmd_buffer.c
On Thu, Oct 19, 2017 at 10:32:46AM -0700, Dylan Baker wrote:
> Otherwise -Dgallium-drivers= will cause libmesa_gallium to be built and
> the megadriver install script to attempt to install drivers without any
> actual drivers being built.
Tested-by: Rafael Antognolli
Not to be confused with variablePointersStorageBuffer which is the
subset of VK_KHR_variable_pointers required to enable the extension.
This means we now have "full" support for variable pointers.
---
src/intel/vulkan/anv_device.c | 2 +-
src/intel/vulkan/anv_pipeline.c | 5 ++---
2 files
This makes us key off of !offset instead of !block_index. It also puts
the guts inside a switch statement so that we can handle more than just
UBOs and SSBOs.
---
src/compiler/spirv/vtn_variables.c | 38 +++---
1 file changed, 23 insertions(+), 15 deletions(-)
---
src/compiler/spirv/spirv_to_nir.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index a2dcbcf..96ecff6 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@
There is no good reason why we should have the same logic repeated in
get_vulkan_resource_index and vtn_ssa_offset_pointer_dereference. If
we're a bit more careful about how we do things, we can just use the one
function and get rid of the other entirely. This also makes the push
constant
Up until now, all pointers have been ivec2s. We're about to add support
for pointers to workgroup storage and those are going to be uints.
---
src/compiler/spirv/vtn_variables.c | 30 --
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git
This commit moves them both into vtn_variables.c towards the top, makes
them take a vtn_builder, and replaces a hand-rolled instance of
is_external_block with a function call.
---
src/compiler/spirv/vtn_private.h | 7 ---
src/compiler/spirv/vtn_variables.c | 35
Before, we always left workgroup variables as shared nir_variables and
let the driver call nir_lower_io. This adds an option to do the
lowering directly in spirv_to_nir. To do this, we implicitly assign the
variables a std430 layout and then treat them like a UBO or SSBO and
immediately lower
This parallels what we do for vtn_block_load except that we don't yet
support anything except SSBO loads through this path.
---
src/compiler/spirv/vtn_variables.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/compiler/spirv/vtn_variables.c
This is equivalent and means we don't have resource index code scattered
about.
---
src/compiler/spirv/vtn_variables.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index
Instead of emitting absolutely everything, just emit the few functions
that are actually referenced in some way by the entrypoint. This should
save us quite a bit of time when handed large shader modules containing
many entrypoints.
---
src/compiler/spirv/spirv_to_nir.c | 29
This is a bit more general and lets us pass additional options into the
spirv_to_nir pass beyond what capabilities we support.
---
src/amd/vulkan/radv_shader.c | 23 +--
src/compiler/spirv/nir_spirv.h| 26 ++
src/compiler/spirv/spirv_to_nir.c |
We have a nir_builder and it has an impl field.
---
src/compiler/spirv/spirv_to_nir.c | 9 -
src/compiler/spirv/vtn_cfg.c | 2 +-
src/compiler/spirv/vtn_private.h | 1 -
src/compiler/spirv/vtn_variables.c | 2 +-
4 files changed, 6 insertions(+), 8 deletions(-)
diff --git
Not to be confused with variablePointersStorageBuffer which is the
subset of VK_KHR_variable_pointers required to enable the extension.
This gives us "full" support for variable pointers.
The approach chosen here was to do the lowering to _shared intrinsics
directly in spirv_to_nir instead of
On Tue, Oct 17, 2017 at 10:38:17PM +0200, Christian Gmeiner wrote:
> Galliums query_type used in APIs is unsigned.
Reviewed-by: Wladimir J. van der Laan
> Signed-off-by: Christian Gmeiner
> ---
> src/gallium/drivers/etnaviv/etnaviv_query.h| 2
On Tue, Oct 17, 2017 at 10:38:15PM +0200, Christian Gmeiner wrote:
> Passes most occlusion query piglits. The following piglits are broken:
> - spec@arb_occlusion_query@occlusion_query_meta_fragments
> - spec@arb_occlusion_query@occlusion_query_meta_save
> - spec@arb_occlusion_query2@render
>
>
On Tue, Oct 17, 2017 at 10:38:16PM +0200, Christian Gmeiner wrote:
> Signed-off-by: Christian Gmeiner
Reviewed-by: Wladimir J. van der Laan
> ---
> src/gallium/drivers/etnaviv/etnaviv_screen.c | 3 ++-
> 1 file changed, 2 insertions(+), 1
On Tue, Oct 17, 2017 at 10:38:14PM +0200, Christian Gmeiner wrote:
> No hardware query is supported yet.
>
> Signed-off-by: Christian Gmeiner
Reviewed-by: Wladimir J. van der Laan
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Reviewed-by: Marek Olšák
Marek
On Thu, Oct 19, 2017 at 6:40 PM, Tim Rowley wrote:
> A number of double/int64 operations don't have matching
> read and write usage masks, which the fallthrough case of
> tgsi_util_get_inst_usage_mask assumes for
Otherwise -Dgallium-drivers= will cause libmesa_gallium to be built and
the megadriver install script to attempt to install drivers without any
actual drivers being built.
fixes: 66f97f6640f5316b36177fd1053f0027eb6ec6cc ("meson: build radeonsi")
Reported-by: Rafael Antognolli
Quoting Emil Velikov (2017-10-19 09:44:37)
> On 18 October 2017 at 18:27, Dylan Baker wrote:
>
> >> > +Note that in meson this defaults to "debug", and not setting it to
> >> > +"release" will yield non-optimal performance and binary size
> >> Ouch, can we change that?
> >
On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin wrote:
> On Thu, Oct 19, 2017 at 12:40 PM, Iago Toral wrote:
>> On Thu, 2017-10-19 at 12:37 -0400, Ilia Mirkin wrote:
>>> Will this work with SSO shaders? Presumably the validation still has
>>> to happen, but
Quoting Daniel Stone (2017-10-19 07:34:28)
> Hi Dylan,
>
> On 19 October 2017 at 01:55, Dylan Baker wrote:
> > This is based heavily on Daniel Stone's work for the same, rebased on
> > master and with a number of TODO's fixed.
> >
> > This does not implement glvnd (which is
On Tue, Oct 17, 2017 at 10:38:13PM +0200, Christian Gmeiner wrote:
> Update to etna_viv commit 6c9c706.
>
> Signed-off-by: Christian Gmeiner
Reviewed-by: Wladimir J. van der Laan
> ---
> src/gallium/drivers/etnaviv/hw/cmdstream.xml.h | 36 ++-
>
Reviewed-by: Roland Scheidegger
Albeit the way those masks are derived looks quite error-prone in
general (especially for new opcodes).
Am 19.10.2017 um 18:40 schrieb Tim Rowley:
> A number of double/int64 operations don't have matching
> read and write usage masks, which
On Thu, Oct 19, 2017 at 12:40 PM, Iago Toral wrote:
> On Thu, 2017-10-19 at 12:37 -0400, Ilia Mirkin wrote:
>> Will this work with SSO shaders? Presumably the validation still has
>> to happen, but I don't think cross_validate_outputs_to_inputs() will
>> end up getting called.
On 18 October 2017 at 18:27, Dylan Baker wrote:
>> > +Note that in meson this defaults to "debug", and not setting it to
>> > +"release" will yield non-optimal performance and binary size
>> Ouch, can we change that?
>
> When I did an informal poll in the Intel cube the
A number of double/int64 operations don't have matching
read and write usage masks, which the fallthrough case of
tgsi_util_get_inst_usage_mask assumes for componentwise
tagged instructions.
No regressions in llvmpipe piglit; fixes a large number of
swr regressions.
---
Reviewed-by: Bruce Cherniak
> On Oct 19, 2017, at 8:12 AM, Tim Rowley wrote:
>
> Highlights are code cleanups, some more simd16 work (disabled by default),
> and tuning for the Intel Xeon Phi architecture.
>
> Tim Rowley (7):
>
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