[Mesa-dev] [PATCH] meson: drop vulkan if no drivers are built

This avoids the following build-error when building with emtpy vulkan-drivers and without glx=dri: Meson encountered an error in file src/vulkan/wsi/meson.build, line 30, column 2: Unknown variable "dep_xcb". Signed-off-by: Erik Faye-Lund --- src/meson.build | 4 +++- 1

Re: [Mesa-dev] [PATCH v3 38/48] intel/fs: Don't use automatic exec size

On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote: > The automatic exec size inference can accidentally mess things up if > we're not careful.  For instance, if we have > > add(4)g38.2<4>Dg38.1<8,2,4>Dg38.2<8,2,4>D > > then the destination register will end up having a width of

Re: [Mesa-dev] [PATCH] Android: move drivers' symlinks to /vendor

On 26 October 2017 at 23:48, Mauro Rossi wrote: > Having moved gallium_dri.so library to /vendor/lib/dri > also symlinks need to be coherently created using TARGET_OUT_VENDOR insted of > TARGET_OUT > or all non Intel drivers will not be loaded with Android N and earlier, >

Re: [Mesa-dev] [PATCH] intel/compiler/gen9: Pixel shader header only workaround

On Friday, October 27, 2017 4:26:32 AM PDT Pohjolainen, Topi wrote: > On Fri, Oct 27, 2017 at 03:02:59AM -0700, Kenneth Graunke wrote: > > On Wednesday, October 25, 2017 10:37:37 AM PDT Topi Pohjolainen wrote: > > > Fixes intermittent GPU hangs on Broxton with an Intel internal > > > test case. >

Re: [Mesa-dev] [PATCH] intel/compiler/gen9: Pixel shader header only workaround

On Fri, Oct 27, 2017 at 03:02:59AM -0700, Kenneth Graunke wrote: > On Wednesday, October 25, 2017 10:37:37 AM PDT Topi Pohjolainen wrote: > > Fixes intermittent GPU hangs on Broxton with an Intel internal > > test case. > > > > There are plenty of similar fragment shaders in piglit that do > >

Re: [Mesa-dev] [PATCH 1/7] svga: Use __asm__ instead of asm

On 27 October 2017 at 00:57, Dylan Baker wrote: > Which allows the code to be compiled with c99 instead of gnu99. > > A little history. This code is guarded by #ifdef __GNUC__, so it's only > compiled with autotools on *nix, SCons with MSVC wont hit that code. > However,

Re: [Mesa-dev] [PATCH 9/9] meson: build gallium based osmesa

On Thursday, 2017-10-26 13:55:35 -0700, Dylan Baker wrote: > Quoting Eric Engestrom (2017-10-26 02:40:20) > > On Wednesday, 2017-10-25 15:58:23 -0700, Dylan Baker wrote: > > > This has been tested with the osdemo from mesa-demos > > > > > > Signed-off-by: Dylan Baker >

Re: [Mesa-dev] [PATCH 1/2] i965: remove if conditions from scratch_bo unref

For the series Reviewed-by: Emil Velikov -Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3 34/48] intel/fs: Rework zero-length URB write handling

On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote: > Originally we tried to handle this case based on > slots_valid.  However, > there are a number of ways that this can go wrong.  For one, we throw > away any trailing slots which either aren't written or are set to > VARYING_SLOT_PAD.  I

Re: [Mesa-dev] [PATCH v4 2/2] glsl: fix interpolateAtXxx(some_vec[idx], ...) with dynamic idx

Reviewed-by: Timothy Arceri On 10/10/17 23:09, Nicolai Hähnle wrote: From: Nicolai Hähnle The dynamic index of a vector (not array!) is lowered to a sequence of conditional assignments. However, the interpolate_at_* expressions require that the

Re: [Mesa-dev] [PATCH v4 1/2] glsl: allow any l-value of an input variable as interpolant in interpolateAt*

I meant to review this a while ago. Sorry for the delay. Reviewed-by: Timothy Arceri On 10/10/17 23:09, Nicolai Hähnle wrote: From: Nicolai Hähnle The intended rule has been clarified in GLSL 4.60, Section 8.13.2 (Interpolation Functions):

Re: [Mesa-dev] [PATCH 1/2] i965: remove if conditions from scratch_bo unref

On Friday, October 27, 2017 2:56:45 AM PDT Tapani Pälli wrote: > brw_bo_unreference handles NULL case > > Signed-off-by: Tapani Pälli > --- > src/mesa/drivers/dri/i965/brw_context.c | 16 ++-- > 1 file changed, 6 insertions(+), 10 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH v3 31/48] intel/cs: Re-run final NIR optimizations for each SIMD size

This should be squashed into the previous commit On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote: > With the advent of SPIR-V subgroup operations, compute shaders will > have > to be slightly different depending on the SIMD size at which they > execute.  In order to allow us to do

Re: [Mesa-dev] [PATCH] intel/compiler/gen9: Pixel shader header only workaround

On Wednesday, October 25, 2017 10:37:37 AM PDT Topi Pohjolainen wrote: > Fixes intermittent GPU hangs on Broxton with an Intel internal > test case. > > There are plenty of similar fragment shaders in piglit that do > not use any varyings and any uniforms. According to the > documentation special

Re: [Mesa-dev] [PATCH] i965: unref push_const_bo in intelDestroyContext

On 10/27/2017 12:57 PM, Kenneth Graunke wrote: On Friday, October 27, 2017 2:08:36 AM PDT Emil Velikov wrote: On 27 October 2017 at 07:52, Tapani Pälli wrote: Valgrind shows that leak is caused by gen6_upload_push_constant, add unref push_const_bo per stage to

Re: [Mesa-dev] [PATCH v3 30/48] intel/cs: Re-run final NIR optimizations for each SIMD size

On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote: > With the advent of SPIR-V subgroup operations, compute shaders will > have > to be slightly different depending on the SIMD size at which they > execute.  In order to allow us to do dispatch-width specific things > in > NIR, we re-run the

Re: [Mesa-dev] [PATCH] i965: unref push_const_bo in intelDestroyContext

On Friday, October 27, 2017 2:08:36 AM PDT Emil Velikov wrote: > On 27 October 2017 at 07:52, Tapani Pälli wrote: > > Valgrind shows that leak is caused by gen6_upload_push_constant, add > > unref push_const_bo per stage to destructor to fix this (like done for > >

[Mesa-dev] [PATCH 2/2] i965: unref push_const_bo in intelDestroyContext

Valgrind shows that leak is caused by gen6_upload_push_constant, add unref push_const_bo per stage to destructor to fix this (like done for scratch_bo). ==10952== 144 bytes in 1 blocks are definitely lost in loss record 44 of 66 ==10952==at 0x4C30A1E: calloc (vg_replace_malloc.c:711)

[Mesa-dev] [PATCH 1/2] i965: remove if conditions from scratch_bo unref

brw_bo_unreference handles NULL case Signed-off-by: Tapani Pälli --- src/mesa/drivers/dri/i965/brw_context.c | 16 ++-- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c

Re: [Mesa-dev] [PATCH] formatquery: use correct target check for IMAGE_FORMAT_COMPATIBILITY_TYPE

Thanks for fixing this. Reviewed-by: Antia Puentes On 27/10/17 11:18, Alejandro Piñeiro wrote: From the spec: "IMAGE_FORMAT_COMPATIBILITY_TYPE: The matching criteria use for the resource when used as an image textures is returned in . This is equivalent to

[Mesa-dev] [PATCH] formatquery: use correct target check for IMAGE_FORMAT_COMPATIBILITY_TYPE

From the spec: "IMAGE_FORMAT_COMPATIBILITY_TYPE: The matching criteria use for the resource when used as an image textures is returned in . This is equivalent to calling GetTexParameter" So we would need to return None for any target not supported by GetTexParameter. By mistake, we

Re: [Mesa-dev] [PATCH v3 29/48] intel/cs: Rework the way thread local ID is handled

On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote: > Previously, brw_nir_lower_intrinsics added the param and then emitted > a > load_uniform intrinsic to load it directly.  This commit switches > things > over to use a specific NIR intrinsic for the thread id.  The one > thing I > don't

Re: [Mesa-dev] [PATCH] i965: unref push_const_bo in intelDestroyContext

On 27 October 2017 at 07:52, Tapani Pälli wrote: > Valgrind shows that leak is caused by gen6_upload_push_constant, add > unref push_const_bo per stage to destructor to fix this (like done for > scratch_bo). > >==10952== 144 bytes in 1 blocks are definitely lost in

Re: [Mesa-dev] [PATCH v2] radeonsi: update hack for HTILE corruption in ARK: Survival Evolved

Pushed with "clear_db_cache_before_clear", Thanks Marek. On 10/26/2017 10:42 PM, Marek Olšák wrote: Please "clear_db_cache_before_clear" and the option too. With that, the patch is: Reviewed-by: Marek Olšák Thanks, Marek On Thu, Oct 26, 2017 at 6:08 PM, Samuel Pitoiset

Re: [Mesa-dev] [PATCH v3 25/48] intel/cs: Drop max_dispatch_width checks from compile_cs

On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote: > The only things that adjust fs_visitor::max_dispatch_width are render > target writes which don't happen in compute shaders so they're > pointless. > --- >  src/intel/compiler/brw_fs.cpp | 6 ++ >  1 file changed, 2 insertions(+), 4

Re: [Mesa-dev] [PATCH] Android: move drivers' symlinks to /vendor

Reviewed-by: Tapani Pälli On 10/27/2017 01:48 AM, Mauro Rossi wrote: Having moved gallium_dri.so library to /vendor/lib/dri also symlinks need to be coherently created using TARGET_OUT_VENDOR insted of TARGET_OUT or all non Intel drivers will not be loaded with Android

Re: [Mesa-dev] [PATCH v3 00/10] glsl_to_tgsi: Further improvement of lifetime tracking for register merge

Am Donnerstag, den 26.10.2017, 17:28 +0100 schrieb Emil Velikov: > > >  .../tests/test_glsl_to_tgsi_lifetime.cpp   | 1278 > > +++- > > JFYI you'd want to explicitly undef NDEBUG in the test. > git grep -10 "#undef NDEBUG" -  for examples > > Otherwise the asserts will

Re: [Mesa-dev] [PATCH v3 23/48] intel/fs: Assign constant locations if they haven't been assigned

This sounds good to me, but I guess it is not really fixing anything, right? I ask because the subject claims that this patch does something that the original code was already supposed to be doing. On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote: > Before, we bailing in

Re: [Mesa-dev] [PATCH v3 20/48] intel/fs: Protect opt_algebraic from OOB BROADCAST indices

On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote: > --- >  src/intel/compiler/brw_fs.cpp | 10 -- >  1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/src/intel/compiler/brw_fs.cpp > b/src/intel/compiler/brw_fs.cpp > index 1c4351b..52079d3 100644 > ---

Re: [Mesa-dev] [PATCH v3 19/48] i965/fs/nir: Don't stomp 64-bit values to D in get_nir_src

On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote: > --- >  src/intel/compiler/brw_fs_nir.cpp | 33 +-- > -- >  1 file changed, 21 insertions(+), 12 deletions(-) > > diff --git a/src/intel/compiler/brw_fs_nir.cpp > b/src/intel/compiler/brw_fs_nir.cpp > index

[Mesa-dev] [PATCH] i965: unref push_const_bo in intelDestroyContext

Valgrind shows that leak is caused by gen6_upload_push_constant, add unref push_const_bo per stage to destructor to fix this (like done for scratch_bo). ==10952== 144 bytes in 1 blocks are definitely lost in loss record 44 of 66 ==10952==at 0x4C30A1E: calloc (vg_replace_malloc.c:711)

Re: [Mesa-dev] [PATCH v3 18/48] i965/fs/nir: Minor refactor of store_output

On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote: > Stop retyping the output of shuffle_64bit_data_for_32bit_write.  It's > always BRW_REGISTER_TYPE_D which is perfectly fine for writing out. > Also, when we change get_nir_src to return something with a 64-bit > type > for 64-bit values,

[Mesa-dev] [PATCH v3.5] intel/compiler: Add union types for prog_data and prog_key stages

Signed-off-by: Jordan Justen Reviewed-by: Jason Ekstrand Cc: Jason Ekstrand Cc: Kenneth Graunke --- * Add comment (Ken) * No typedef (Jason) src/intel/compiler/brw_compiler.h | 20

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