From: Dave Airlie
This is needed for the GLSL->TGSI translation for hw atomic counters.
Signed-off-by: Dave Airlie
---
src/mesa/main/mtypes.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index
From: Dave Airlie
This looks like an evergreen specific feature, but with atomic
counters AMD have hw specific counters they use instead of operating
on buffers directly. These are separate to the buffer atomics,
so require different limits and code paths.
I've left the CAP
From: Dave Airlie
This API binds atomic buffers for all bound shaders (as per the
GL semantics).
This is needed to support cross shader hw atomic counters.
Signed-off-by: Dave Airlie
---
src/gallium/docs/source/context.rst | 8
Until now we only implement ARB_shader_atomic_counters using SSBO
atomics, however this extension was originally designed for exposing
hardware that was faster than ssbo atomics. Evergreen and Cayman hw
have append/consume hardware intended for this purpose.
This series adds support to glsl to
From: Dave Airlie
If we have hardware like evergreen with limited hw counters, we need
to assign each used counter in a series of linked shaders a unique
index so the driver can assign them to the hw counters uniquely.
Since I need to know this information at compile time, I
From: Dave Airlie
This adds support for the evergreen/cayman atomic counters.
These are implemented using GDS append/consume counters. The values
for each counter are loaded before drawing and saved after each draw
using special CP packets.
Signed-off-by: Dave Airlie
From: Dave Airlie
This adds support for creating the hw atomic tgsi from
the glsl codepaths.
Signed-off-by: Dave Airlie
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 110 -
1 file changed, 94 insertions(+), 16 deletions(-)
From: Dave Airlie
This adds support for a hw atomic counters to TGSI.
A new register file for storing atomic counters is added,
along with a new atomic counter semantic, along with docs
for both.
Signed-off-by: Dave Airlie
---
From: Dave Airlie
HW atomics need to use caps to set some limits, and some
other limits may also need limiting.
This fixes things up to work for evergreen hw, it may need
more changes in the future if other hw wants to use this path.
Signed-off-by: Dave Airlie
From: Dave Airlie
This adds a new atom that calls the new driver API to
bind buffers containing hw atomics.
Signed-off-by: Dave Airlie
---
src/mesa/state_tracker/st_atom_atomicbuf.c | 37
From: Dave Airlie
Signed-off-by: Dave Airlie
---
docs/features.txt | 6 +++---
docs/relnotes/17.4.0.html | 1 +
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/docs/features.txt b/docs/features.txt
index d228a02..1d03326 100644
---
That's actually a pretty good suggestion, as it would help me get my feet
wet on piglit changes with something simple.
Thanks,
Andres
On Nov 2, 2017 1:24 AM, "Timothy Arceri" wrote:
> On 02/11/17 15:12, Andres Rodriguez wrote:
>
>> It was tested against steamvr using an
On 02/11/17 15:12, Andres Rodriguez wrote:
It was tested against steamvr using an opengl vr client (hellovr_opengl
for simplicity).
Hi Andres,
Full tests would be great but at the very least we should start with
some piglit tests that exercise the error paths.
Tim
Regards,
Andres
On
It was tested against steamvr using an opengl vr client (hellovr_opengl
for simplicity).
Regards,
Andres
On 2017-11-02 12:07 AM, Jason Ekstrand wrote:
Out of curiosity, how has this series been tested beyond regression
testing?
On November 1, 2017 20:57:57 Andres Rodriguez
Out of curiosity, how has this series been tested beyond regression testing?
On November 1, 2017 20:57:57 Andres Rodriguez wrote:
This series adds radeonsi support for GL_EXT_semaphore.
GL_EXT_semaphore is used by steam's vrclient to synchronize access to shared
surfaces
Expose the feature only when we have syncobj support available
Signed-off-by: Andres Rodriguez
---
src/gallium/drivers/radeonsi/si_pipe.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
Signed-off-by: Andres Rodriguez
---
src/mesa/main/externalobjects.c | 30 ++
1 file changed, 14 insertions(+), 16 deletions(-)
diff --git a/src/mesa/main/externalobjects.c b/src/mesa/main/externalobjects.c
index b82d425..67912dd 100644
---
Signed-off-by: Andres Rodriguez
---
src/gallium/drivers/radeonsi/si_blit.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gallium/drivers/radeonsi/si_blit.c
index abf25b6..d28eef2 100644
---
Make sure memory is accessible to the external client, for the specified
memory object, before the signal/after the wait.
Signed-off-by: Andres Rodriguez
---
src/mesa/main/dd.h | 14 ++-
src/mesa/main/externalobjects.c | 38
Allow importing, waiting and signaling of semaphore objects.
Semaphore objects are backed by syncobj based fences.
Signed-off-by: Andres Rodriguez
---
src/gallium/drivers/radeon/r600_pipe_common.c | 52 +++
This operation is meant to transition resource in and out of optimized
layouts for compatibility with external clients.
Signed-off-by: Andres Rodriguez
---
src/gallium/auxiliary/util/u_threaded_context.c| 27 ++
Signed-off-by: Andres Rodriguez
---
src/mesa/state_tracker/st_cb_semaphoreobjects.c | 33 +++--
1 file changed, 31 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_cb_semaphoreobjects.c
Add the ability to signal a syncobj when a cs completes execution.
Signed-off-by: Andres Rodriguez
---
src/gallium/drivers/radeon/radeon_winsys.h | 12 +
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 81 +-
This series adds radeonsi support for GL_EXT_semaphore.
GL_EXT_semaphore is used by steam's vrclient to synchronize access to shared
surfaces (vulkan <-> gl interop). It allows our gl vrclients to enqueue their
framebuffer surface without waiting for a glFinish().
If anyone has any suggestions
Memory synchronization is left for a future patch.
Signed-off-by: Andres Rodriguez
---
src/mesa/main/dd.h | 14 ++
src/mesa/main/externalobjects.c | 32
2 files changed, 46 insertions(+)
diff --git
Bits to implement ServerWaitSemaphoreObject/ServerSignalSemaphoreObject
Signed-off-by: Andres Rodriguez
---
src/mesa/state_tracker/st_cb_semaphoreobjects.c | 28 +
1 file changed, 28 insertions(+)
diff --git
Add basic semaphore object operations.
Signed-off-by: Andres Rodriguez
---
src/mesa/Makefile.sources | 2 +
src/mesa/meson.build| 2 +
src/mesa/state_tracker/st_cb_semaphoreobjects.c | 56 +
Signed-off-by: Andres Rodriguez
---
src/gallium/auxiliary/util/u_threaded_context.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_threaded_context.c
b/src/gallium/auxiliary/util/u_threaded_context.c
index
Signed-off-by: Andres Rodriguez
---
src/gallium/drivers/ddebug/dd_context.c | 23 +++
src/gallium/drivers/ddebug/dd_screen.c | 25 +
src/gallium/drivers/trace/tr_context.c | 36 ++
EXT_semaphore and EXT_semaphore_fd define no pnames. Therefore there
isn't much to do besides determining the correct error code.
Signed-off-by: Andres Rodriguez
---
src/mesa/main/externalobjects.c | 23 +++
1 file changed, 23 insertions(+)
diff --git
Guarded by PIPE_CAP_SEMAPHORE.
Signed-off-by: Andres Rodriguez
---
src/mesa/main/extensions_table.h | 2 ++
src/mesa/main/mtypes.h | 2 ++
src/mesa/state_tracker/st_extensions.c | 2 ++
3 files changed, 6 insertions(+)
diff --git
Used by EXT_semmaphore and EXT_semaphore_fd
Signed-off-by: Andres Rodriguez
---
src/mesa/drivers/common/driverfuncs.c | 3 +
src/mesa/main/dd.h| 34 +++
src/mesa/main/externalobjects.c | 161 +-
Used to guard support for EXT_semaphore.
Signed-off-by: Andres Rodriguez
---
src/gallium/docs/source/screen.rst | 1 +
src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 +
src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
https://bugs.freedesktop.org/show_bug.cgi?id=103140
Kenneth Graunke changed:
What|Removed |Added
Resolution|--- |FIXED
---
src/amd/common/ac_nir_to_llvm.c | 4
1 file changed, 4 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ac50debdde..ec51ed7007 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,22 +127,20 @@ struct
---
src/amd/common/ac_llvm_build.c | 1 +
src/amd/common/ac_llvm_build.h | 1 +
src/amd/common/ac_nir_to_llvm.c | 15 +--
3 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 1519262b3d..5640a23b8a
---
src/amd/common/ac_nir_to_llvm.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ec51ed7007..38a65b9cd1 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
---
src/amd/common/ac_llvm_build.c | 1 +
src/amd/common/ac_llvm_build.h | 1 +
src/amd/common/ac_nir_to_llvm.c | 20 +---
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index
---
src/amd/common/ac_nir_to_llvm.c | 68 -
1 file changed, 33 insertions(+), 35 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 45eb613579..736131ab56 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
---
src/amd/common/ac_nir_to_llvm.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 6a638e3f16..40c856224a 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
---
src/amd/common/ac_llvm_build.c | 1 +
src/amd/common/ac_llvm_build.h | 1 +
src/amd/common/ac_nir_to_llvm.c | 8 +++-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 1a0d44bcdd..1519262b3d 100644
---
---
src/amd/common/ac_nir_to_llvm.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 40c856224a..b0f0ea63ed 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@
---
src/amd/common/ac_nir_to_llvm.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index b0f0ea63ed..45eb613579 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21
---
src/amd/common/ac_nir_to_llvm.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 736131ab56..1e1a1c0276 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21
On 2 November 2017 at 11:50, Timothy Arceri wrote:
> ---
Yeah why not,
For the series:
Reviewed-by: Dave Airlie
> src/amd/common/ac_nir_to_llvm.c | 360
>
> 1 file changed, 179 insertions(+), 181 deletions(-)
On 2 November 2017 at 05:58, Bas Nieuwenhuizen wrote:
> It confuses CTS. This pregenerates the heap info into the
> physical device, so we can use it for translating contiguous
> indices into our "standard" ones.
>
> This also makes the WSI a bit smarter in case the
---
src/amd/common/ac_nir_to_llvm.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index d792042925..9c01f0ad37 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21
---
src/amd/common/ac_nir_to_llvm.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9c01f0ad37..44137deb09 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@
---
src/amd/common/ac_nir_to_llvm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index d741fb7b45..c3c9d7a859 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct
---
src/amd/common/ac_nir_to_llvm.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index c3c9d7a859..2437ea05c1 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21
---
src/amd/common/ac_nir_to_llvm.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 44137deb09..d741fb7b45 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@
The FC suffix does not help. We are testing openglcts from
opengl-cts-4.6.0 branch of gitlab.khronos.org:Tracker/vk-gl-cts.git:
d6144a989 Fix attribute mapping in enhanced layouts tests for input arrays
MESA_GLES_VERSION_OVERRIDE=3.2 MESA_GLSL_VERSION_OVERRIDE=460
I haven't read it all in detail but I have a strong suspicion that this is
probably broken for TCS outputs. In the TCS, we write values out
immediately and we have to be able to write single components. This is
because TCS outputs also act as a sort of SLM for tessellation shaders
where each
I'm done reading for the day. As you're working on incorporating feedback,
I'd like you to re-arrange things a bit so that we do everything required
to enable VK_KHR_16bit_storage (including advertising the Vulkan extension
string) for SSBOs and UBOs first and then enable it for push constants
Tested-by, and Reviewed-by: Andres Rodriguez
On 2017-11-01 07:59 PM, Dave Airlie wrote:
From: Dave Airlie
This should make sure we don't treat exports buffers as local
bos.
Fixes: a639d40f13 (radv: add support for local bos. (v3))
Signed-off-by: Dave
From: Dave Airlie
This should make sure we don't treat exports buffers as local
bos.
Fixes: a639d40f13 (radv: add support for local bos. (v3))
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_device.c | 7 +--
src/amd/vulkan/radv_private.h | 2
This reverts commit d364684711a5894fd3221191811d56713d6abdee.
The commit that bumped the autotools version was reverted, so lets
revert the meson version to match.
fixes: 1f2640bfa940362c7550cdd065d37555f21c8ae8
"Revert "winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx.""
Quoting Ilia Mirkin (2017-11-01 16:05:17)
> On Wed, Nov 1, 2017 at 7:03 PM, Dylan Baker wrote:
> > Quoting Ilia Mirkin (2017-11-01 15:52:56)
> >> On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace
> >> wrote:
> >> > On Wed 01 Nov 2017, Dylan Baker wrote:
On Wed, Nov 1, 2017 at 7:03 PM, Dylan Baker wrote:
> Quoting Ilia Mirkin (2017-11-01 15:52:56)
>> On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace
>> wrote:
>> > On Wed 01 Nov 2017, Dylan Baker wrote:
>> >> Quoting Chad Versace (2017-11-01 14:43:28)
>>
On Thu, Oct 12, 2017 at 11:38 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> The VS load input for 16-bit values receives pairs of 16-bit values
> packed in 32-bit values. Because of the adjusted format used at:
>
> anv/pipeline: Use 32-bit surface formats for 16-bit formats
>
Quoting Ilia Mirkin (2017-11-01 15:52:56)
> On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace wrote:
> > On Wed 01 Nov 2017, Dylan Baker wrote:
> >> Quoting Chad Versace (2017-11-01 14:43:28)
> >> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
> >
> >>
Currently the versions are set in the header, and then sed is used to
extract them, so that autotools can use them elsewhere.
This is odd. Autotools is perfectly capable of configuring the header
with the versions, and then they don't need to be extracted from the
the header. This is cleaner and
---
meson.build | 40 -
meson_options.txt| 13 +
src/gallium/meson.build | 7 ++-
src/gallium/state_trackers/vdpau/meson.build | 32 ++
src/gallium/targets/vdpau/meson.build| 87
Build tested only.
Signed-off-by: Dylan Baker
---
meson.build | 2 +
meson_options.txt | 2 +-
src/gallium/drivers/svga/meson.build| 88 +
src/gallium/meson.build |
---
meson.build | 34 +-
meson_options.txt | 13 ++
src/gallium/meson.build | 7 ++-
src/gallium/state_trackers/xvmc/meson.build | 52 +
src/gallium/targets/xvmc/meson.build|
---
meson.build | 35 +-
meson_options.txt | 13 ++
src/gallium/meson.build | 7 ++-
src/gallium/state_trackers/va/meson.build | 39
src/gallium/targets/va/meson.build| 78
Signed-off-by: Dylan Baker
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index 6ad8c8bbf4b..bae3b5a02ef 100644
--- a/meson.build
+++ b/meson.build
@@ -654,7 +654,7 @@ if with_gallium_freedreno
endif
---
meson.build | 21 +
meson_options.txt | 7 +++
src/gallium/meson.build | 7 ++-
src/gallium/state_trackers/xa/meson.build | 45 ++
src/gallium/targets/xa/meson.build| 77
Build tested only.
Signed-off-by: Dylan Baker
---
meson.build | 7 +++-
src/gallium/drivers/i915/meson.build| 70 +
src/gallium/meson.build | 7 +++-
src/gallium/targets/dri/meson.build
This is build tested only
Signed-off-by: Dylan Baker
---
meson.build | 4 +-
meson_options.txt| 2 +-
src/gallium/drivers/r300/meson.build | 156 +++
src/gallium/meson.build |
Build tested only.
Signed-off-by: Dylan Baker
---
meson.build| 12 ++---
meson_options.txt | 2 +-
src/gallium/drivers/virgl/meson.build | 39 ++
src/gallium/meson.build
---
meson.build| 54 ++-
meson_options.txt | 13
src/gallium/meson.build| 7 +-
.../state_trackers/omx_bellagio/meson.build| 30 +
This argument is the wrong approach for handling gallium media state
trackers, since it doesn't allow for an auto option. Instead we'll use
tristates, which do allow for auto.
This option has never been wired to anything anyway.
Signed-off-by: Dylan Baker
---
This is built on my last series to add the remaining gallium drivers: i915g,
r300, r600, svga, and virgl; and adds to it the 5 gallium media state trackers.
most of this is pretty straight forward build logic, but there is one change
to XA to set the version from the build system instead of the
Signed-off-by: Dylan Baker
Tested-by: Aaron Watry
---
meson.build | 20 --
meson_options.txt| 2 +-
src/gallium/drivers/r600/meson.build | 128 +++
On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace wrote:
> On Wed 01 Nov 2017, Dylan Baker wrote:
>> Quoting Chad Versace (2017-11-01 14:43:28)
>> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
>
>> Glad that it's working out for you guys!
>>
>> Can I
V2: Remove the bits enabling Float blend optimization. It is
enabled through CACHE_MODE_SS register.
Update the comment.
This workaround doesn't fix any of the piglit hangs we've seen
on CNL.
Cc: Nanley Chery
Cc: Jason Ekstrand
This optimization is enabled for previous generations too.
See Mesa commit c17e214a6b
On CNL this bit has been moved to CACHE_MODE_SS register.
Cc: Nanley Chery
Signed-off-by: Anuj Phogat
---
src/mesa/drivers/dri/i965/brw_defines.h | 3 +++
V2: Add the check for Post Sync Operation.
Update the workaround comment.
This workaround doesn't fix any of the piglit hangs we've seen
on CNL. But it might be fixing something we haven't tested yet.
Cc: Nanley Chery
Signed-off-by: Anuj Phogat
On Wed 01 Nov 2017, Dylan Baker wrote:
> Quoting Chad Versace (2017-11-01 14:43:28)
> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
> Glad that it's working out for you guys!
>
> Can I convince you to wire the anvil and i965 android/arc++ bits? ;)
>
> JFYI, the meson
There are few other (duplicate) workarounds which have similar recommendations:
WaFlushHangWhenNonPipelineStateAndMarkerStalled
WaCSStallBefore3DSamplePattern
WaPipeControlBefore3DStateSamplePattern
WaPipeControlBefore3DStateSamplePattern has some extra recommendations if
driver is using mid
On Sun, Oct 15, 2017 at 3:28 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Thu, Oct 12, 2017 at 08:38:17PM +0200, Jose Maria Casanova Crespo wrote:
> > From: Alejandro Piñeiro
> >
> > As we are using 32-bit surface formats with 16-bit elements we can be
>
This should work (I added "FC" at the end):
MESA_GLSL_VERSION_OVERRIDE=460 MESA_GL_VERSION_OVERRIDE=4.6FC
Marek
On Wed, Nov 1, 2017 at 11:16 PM, Mark Janes wrote:
> Mark Janes writes:
>
>> Marek Olšák writes:
>>
>>> Hi Mark,
Quoting Chad Versace (2017-11-01 14:43:28)
> Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
>
> I don't know how qualify my surprise...
>
> Wow.
>
> The Intel Vulkan driver is often all I need, so I was tempted to
> investigate whether Meson allowed building and installing
Mark Janes writes:
> Marek Olšák writes:
>
>> Hi Mark,
>>
>> Can you try the attached patches instead?
>
> After talking with Ken and Dylan, I realize that I missed a one-line
> patch from your thread with my last test (Oct 25 patch to
>
Dylan Baker writes:
> Quoting Lionel Landwerlin (2017-11-01 14:25:03)
>> On 01/11/17 20:30, Dylan Baker wrote:
>> > Quoting Scott D Phillips (2017-11-01 10:30:09)
>> >> Lionel Landwerlin writes:
>> >>
>> >>> On 31/10/17 21:11, Scott D Phillips
Quoting Lionel Landwerlin (2017-11-01 14:25:03)
> On 01/11/17 20:30, Dylan Baker wrote:
> > Quoting Scott D Phillips (2017-11-01 10:30:09)
> >> Lionel Landwerlin writes:
> >>
> >>> On 31/10/17 21:11, Scott D Phillips wrote:
> > +}
> [snip imgui]
>
>
Marek Olšák writes:
> Hi Mark,
>
> Can you try the attached patches instead?
After talking with Ken and Dylan, I realize that I missed a one-line
patch from your thread with my last test (Oct 25 patch to
intel_extensions.c). With that patch, there are no regressions in CI.
Wow. 10 seconds from a clean checkout to an installed Vulkan driver.
I don't know how qualify my surprise...
Wow.
The Intel Vulkan driver is often all I need, so I was tempted to
investigate whether Meson allowed building and installing just anvil and
nothing else. No OpenGL, no OpenGL ES, no
On Tue, Oct 24, 2017 at 4:49 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> From: Alejandro Piñeiro
>
> From Vulkan 1.0.50 spec, Section 3.30.1. Format Definition:
> VK_FORMAT_R16G16_SFLOAT
>
> A two-component, 32-bit signed floating-point format
On Wed, Nov 1, 2017 at 2:25 PM, Lionel Landwerlin
wrote:
> On 01/11/17 20:30, Dylan Baker wrote:
>>
>> Quoting Scott D Phillips (2017-11-01 10:30:09)
>>>
>>> Lionel Landwerlin writes:
>>>
On 31/10/17 21:11, Scott D Phillips
On Wed, Nov 01, 2017 at 04:24:21PM +0100, Daniel Vetter wrote:
> On Tue, Oct 24, 2017 at 05:06:33PM +0100, Chris Wilson wrote:
> > Through the use of mocs, we can define the cache usage for any surface
> > used by the GPU. In particular, we can request that L3 cache be
> > allocated for either a
On Thu, Oct 12, 2017 at 11:38 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> From: Alejandro Piñeiro
>
> It uses VK_KHR_get_physical_device_properties2 functionality to expose
> if the extension is supported or not.
>
> v2: update due rebase against master
https://bugs.freedesktop.org/show_bug.cgi?id=103539
Brian Paul changed:
What|Removed |Added
Status|NEW |RESOLVED
On 01/11/17 20:30, Dylan Baker wrote:
Quoting Scott D Phillips (2017-11-01 10:30:09)
Lionel Landwerlin writes:
On 31/10/17 21:11, Scott D Phillips wrote:
+}
[snip imgui]
imgui seems to be the first instance of someone pasting a sizeable third
party library
https://bugs.freedesktop.org/show_bug.cgi?id=103539
--- Comment #1 from Charles Huber ---
Reverting write_git_sha1_h_file() to the pre-3fd425aed7 code fixes the build
for me.
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You are receiving this mail because:
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On Tue, Oct 17, 2017 at 10:05 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> New shader attribute to mark when a location has 16-bit
> value. This patch includes support on mesa glsl and nir.
>
> v2: Remove use of is_half_slot as is a duplicate of is_16bit
> (Topi
Hi Mark,
Can you try the attached patches instead?
Thanks,
Marek
On Wed, Nov 1, 2017 at 9:49 PM, Mark Janes wrote:
> Dylan Baker writes:
>
>> I haven't run the CTS tests, but both the deqp and the piglit test pass on my
>> skl with Marek's patches
https://bugs.freedesktop.org/show_bug.cgi?id=103539
Bug ID: 103539
Summary: Windows build breaks if 'sh' is not available
Product: Mesa
Version: 17.2
Hardware: x86 (IA32)
OS: Windows (All)
Status: NEW
Dylan Baker writes:
> I haven't run the CTS tests, but both the deqp and the piglit test pass on my
> skl with Marek's patches applied.
I must have tested with only the patch 2 applied. Running with all
three patches in the series, I see no piglit/deqp regressions.
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