Re: [Mesa-dev] [PATCH mesa] u_debug: do not compile asserts when they are disabled

There was actually some ping-pong about this issue: d885c9dad (Keith Whitwell) introduced it, 7a2271c65 (José Fonseca) removed it , and f0ba7d897 (Keith Whitwell) introduced it again. Given this I would give some preference to not to forward standard assert instead, but don't really see it

Re: [Mesa-dev] [PATCH v2 24/25] i965: Call spirv_to_nir() instead of glsl_to_nir() for SPIR-V shaders

On 12/01/2017 04:44 AM, Timothy Arceri wrote: > > > On 01/12/17 04:28, Eduardo Lima Mitev wrote: >> This is the main fork of the shader compilation code-path, where a NIR >> shader is obtained by calling spirv_to_nir() or glsl_to_nir(), >> depending on its nature.. >> >> v2: Use 'spirv_data'

Re: [Mesa-dev] [PATCH 2/2] glsl: don't run intrastage array validation when the interface type is not an array

On Thu, 2017-11-30 at 15:47 +0100, Nicolai Hähnle wrote: > Can you add an explanation / spec quote for this? > Yes. "We validate that the interface block array type's definition matches. However, the function could be previously called if an non-array interface block has different type

Re: [Mesa-dev] [PATCH v2 00/25] Initial gl_spirv and spirv_extensions support in Mesa and i965

On 12/01/2017 04:54 AM, Timothy Arceri wrote: > On 01/12/17 04:28, Eduardo Lima Mitev wrote: >> Hello, >> >> This is the second version of the series providing initial support >> for ARB_gl_spirv and ARB_spirv_extensions in Mesa and i965. >> >> First version of the series can be found at >>

[Mesa-dev] [PATCH v3 22/25] mesa/glspirv: Create gl_linked_shader objects for a SPIR-V program

v2: Bail out if we see more that one shader for the same stage, and add a corresponding comment. (Timothy Arceri) --- src/mesa/main/glspirv.c | 61 ++--- 1 file changed, 58 insertions(+), 3 deletions(-) diff --git a/src/mesa/main/glspirv.c

Re: [Mesa-dev] [PATCH 1/2] glsl/es: precision qualifier doesn't need to match in UBOs

On Thu, 2017-11-30 at 15:46 +0100, Nicolai Hähnle wrote: > On 09.11.2017 12:48, Samuel Iglesias Gonsálvez wrote: > > Signed-off-by: Samuel Iglesias Gonsálvez > > Can you also update the comment? I can't quite match what the > comment > says to what the code does. > > I

[Mesa-dev] [PATCH] nv50/ir: rework the madsp subop handling

Creating correct SubOps for OP_MADSP wasn't easy, because devs needed to know the proper values for each data type. Also the third source doesn't know any explicit signess and the current code tried to work around this fact. To make the creating of the subops much easier, this commit introduces a

[Mesa-dev] [Bug 103699] Latest mesa breaks firefox on kde plasma with compositing on

https://bugs.freedesktop.org/show_bug.cgi?id=103699 --- Comment #24 from Tapani Pälli --- (In reply to Fredrik Höglund from comment #23) > (In reply to Tapani Pälli from comment #22) > > (In reply to Fredrik Höglund from comment #20) > > > Created attachment 135782 [details] >

[Mesa-dev] [Bug 103699] Latest mesa breaks firefox on kde plasma with compositing on

https://bugs.freedesktop.org/show_bug.cgi?id=103699 --- Comment #25 from Mario Kleiner --- Another problem caused by the new Mesa srgb visuals -- and assigning srgb to the special 32 bit composite overlay -- seems to be that the xf86-video-intel ddx will only

Re: [Mesa-dev] [PATCH 20/22] nv50, nvc0: Support BGRX1010102 format for visuals.

On 11/29/2017 04:38 PM, Ilia Mirkin wrote: Why is this required? Can't you just use the BGR10_A2 format directly? If i don't define this PIPE_FORMAT_B10G10R10X2_UNORM as "TD" = displayable, then it doesn't get exposed by the state tracker as a visual/fbconfig with RGBA = 10 10 10 0 under

[Mesa-dev] [Bug 103699] Latest mesa breaks firefox on kde plasma with compositing on

https://bugs.freedesktop.org/show_bug.cgi?id=103699 --- Comment #23 from Fredrik Höglund --- (In reply to Tapani Pälli from comment #22) > (In reply to Fredrik Höglund from comment #20) > > Created attachment 135782 [details] > > modified test case > > > > The window decoration

Re: [Mesa-dev] [PATCH 3/3] spirv: Allow OpPtrAccessChain for block indices

After talking with Kristian a bit on IRC, I think there is a bit more explanation needed. I would be happy to add something like this to the commit message or as a comment upon request. There is an interesting edge case in the variable pointers extension when you do an OpPtrAccessChain on a

[Mesa-dev] [PATCH 2/2] r600/atomic: add cayman version of atomic save/restore from GDS

From: Dave Airlie On Cayman we don't use the append/consume counters (fglrx doesn't) and they don't seem to work well with compute shaders. This just uses GDS instead to do the atomic operations. Signed-off-by: Dave Airlie ---

[Mesa-dev] [PATCH 1/2] r600/atomic: refactor out evergreen atomic setup/save code.

From: Dave Airlie For cayman we want to use different code paths. Signed-off-by: Dave Airlie --- src/gallium/drivers/r600/evergreen_state.c | 80 +++--- 1 file changed, 50 insertions(+), 30 deletions(-) diff --git

[Mesa-dev] r600: cayman atomic gds support

There appears to be some bad interaction with the append/consume counters on cayman (and compute shaders at least). I traced fglrx and it appears it directly uses GDS memory. This adds cayman specific paths to directly use GDS memory for these atomics. Dave.

Re: [Mesa-dev] [PATCH v2 00/25] Initial gl_spirv and spirv_extensions support in Mesa and i965

On 01/12/17 04:28, Eduardo Lima Mitev wrote: Hello, This is the second version of the series providing initial support for ARB_gl_spirv and ARB_spirv_extensions in Mesa and i965. First version of the series can be found at

Re: [Mesa-dev] [PATCH v2 24/25] i965: Call spirv_to_nir() instead of glsl_to_nir() for SPIR-V shaders

On 01/12/17 04:28, Eduardo Lima Mitev wrote: This is the main fork of the shader compilation code-path, where a NIR shader is obtained by calling spirv_to_nir() or glsl_to_nir(), depending on its nature.. v2: Use 'spirv_data' member from gl_linked_shader to know which method to call.

[Mesa-dev] [PATCH 2/3] anv: Handle nir_intrinsic_vulkan_resource_reindex

--- src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 28 +++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c index f8d8164..612b3f7 100644 ---

[Mesa-dev] [PATCH 3/3] spirv: Allow OpPtrAccessChain for block indices

The SPIR-V spec is a bit underspecified when it comes to exactly how you're allowed to use OpPtrAccessChain and what it means in certain edge cases. In particular, what if the base pointer of the OpPtrAccessChain points to the base struct of an SSBO instead of an element in that SSBO. The

[Mesa-dev] [PATCH 1/3] nir: Add a vulkan_resource_reindex intrinsic

This is required for being able to handle OpPtrAccessChain in SPIR-V where the base type of the incoming pointer requires us to add to the block index instead of the byte offset. --- src/compiler/nir/nir_intrinsics.h | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH v2 12/32] radv: Move wsi initialization later in physical_device_init

On Tue 28 Nov 2017, Jason Ekstrand wrote: > We need it to happen after memory type setup so that we can query memory > types in wsi_device_init. > --- > src/amd/vulkan/radv_device.c | 13 +++-- > 1 file changed, 7 insertions(+), 6 deletions(-) Patches 10-12 are Reviewed-by: Chad Versace

Re: [Mesa-dev] [PATCH v2 07/32] radv: Implement VK_EXT_external_memory_dma_buf

On Tue 28 Nov 2017, Jason Ekstrand wrote: > --- > src/amd/vulkan/radv_device.c | 8 ++-- > src/amd/vulkan/radv_extensions.py | 1 + > src/amd/vulkan/radv_formats.c | 8 ++-- > 3 files changed, 13 insertions(+), 4 deletions(-) With the changes in your wip/vulkan-wsi-prime branch,

Re: [Mesa-dev] [PATCH v2 05/32] vulkan/wsi: Add a mock image creation extension

On Tue 28 Nov 2017, Jason Ekstrand wrote: > --- > src/vulkan/wsi/wsi_common.h | 18 ++ > 1 file changed, 18 insertions(+) Patches 1-5 are Reviewed-by: Chad Versace ___ mesa-dev mailing list

Re: [Mesa-dev] [PATCH v2 13/32] vulkan/wsi: Implement prime in a completely generic way

On Tue 28 Nov 2017, Jason Ekstrand wrote: > --- > src/amd/vulkan/radv_wsi.c | 137 +++ > src/intel/vulkan/anv_wsi.c | 14 +- > src/vulkan/wsi/wsi_common.c | 341 > +++- > src/vulkan/wsi/wsi_common.h | 54 +- >

Re: [Mesa-dev] [PATCH] i965/gen10: Change the order of PIPE_CONTROL and load register.

On Thursday, November 30, 2017 4:53:44 PM PST Rafael Antognolli wrote: > I believe the workaround describes that the MI_LOAD_REGISTER_IMM should > come right after the 3DSTATE_SAMPLE_PATTERN. > > Signed-off-by: Rafael Antognolli > Cc: Kenneth Graunke

Re: [Mesa-dev] [PATCH 2/2] Implement WaClearTDRRegBeforeEOTForNonPS.

On Thursday, November 30, 2017 4:42:48 PM PST Rafael Antognolli wrote: > The bspec describes: > >"WA: Clear tdr register before send EOT in all non-PS shader kernels > >mov(8) tdr0:ud 0x0:ud {NoMask}" > > Signed-off-by: Rafael Antognolli > --- >

Re: [Mesa-dev] [PATCH 1/2] i965: emit 3DSTATE_MULTISAMPLE more often.

On Thursday, November 30, 2017 4:42:47 PM PST Rafael Antognolli wrote: > On CNL, we see multiple multisample failures on piglit tests. By > emitting this extra state, though not documented in the bspec, those > failures seem to go away. > > This workaround could be removed if we ever find out a

[Mesa-dev] [PATCH] i965/gen10: Change the order of PIPE_CONTROL and load register.

I believe the workaround describes that the MI_LOAD_REGISTER_IMM should come right after the 3DSTATE_SAMPLE_PATTERN. Signed-off-by: Rafael Antognolli Cc: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen8_multisample_state.c | 6 +++--- 1

Re: [Mesa-dev] [PATCH 2/2] Implement WaClearTDRRegBeforeEOTForNonPS.

It looks like I forgot to prefix the subject with "intel/compiler:". Fixed locally. On Thu, Nov 30, 2017 at 04:42:48PM -0800, Rafael Antognolli wrote: > The bspec describes: > >"WA: Clear tdr register before send EOT in all non-PS shader kernels > >mov(8) tdr0:ud 0x0:ud {NoMask}" > >

[Mesa-dev] [PATCH 2/2] Implement WaClearTDRRegBeforeEOTForNonPS.

The bspec describes: "WA: Clear tdr register before send EOT in all non-PS shader kernels mov(8) tdr0:ud 0x0:ud {NoMask}" Signed-off-by: Rafael Antognolli --- src/intel/compiler/brw_fs_generator.cpp | 7 +++ src/intel/compiler/brw_reg.h| 6

[Mesa-dev] [PATCH 1/2] i965: emit 3DSTATE_MULTISAMPLE more often.

On CNL, we see multiple multisample failures on piglit tests. By emitting this extra state, though not documented in the bspec, those failures seem to go away. This workaround could be removed if we ever find out a better solution, but it should be good enough for now. Signed-off-by: Rafael

[Mesa-dev] [PATCH] st/va: Enable vaExportSurfaceHandle()

It will be present from libva 2.1 (VAAPI 1.1.0 or higher). Signed-off-by: Mark Thompson --- See: Also enabled in mpv:

Re: [Mesa-dev] [PATCH 0/9] Fix shader_draw_parameters CTS tests

On Thursday, November 30, 2017 1:11:28 PM PST Neil Roberts wrote: > Kenneth Graunke writes: > > > Neil, in case you were wondering, I suggested the above organization > > of vertex elements because it would let us only upload 1 in the common > > case. Looking in shader-db,

Re: [Mesa-dev] [PATCH v2 02/25] mesa: Add boilerplate for the GL 4.6 alias of glSpecializeShaderARB

I'd squash this in with the previous patch. Reviewed-by: Ian Romanick On 11/30/2017 09:28 AM, Eduardo Lima Mitev wrote: > From: Neil Roberts > > --- > src/mapi/glapi/gen/GL4x.xml | 11 +++ > 1 file changed, 11 insertions(+) > > diff

Re: [Mesa-dev] [PATCH v2 05/25] mesa: implement SPIR-V loading in glShaderBinary

Two nits below... On 11/30/2017 09:28 AM, Eduardo Lima Mitev wrote: > From: Nicolai Hähnle > > v2: * Add a gl_shader_spirv_data member to gl_shader, which already >encapsulates a gl_spirv_module where the binary will be saved. >(Eduardo Lima) > > * Just use

Re: [Mesa-dev] [PATCH v2 07/25] mesa: refuse to compile SPIR-V shaders or link mixed shaders

On 11/30/2017 09:28 AM, Eduardo Lima Mitev wrote: > From: Nicolai Hähnle > > Note that gl_shader::CompileStatus will also indicate whether a shader > has been successfully specialized. > > v2: Use the 'spirv_data' member of gl_shader to know if it is a SPIR-V >

Re: [Mesa-dev] [PATCH v2 06/25] mesa/shaderapi: add a getter for GL_SPIR_V_BINARY_ARB

This patch is Reviewed-by: Ian Romanick On 11/30/2017 09:28 AM, Eduardo Lima Mitev wrote: > From: Nicolai Hähnle > > v2: Use the 'spirv_data' member of gl_shader instead of a >dedicated flag. (Timothy Arceri) > --- >

Re: [Mesa-dev] [PATCH] swr/scons: Fix intermittent build failure

On 30 November 2017 at 20:29, George Kyriazis wrote: > gen_rasterizer*.cpp now depend on gen_ar_eventhandler.hpp. > Account for new dependency. By 'now' i think you meant 'for a few months' :-P Fixes: 0cc7c46cf43 ("swr/rast: Split rasterizer.cpp to improve compile

[Mesa-dev] [PATCH 2/2] i965: Emit CS stall before MEDIA_VFE_STATE.

From: Kenneth Graunke This fixes hangs on GFXBench 5's Aztec Ruins benchmark. Unfortunately, it regresses OglCSCloth performance by about 10%. There are some ideas for fixing that. The Vulkan driver already emits this stall. Reviewed-by: Matt Turner

[Mesa-dev] [PATCH 1/2] i965: Move PIPE_CONTROL defines and prototypes to brw_pipe_control.h.

From: Kenneth Graunke We need to be able to emit PIPE_CONTROLs from genX_state_upload.c, which can't safely include brw_defines.h because it conflicts with genxml. Move all the PIPE_CONTROL related stuff together into a separate header. Reviewed-by: Matt Turner

Re: [Mesa-dev] [PATCH v4 22/44] i965/fs: Helpers for un/shuffle 16-bit pairs in 32-bit components

On 30/11/17 23:21, Jason Ekstrand wrote: > On Wed, Nov 29, 2017 at 6:50 PM, Jose Maria Casanova Crespo > > wrote: > > This helpers are used to load/store 16-bit types from/to 32-bit > components. > > The functions

[Mesa-dev] [Bug 103999] 4x MSAA with RG32F shows garbage on triangle edges

https://bugs.freedesktop.org/show_bug.cgi?id=103999 --- Comment #3 from mais...@archlinux.us --- RADV that is. Works on other driver stacks I've tested. -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the

[Mesa-dev] [Bug 103999] 4x MSAA with RG32F shows garbage on triangle edges

https://bugs.freedesktop.org/show_bug.cgi?id=103999 --- Comment #2 from mais...@archlinux.us --- No idea, haven't tried this on any other drivers. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the

Re: [Mesa-dev] [PATCH v4 23/44] i965/fs: Enables 16-bit load_ubo with sampler

On Wed, Nov 29, 2017 at 6:50 PM, Jose Maria Casanova Crespo < jmcasan...@igalia.com> wrote: > load_ubo is using 32-bit loads as uniforms surfaces have a 32-bit > surface format defined. So when reading 16-bit components with the > sampler we need to unshuffle two 16-bit components from each

Re: [Mesa-dev] GBM and the Device Memory Allocator Proposals

Hi, I've had a chance to look a bit more closely at the allocator prototype repository now. There's a whole bunch of low-level API design feedback, but for now let's focus on the high-level stuff first. Going by the 4.5 major object types (as also seen on slide 5 of your presentation [0]),

Re: [Mesa-dev] [PATCH v4 22/44] i965/fs: Helpers for un/shuffle 16-bit pairs in 32-bit components

On Wed, Nov 29, 2017 at 6:50 PM, Jose Maria Casanova Crespo < jmcasan...@igalia.com> wrote: > This helpers are used to load/store 16-bit types from/to 32-bit > components. > > The functions shuffle_32bit_load_result_to_16bit_data and > shuffle_16bit_data_for_32bit_write are implemented in a

Re: [Mesa-dev] [PATCH] radv: only reset command buffers when the allocation fails

Reviewed-by: Bas Nieuwenhuizen On Thu, Nov 30, 2017 at 10:23 PM, Samuel Pitoiset wrote: >"vkAllocateCommandBuffers can be used to create multiple command > buffers. If the creation of any of those command buffers fails, the >

Re: [Mesa-dev] [PATCH] radv: do not dump meta shaders with RADV_DEBUG=shaders

Reviewed-by: Bas Nieuwenhuizen On Thu, Nov 30, 2017 at 10:16 PM, Samuel Pitoiset wrote: > It's really annoying and this pollutes the output especially > when a bunch of non-meta shaders are compiled. > > Signed-off-by: Samuel Pitoiset

[Mesa-dev] [PATCH] radv: only reset command buffers when the allocation fails

"vkAllocateCommandBuffers can be used to create multiple command buffers. If the creation of any of those command buffers fails, the implementation must destroy all successfully created command buffer objects from this command, set all entries of the pCommandBuffers array to

Re: [Mesa-dev] [PATCH] radeon/vcn: determine idr by pic type

On 11/30/2017 04:12 PM, boyuan.zh...@amd.com wrote: From: Boyuan Zhang Vaapi encode interface provides idr frame flags, where omx interface doesn't. Therefore, change to use picture type to determine idr frame, which will work for both interfaces. Signed-off-by: Boyuan

[Mesa-dev] [PATCH] radv: do not dump meta shaders with RADV_DEBUG=shaders

It's really annoying and this pollutes the output especially when a bunch of non-meta shaders are compiled. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 5 + src/amd/vulkan/radv_shader.c | 2 +- src/amd/vulkan/radv_shader.h | 10

[Mesa-dev] [PATCH] radeon/vcn: determine idr by pic type

From: Boyuan Zhang Vaapi encode interface provides idr frame flags, where omx interface doesn't. Therefore, change to use picture type to determine idr frame, which will work for both interfaces. Signed-off-by: Boyuan Zhang ---

Re: [Mesa-dev] [PATCH 0/9] Fix shader_draw_parameters CTS tests

Kenneth Graunke writes: > Neil, in case you were wondering, I suggested the above organization > of vertex elements because it would let us only upload 1 in the common > case. Looking in shader-db, there are 3579 shaders that use > gl_InstanceID, 186 shaders that use

Re: [Mesa-dev] [PATCH v4 25/44] anv: Enable VK_KHR_16bit_storage for SSBO and UBO

I'd roll 24 in with 25 personally. Either way, 24 and 25 are Reviewed-by: Jason Ekstrand I'm going to try and get enough reviewed today that we can land this part. On Wed, Nov 29, 2017 at 6:57 PM, Jose Maria Casanova Crespo < jmcasan...@igalia.com> wrote: > From:

Re: [Mesa-dev] [PATCH v4 20/44] i965/fs: Add byte scattered read message and fs support

On Wed, Nov 29, 2017 at 6:50 PM, Jose Maria Casanova Crespo < jmcasan...@igalia.com> wrote: > v2: Fix alignment style (Topi Pohjolainen) > (Jason Ekstrand) > - Enable bit_size parameter to scattered messages to enable different > bitsizes byte/word/dword. > - Remove use of

Re: [Mesa-dev] [PATCH 1/9] compiler: Add new system value SYSTEM_VALUE_BASE_VERTEX_ID

Kenneth Graunke writes: > We have a number of similar names now: > >SYSTEM_VALUE_BASE_VERTEX >SYSTEM_VALUE_BASE_VERTEX_ID >SYSTEM_VALUE_VERTEX_ID >SYSTEM_VALUE_VERTEX_ID_ZERO_BASE > > BASE_VERTEX and BASE_VERTEX_ID are really similar names, and honestly >

Re: [Mesa-dev] [PATCH v4 18/44] i965/fs: Add byte scattered write message and fs support

On Wed, Nov 29, 2017 at 6:08 PM, Jose Maria Casanova Crespo < jmcasan...@igalia.com> wrote: > v2: (Jason Ekstrand) > - Enable bit_size parameter to scattered messages to enable different > bitsizes byte/word/dword. > - Remove use of brw_send_indirect_scattered_message in favor of >

[Mesa-dev] [Bug 103999] 4x MSAA with RG32F shows garbage on triangle edges

https://bugs.freedesktop.org/show_bug.cgi?id=103999 --- Comment #1 from Ernst Sjöstrand --- Are you saying it worked with 17.2.5? -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the

[Mesa-dev] [PATCH] swr/scons: Fix intermittent build failure

gen_rasterizer*.cpp now depend on gen_ar_eventhandler.hpp. Account for new dependency. --- src/gallium/drivers/swr/SConscript | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/swr/SConscript b/src/gallium/drivers/swr/SConscript index e35eff7..9204ecb 100644 ---

Re: [Mesa-dev] [PATCH 0/9] Fix shader_draw_parameters CTS tests

On Friday, November 10, 2017 9:53:28 AM PST Antia Puentes wrote: > Hi, > > the series sets gl_BaseVertex to zero for gl*DrawArrays* in i965. [snip] Hi Antia, Neil, The end result of this series looks reasonable, but it looks like it's going to break a bunch of things at each step. Either that

Re: [Mesa-dev] [PATCH v4 07/44] spirv/nir: Handle 16-bit types

I sprinkled a few mostly trivial comments below. With those fixed, Reviewed-by: Jason Ekstrand On Wed, Nov 29, 2017 at 6:07 PM, Jose Maria Casanova Crespo < jmcasan...@igalia.com> wrote: > From: Eduardo Lima Mitev > > v2: Added more missing

Re: [Mesa-dev] [PATCH v2] swr: Correct texture allocation and limit max size to 2GB

Looks good. Reviewed-By: George Kyriazis > On Nov 30, 2017, at 11:51 AM, Bruce Cherniak > wrote: This patch fixes piglit tex3d-maxsize by correcting 4 things: The total_size

Re: [Mesa-dev] [PATCH 1/2] radv: do not store gfx9_epitch in radv_color_buffer_info

Reviewed-by: Bas Nieuwenhuizen On Thu, Nov 30, 2017 at 2:32 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_cmd_buffer.c | 7 --- > src/amd/vulkan/radv_device.c | 3

Re: [Mesa-dev] [PATCH 00/12] anv: Add support for the variablePointers feature

On Thu, Nov 30, 2017 at 11:52 AM, Kristian Høgsberg wrote: > On Thu, Oct 19, 2017 at 11:04 AM, Jason Ekstrand > wrote: > > Not to be confused with variablePointersStorageBuffer which is the > > subset of VK_KHR_variable_pointers required to enable the

Re: [Mesa-dev] [PATCH] radv: do not set DISABLE_LSB_CEIL on GFX9

Reviewed-by: Bas Nieuwenhuizen On Thu, Nov 30, 2017 at 8:58 PM, Samuel Pitoiset wrote: > The state no longer exists on GFX9. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_device.c | 2 +- > 1 file

Re: [Mesa-dev] GBM and the Device Memory Allocator Proposals

On Thu, 2017-11-30 at 13:20 -0500, Rob Clark wrote: > On Thu, Nov 30, 2017 at 12:59 AM, James Jones wrote: > > On 11/29/2017 04:09 PM, Miguel Angel Vico wrote: > > > > > > On Wed, 29 Nov 2017 16:28:15 -0500 > > > Rob Clark wrote: > > > > > > > > Do we

Re: [Mesa-dev] [PATCH 13/29] anv/cmd_buffer: Rework aux tracking

On Mon, Nov 27, 2017 at 07:06:03PM -0800, Jason Ekstrand wrote: > This makes us start tracking two bits per level for aux to describe both > whether or not something is fast-cleared and whether or not it is > compressed as opposed to a single "needs resolve" bit. The previous > scheme only worked

[Mesa-dev] [PATCH] radv: do not set DISABLE_LSB_CEIL on GFX9

The state no longer exists on GFX9. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 62591c7e3d..7b1b20e335 100644 ---

Re: [Mesa-dev] [PATCH 00/12] anv: Add support for the variablePointers feature

On Thu, Oct 19, 2017 at 11:04 AM, Jason Ekstrand wrote: > Not to be confused with variablePointersStorageBuffer which is the > subset of VK_KHR_variable_pointers required to enable the extension. > This gives us "full" support for variable pointers. > > The approach chosen

Re: [Mesa-dev] GBM and the Device Memory Allocator Proposals

On Thu, 2017-11-30 at 14:20 -0500, Alex Deucher wrote: > On Thu, Nov 30, 2017 at 2:10 PM, Nicolai Hähnle wrote: > > On 30.11.2017 19:52, Rob Clark wrote: > > > > > > On Thu, Nov 30, 2017 at 4:21 AM, Nicolai Hähnle > > > wrote: > > > > > > > > On

Re: [Mesa-dev] [PATCH 1/2] meson: install dri internal headers.

Quoting Emil Velikov (2017-11-30 11:12:12) > On 30 November 2017 at 18:58, Dylan Baker wrote: > > Quoting Emil Velikov (2017-11-30 10:49:19) > >> s/headers/header/ in the title. With that the series is > >> Reviewed-by: Emil Velikov > >> > >>

Re: [Mesa-dev] [PATCH 3/9] intel/compiler: Add a uses_basevertexid flag

On Friday, November 10, 2017 9:53:31 AM PST Antia Puentes wrote: > From: Neil Roberts > > --- > src/intel/compiler/brw_compiler.h | 1 + > src/intel/compiler/brw_vec4.cpp | 4 > 2 files changed, 5 insertions(+) > > diff --git a/src/intel/compiler/brw_compiler.h >

Re: [Mesa-dev] [PATCH 2/9] nir: Add SYSTEM_VALUE_BASE_VERTEX_ID instrinsics

On Friday, November 10, 2017 9:53:30 AM PST Antia Puentes wrote: > Reviewed-by: Neil Roberts > --- > src/compiler/nir/nir.c | 4 > src/compiler/nir/nir_gather_info.c | 1 + > src/compiler/nir/nir_intrinsics.h | 1 + > 3 files changed, 6 insertions(+) > >

Re: [Mesa-dev] [PATCH v4 06/44] nir: Handle fp16 rounding modes at nir_type_conversion_op

Reviewed-by: Jason Ekstrand On Wed, Nov 29, 2017 at 6:07 PM, Jose Maria Casanova Crespo < jmcasan...@igalia.com> wrote: > nir_type_conversion enables new operations to handle rounding modes to > convert to fp16 values. Two new opcodes are enabled nir_op_f2f16_rtne > and

Re: [Mesa-dev] [PATCH 1/9] compiler: Add new system value SYSTEM_VALUE_BASE_VERTEX_ID

On Friday, November 10, 2017 9:53:29 AM PST Antia Puentes wrote: > This VS system value will contain the value passed as > for indexed draw calls or the value passed as for non-indexed > draw calls. It will be used to calculate the gl_VertexID as > SYSTEM_VALUE_VERTEX_ID_ZERO_BASE plus

Re: [Mesa-dev] [PATCH 4/5] xlib: remove dummy GLX_MESA_set_3dfx_mode implementation

On 30 November 2017 at 19:09, Ian Romanick wrote: > Is xmesa.h something that apps could see? Removing stuff could, > hypothetically, cause compilation problems... but also, app developers, > fix your old crap. :) > Some digging showed: - the header was never installed -

Re: [Mesa-dev] GBM and the Device Memory Allocator Proposals

On Thu, Nov 30, 2017 at 2:10 PM, Nicolai Hähnle wrote: > On 30.11.2017 19:52, Rob Clark wrote: >> >> On Thu, Nov 30, 2017 at 4:21 AM, Nicolai Hähnle >> wrote: >>> >>> On 30.11.2017 01:09, Miguel Angel Vico wrote: >> >> >> It seems to me that

Re: [Mesa-dev] [PATCH 1/2] meson: install dri internal headers.

On 30 November 2017 at 18:58, Dylan Baker wrote: > Quoting Emil Velikov (2017-11-30 10:49:19) >> s/headers/header/ in the title. With that the series is >> Reviewed-by: Emil Velikov >> >> -Emil > > Thanks Emil. > > Should we be installing the

[Mesa-dev] [Bug 103999] 4x MSAA with RG32F shows garbage on triangle edges

https://bugs.freedesktop.org/show_bug.cgi?id=103999 Bug ID: 103999 Summary: 4x MSAA with RG32F shows garbage on triangle edges Product: Mesa Version: 17.2 Hardware: Other OS: All Status: NEW Severity:

Re: [Mesa-dev] [PATCH 1/5] xlib: remove empty GLX_NV_vertex_array_range stubs

I sent a couple small comments on patches 3 and 4. Barring any actual problems there, the series is Reviewed-by: Ian Romanick On 11/29/2017 11:23 AM, Emil Velikov wrote: > From: Emil Velikov > > The extension was never implemented and

Re: [Mesa-dev] GBM and the Device Memory Allocator Proposals

On 30.11.2017 19:52, Rob Clark wrote: On Thu, Nov 30, 2017 at 4:21 AM, Nicolai Hähnle wrote: On 30.11.2017 01:09, Miguel Angel Vico wrote: It seems to me that $new_thing should grow as a separate thing whether it ends up replacing GBM or GBM internals are somewhat

Re: [Mesa-dev] [PATCH 3/5] docs/specs: annotate MESA_agp_offset as obsolete

I think at least moving deprecated specs to old is a good idea. Once Khronos has the "Obsolete" notation, we could just delete them. On 11/29/2017 11:23 AM, Emil Velikov wrote: > From: Emil Velikov > > No Mesa driver has implemented the extension in ages. Seemingly

Re: [Mesa-dev] [PATCH 4/5] xlib: remove dummy GLX_MESA_set_3dfx_mode implementation

Is xmesa.h something that apps could see? Removing stuff could, hypothetically, cause compilation problems... but also, app developers, fix your old crap. :) On 11/29/2017 11:23 AM, Emil Velikov wrote: > From: Emil Velikov > > The implementation is a simple 'return

Re: [Mesa-dev] [PATCH 1/2] meson: install dri internal headers.

Quoting Emil Velikov (2017-11-30 10:49:19) > s/headers/header/ in the title. With that the series is > Reviewed-by: Emil Velikov > > -Emil Thanks Emil. Should we be installing the dri.pc when you build gallium drivers as dri drivers, but no "pure" dri drivers?

Re: [Mesa-dev] GBM and the Device Memory Allocator Proposals

On Thu, Nov 30, 2017 at 4:21 AM, Nicolai Hähnle wrote: > On 30.11.2017 01:09, Miguel Angel Vico wrote: It seems to me that $new_thing should grow as a separate thing whether it ends up replacing GBM or GBM internals are somewhat rewritten on top of it. If

Re: [Mesa-dev] [PATCH 1/2] meson: install dri internal headers.

s/headers/header/ in the title. With that the series is Reviewed-by: Emil Velikov -Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] GBM and the Device Memory Allocator Proposals

On Thu, Nov 30, 2017 at 1:28 AM, James Jones wrote: > On 11/29/2017 01:10 PM, Rob Clark wrote: >> >> On Wed, Nov 29, 2017 at 12:33 PM, Jason Ekstrand >> wrote: >>> >>> On Sat, Nov 25, 2017 at 1:20 PM, Rob Clark wrote:

[Mesa-dev] [PATCH 2/2] meson: install khrplatform header for EGL as well as GLES

Signed-off-by: Dylan Baker --- include/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/meson.build b/include/meson.build index bae6742c4d6..424d89acc83 100644 --- a/include/meson.build +++ b/include/meson.build @@ -40,7 +40,7 @@

[Mesa-dev] [PATCH 1/2] meson: install dri internal headers.

Reported-by: Marc Dietrich Signed-off-by: Dylan Baker --- include/meson.build | 4 1 file changed, 4 insertions(+) diff --git a/include/meson.build b/include/meson.build index 35e7791507c..bae6742c4d6 100644 --- a/include/meson.build +++

Re: [Mesa-dev] [PATCH] anv: Check if memfd_create is already defined.

On 30 November 2017 at 15:18, Emil Velikov wrote: > Vinson please add a small note why now aka "Newly introduced with glibc 2.27" > With that the patch is: > Reviewed-by: Emil Velikov > Completely forgot Cc:

Re: [Mesa-dev] [PATCH 00/14] meson: most of gallium

Quoting Eric Engestrom (2017-11-29 07:44:08) > On Tuesday, 2017-11-28 15:30:21 -0800, Dylan Baker wrote: > > This series is the gallium media state trackers, the "nine" Direct3D state > > tracker, and an architectural change in the way gallium drivers are linked > > into > > the final targets. >

Re: [Mesa-dev] [PATCH 00/14] meson: most of gallium

Quoting Marc Dietrich (2017-11-30 01:12:42) > Hi Dylan, > > Am Mittwoch, 29. November 2017, 19:14:37 CET schrieb Dylan Baker: > > Quoting Marc Dietrich (2017-11-29 04:31:07) > > > > > Hi Dylan, > > > > > > Am Mittwoch, 29. November 2017, 00:30:21 CET schrieb Dylan Baker: > > > > This series is

Re: [Mesa-dev] GBM and the Device Memory Allocator Proposals

On Thu, Nov 30, 2017 at 12:59 AM, James Jones wrote: > On 11/29/2017 04:09 PM, Miguel Angel Vico wrote: >> >> On Wed, 29 Nov 2017 16:28:15 -0500 >> Rob Clark wrote: >>> >>> Do we need to define both in-place and copy transitions? Ie. what if >>> GPU is

[Mesa-dev] [PATCH v2] swr: Correct texture allocation and limit max size to 2GB

This patch fixes piglit tex3d-maxsize by correcting 4 things: The total_size calculation was using 32-bit math, therefore a >4GB allocation request overflowed and was not returning false (unsupported). Changed AlignedMalloc arguments from "unsigned int" to size_t, to handle >4GB allocations.

[Mesa-dev] [PATCH] meta: Fix ClearTexture with GL_DEPTH_COMPONENT.

We only handled unpacking for GL_DEPTH_STENCIL formats. Cemu was hitting _mesa_problem() for an unsupported format in _mesa_unpack_float_32_uint_24_8_depth_stencil_row(), because the format was depth-only, rather than depth-stencil. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94739

[Mesa-dev] [PATCH v2 23/25] mesa/glspirv: Add a _mesa_spirv_to_nir() function

This is basically a wrapper around spirv_to_nir() that includes arguments setup and post-conversion validation. v2: Rebase update (SpirVCapabilities not a pointer anymore) --- src/mesa/main/glspirv.c | 60 + src/mesa/main/glspirv.h | 7 ++ 2

[Mesa-dev] [PATCH v2 25/25] i965: Don't call process_glsl_ir() for SPIR-V shaders

v2: Use 'spirv_data' from gl_linked_shader instead, to check if shader is SPIR-V. (Timothy Arceri) --- src/mesa/drivers/dri/i965/brw_link.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp

[Mesa-dev] [PATCH v2 24/25] i965: Call spirv_to_nir() instead of glsl_to_nir() for SPIR-V shaders

This is the main fork of the shader compilation code-path, where a NIR shader is obtained by calling spirv_to_nir() or glsl_to_nir(), depending on its nature.. v2: Use 'spirv_data' member from gl_linked_shader to know which method to call. (Timothy Arceri) ---

[Mesa-dev] [PATCH v2 22/25] mesa/glspirv: Create gl_linked_shader objects for a SPIR-V program

--- src/mesa/main/glspirv.c | 51 ++--- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/src/mesa/main/glspirv.c b/src/mesa/main/glspirv.c index e533853f7fa..e5dc8b26ea9 100644 --- a/src/mesa/main/glspirv.c +++ b/src/mesa/main/glspirv.c @@

[Mesa-dev] [PATCH v2 19/25] mesa/glspirv: Add a _mesa_spirv_link_shaders() placeholder

This will be the equivalent to link_shaders() from src/compiler/glsl/linker.cpp, but for SPIR-V programs. --- src/mesa/main/glspirv.c | 10 ++ src/mesa/main/glspirv.h | 4 2 files changed, 14 insertions(+) diff --git a/src/mesa/main/glspirv.c b/src/mesa/main/glspirv.c index

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