On Thu, Apr 05, 2018 at 04:11:33PM -0700, Nanley Chery wrote:
> On Wed, Apr 04, 2018 at 07:40:43AM +0300, Pohjolainen, Topi wrote:
> > On Tue, Apr 03, 2018 at 09:38:52PM -0700, Jason Ekstrand wrote:
> > > On Tue, Apr 3, 2018 at 8:23 PM, Pohjolainen, Topi <
> > > topi.pohjolai...@gmail.com> wrote:
https://bugs.freedesktop.org/show_bug.cgi?id=105918
Bug ID: 105918
Summary: Mesa 18.0.0-2 video color issues and distorted video
with system hang on restart (Apple Mac Pro 6,1 with
AMD D300 GPUs)
Product: Mesa
On Thu, Apr 05, 2018 at 10:51:21AM -0700, Jason Ekstrand wrote:
> ping?
>
I haven't yet gotten around to seeing how the users of the modifier API
would use the newly-exposed CCS surface, but all the changes within anv
look good to me.
This patch is
Acked-by: Nanley Chery
https://bugs.freedesktop.org/show_bug.cgi?id=105904
Timothy Arceri changed:
What|Removed |Added
Status|NEW |NEEDINFO
---
On Wed, Apr 04, 2018 at 07:40:43AM +0300, Pohjolainen, Topi wrote:
> On Tue, Apr 03, 2018 at 09:38:52PM -0700, Jason Ekstrand wrote:
> > On Tue, Apr 3, 2018 at 8:23 PM, Pohjolainen, Topi <
> > topi.pohjolai...@gmail.com> wrote:
> >
> > > On Tue, Apr 03, 2018 at 02:55:31PM -0700, Jason Ekstrand
So I spoke with Daniel Stone today about the infrastructure. He estimates
it will be ready to deploy the website in 2-3 weeks, at the most. So I'd
say the infrastructure will be there when we are ready.
In the new system, our website will be running in its own container managed
by freedesktop's
I've run v2 series yesterday, before the 'Mega cleanup' landed through
glmark2, UH, UV, Blender, FreeCAD, Krita 4.0.0 under KDE Plasma5
on my Polaris 20 / RX580.
With UH and UV I've saw little corruption (flickering) of the 'fps
counter' in the upper right corner and during 'Benchmark' the
https://bugs.freedesktop.org/show_bug.cgi?id=105567
--- Comment #9 from Dylan Baker ---
Your command looks fine, I was just wondering if you had set dri-drivers-path
to an absolute or relative path, in the default case it will be relative, which
may explain why it's
This only enables the null and xlib target, so no windows support yet.
Signed-off-by: Dylan Baker
---
src/gallium/meson.build | 4 +++-
src/gallium/targets/graw-null/meson.build | 34 +++-
src/gallium/targets/graw-xlib/meson.build
Signed-off-by: Dylan Baker
---
src/mesa/state_tracker/tests/meson.build | 40 +-
src/meson.build | 3 ++-
2 files changed, 43 insertions(+)
create mode 100644 src/mesa/state_tracker/tests/meson.build
diff --git
Signed-off-by: Dylan Baker
---
src/compiler/glsl/tests/meson.build | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/compiler/glsl/tests/meson.build
b/src/compiler/glsl/tests/meson.build
index 040b257..fc7b863 100644
--- a/src/compiler/glsl/tests/meson.build
Signed-off-by: Dylan Baker
---
src/compiler/glsl/glcpp/meson.build | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/src/compiler/glsl/glcpp/meson.build
b/src/compiler/glsl/glcpp/meson.build
index 03b43b9..e6a3dc8 100644
---
Signed-off-by: Dylan Baker
Reviewed-by: Eric Anholt
---
meson.build | 2 +--
src/gallium/meson.build | 6 --
src/gallium/tests/meson.build | 21 -
v2: - gate unit tests on swrast being enabled (Eric A)
Signed-off-by: Dylan Baker
Reviewed-by: Eric Anholt
---
src/gallium/tests/meson.build | 3 +++-
src/gallium/tests/unit/meson.build | 31 +++-
2 files changed, 34
They're already done.
Signed-off-by: Dylan Baker
---
src/mesa/meson.build | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/mesa/meson.build b/src/mesa/meson.build
index d2d058b..8e1a49e 100644
--- a/src/mesa/meson.build
+++ b/src/mesa/meson.build
@@ -18,8 +18,6
This reimplements the test in python with a shell script wrapper that
allows autotools to continue to run the test without realizing that
anything has changed.
Using python has two advantages, first it's portable so this test can be
run on windows as well as Linux since it just requires python,
This patch converts optimization-test.sh to python, in this process it
removes external shell dependencies including diff. It replaces the
python script that generates shell scripts with a python library that
generates test cases and runs them using subprocess.
Signed-off-by: Dylan Baker
This ports glcpp-test.sh and glcpp-test-cr-lf.sh to a python script that
accepts arguments for each line ending type. This should allow for
better reporting to users.
Signed-off-by: Dylan Baker
---
src/compiler/glsl/glcpp/tests/glcpp-test-cr-lf.sh | 148 +--
Signed-off-by: Dylan Baker
---
src/compiler/glsl/tests/compare_ir.py | 58 +
1 file changed, 58 deletions(-)
delete mode 100644 src/compiler/glsl/tests/compare_ir.py
diff --git a/src/compiler/glsl/tests/compare_ir.py
Signed-off-by: Dylan Baker
---
src/compiler/glsl/tests/meson.build | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/compiler/glsl/tests/meson.build
b/src/compiler/glsl/tests/meson.build
index 146647a..040b257 100644
---
This series adds the rest of the unit tests in the mesa tree, including
the gallium test binaries. The relevant tests are wired into the `ninja
test` command, and all tests pass.
A big part of this series is converting tests from shell based to a pure
python base. These are mostly straight
This also removes some useless code leftover from old changes.
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/nvc0/nvc0_query.c| 3 +-
src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c | 42 +++-
On Thu, Apr 5, 2018 at 2:24 PM, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat
> ---
> include/pci_ids/i965_pci_ids.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/pci_ids/i965_pci_ids.h
If the fence has not been emitted, hq->fence->sequence would be zero. This
would result in the semaphore never being triggered, blocking all later
commands in the pushbuf.
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c | 4
1 file
If a fence is created in between nvc0_hw_end_query and
nvc0_hw_query_fifo_wait, the sequence number in nvc0->screen->fence.bo can
be larger than hq->fence->sequence before the semaphore is created,
resulting in the semaphore never being triggered.
Signed-off-by: Rhys Perry
This series fixes a couple of bugs in nvc0_hw_query_fifo_wait().
The first one is that a query's fence is not guaranteedto be emitted.
The second one is that nvc0_hw_query_fifo_wait() works incorrectly
when a fence has been emitted in between nvc0_hw_end_query() and
nvc0_hw_query_fifo_wait().
Signed-off-by: Anuj Phogat
---
include/pci_ids/i965_pci_ids.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index 8716d758f0..c740a50bca 100644
--- a/include/pci_ids/i965_pci_ids.h
On Thu, 2018-04-05 at 16:56 -0400, Marek Olšák wrote:
> Even though I've already fixed the crash in master, I'd like to have this
> patch in master too.
I think that's a different crash.
I can still reproduce on c7dd59b06d93e6820189e2d1e087c0811707ee07:
Thread 1 "test-short" received signal
On Thu, Apr 5, 2018 at 1:31 PM, Caio Marcelo de Oliveira Filho <
caio.olive...@intel.com> wrote:
> > @@ -268,8 +288,30 @@ split_var_copies_impl(nir_function_impl *impl)
> > state.dead_ctx = ralloc_context(NULL);
> > state.progress = false;
> >
> > + nir_builder b;
> > +
On Thu, Apr 5, 2018 at 4:47 PM, Marek Olšák wrote:
> On Thu, Apr 5, 2018 at 3:09 AM, Michel Dänzer wrote:
>
>> On 2018-04-04 07:35 PM, Marek Olšák wrote:
>> > On Wed, Apr 4, 2018 at 9:01 AM, Michel Dänzer
>> wrote:
>> >> On 2018-04-04
https://bugs.freedesktop.org/show_bug.cgi?id=105567
--- Comment #8 from charlie ---
1) "build.environment" (file)
export LIBDIRSUFFIX='64'
export XBUILD="/usr"
EOF
-Ddri-drivers-path=${XBUILD}/lib${LIBDIRSUFFIX}/xorg/modules/dri
2) I don't believe there
Even though I've already fixed the crash in master, I'd like to have this
patch in master too.
Reviewed-by: Marek Olšák
Marek
On Thu, Apr 5, 2018 at 4:49 PM, Jan Vesely wrote:
> si_get_total_colormask accesses NULL pointer on compute shaders
>
On Thu, Apr 5, 2018 at 4:22 AM, Samuel Pitoiset
wrote:
> Patches 16-17 are:
>
> Reviewed-by: Samuel Pitoiset
>
> Those two are quite interesting. I will probably update my kernel and
> experiment something.
Patch 16 breaks things and needs
On Thu, Apr 5, 2018 at 12:55 PM, Caio Marcelo de Oliveira Filho <
caio.olive...@intel.com> wrote:
> Hello,
>
> > +static nir_deref_instr *
> > +build_deref_to_next_wildcard(nir_builder *b,
> > + nir_deref_instr *parent,
> > + nir_deref_instr
si_get_total_colormask accesses NULL pointer on compute shaders
Fixes crashes on clover
Fixes: 0669dca9c00261849cee14d69fdea0a5e323c7f7 ("radeonsi: skip DCC render
feedback checking if color writes are disabled")
CC: Marek Olšák
Signed-off-by: Jan Vesely
On Thu, Apr 5, 2018 at 3:09 AM, Michel Dänzer wrote:
> On 2018-04-04 07:35 PM, Marek Olšák wrote:
> > On Wed, Apr 4, 2018 at 9:01 AM, Michel Dänzer
> wrote:
> >> On 2018-04-04 02:57 PM, Marek Olšák wrote:
> >>> On Wed, Apr 4, 2018, 6:18 AM Michel Dänzer
> @@ -268,8 +288,30 @@ split_var_copies_impl(nir_function_impl *impl)
> state.dead_ctx = ralloc_context(NULL);
> state.progress = false;
>
> + nir_builder b;
> + nir_builder_init(, impl);
> +
> nir_foreach_block(block, impl) {
>split_var_copies_block(block, );
> +
> +
Quoting Scott D Phillips (2018-02-08 17:11:25)
> diff --git a/src/intel/tools/intel_sanitize_gpu.in
> b/src/intel/tools/intel_sanitize_gpu.in
> new file mode 100755
> index 000..3dac954c408
> --- /dev/null
> +++ b/src/intel/tools/intel_sanitize_gpu.in
> @@ -0,0 +1,4 @@
> +#!/bin/bash
> +#
Quoting Scott D Phillips (2018-04-03 21:05:45)
> Instead of gtt mapping, call out to other map functions (map_map
> or map_tiled_memcpy) for the depth surface. Removes a place where
> gtt mapping is used.
>
> v2: add level, slice to debug print (Nanley)
> ---
> @@ -3549,16 +3555,21 @@
Quoting Scott D Phillips (2018-04-03 21:05:44)
> Removes a place where gtt mapping is used.
>
> Reviewed-by: Nanley Chery
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git
Quoting Scott D Phillips (2018-04-03 21:05:43)
> Rename the (un)map_gtt functions to (un)map_map (map by
> returning a map) and add new functions (un)map_tiled_memcpy that
> return a shadow buffer populated with the intel_tiled_memcpy
> functions.
>
> Tiling/detiling with the cpu will be the only
Build mesa 7384 completed
Commit c7dd59b06d by Marek Olšák on 4/5/2018 7:53 PM:
radeonsi: fix a crash if ps_shader.cso is NULL in si_get_total_colormask
Configure your notification preferences
___
mesa-dev
Quoting Chris Wilson (2018-04-05 20:54:54)
> Quoting Scott D Phillips (2018-04-03 21:05:42)
> > The reference for MOVNTDQA says:
> >
> > For WC memory type, the nontemporal hint may be implemented by
> > loading a temporary internal buffer with the equivalent of an
> > aligned cache
Hello,
> +static nir_deref_instr *
> +build_deref_to_next_wildcard(nir_builder *b,
> + nir_deref_instr *parent,
> + nir_deref_instr ***deref_arr)
> +{
> + for (; **deref_arr; (*deref_arr)++) {
> + if ((**deref_arr)->deref_type ==
Quoting Scott D Phillips (2018-04-03 21:05:42)
> The reference for MOVNTDQA says:
>
> For WC memory type, the nontemporal hint may be implemented by
> loading a temporary internal buffer with the equivalent of an
> aligned cache line without filling this data to the cache.
> [...]
Build mesa 7383 failed
Commit be4250aa88 by Marek Olšák on 4/2/2018 2:49 AM:
radeonsi: remove more R600 references\n\nAcked-by: Timothy Arceri
Configure your notification preferences
On 21 February 2018 at 19:17, Jason Ekstrand wrote:
> v2 (Jason Ekstrand):
> - Return the correct enum values from anv_layout_to_fast_clear_type
>
> v3 (Jason Ekstrand):
> - Always return ANV_FAST_CLEAR_NONE and leave doing the right thing for
>the patch which adds a
On 04/05/2018 05:42 PM, Bas Nieuwenhuizen wrote:
On Thu, Apr 5, 2018 at 11:42 AM, Samuel Pitoiset
wrote:
... to radv_flush_vertex_buffers().
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 5 +++--
1 file
On 04/05/2018 01:18 PM, Bas Nieuwenhuizen wrote:
On Thu, Apr 5, 2018 at 10:32 AM, Samuel Pitoiset
wrote:
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_image.c | 5 +
1 file changed, 5 insertions(+)
Quoting Scott D Phillips (2018-04-03 21:05:41)
> Similar to the transformation applied to linear_to_ytiled, also align
> each readback from the ytiled source to a cacheline (i.e. transfer a
> whole cacheline from the source before moving on to the next column).
> This will allow us to utilize
If users are running mesa under old version of qemu or have turned off
GL at runtime, virtio gpu driver actually doesn't work. Adds a detection
here so mesa can fall back to software rendering.
v2:
- move detection from loader to virgl (Ilia, Emil)
Signed-off-by: Lepton Wu
Emil Velikov writes:
> On 4 April 2018 at 22:50, Mark Janes wrote:
>> Leo Liu writes:
>>
>>> On 04/04/2018 12:40 PM, Mark Janes wrote:
Leo Liu writes:
> On the CI family, firmware requires the
From: "Xiong, James"
When creating a image from a texture, the image's dri_format is
set to the first plane's format, and used to look up for the
fourcc. e.g. for FOURCC_NV12 texture, the dri_format is set to
__DRI_IMAGE_FORMAT_R8, we end up with a wrong entry in function
https://bugs.freedesktop.org/show_bug.cgi?id=105567
--- Comment #7 from Dylan Baker ---
1) What is the argument you're providing to -Ddri-drivers-path?
2) It's only supposed to install vdpau symlinks for drivers you've built. When
I run `meson build
On 5 April 2018 at 19:10, Laura Ekstrand wrote:
> Emil,
>
> Specifically, what infrastructure do you need? Gallium is already carrying
> Sphinx around as a dependency.
>
The gallium docs are hosted on readthedocs.org. And I doubt we want to
move the main mesa3d.org website
Emil,
Specifically, what infrastructure do you need? Gallium is already carrying
Sphinx around as a dependency.
Laura
On Thu, Apr 5, 2018 at 11:07 AM, Emil Velikov
wrote:
> Hi everyone,
>
> On 5 April 2018 at 01:58, Laura Ekstrand wrote:
> > I
On Thu, 5 Apr 2018 20:57:46 +0300
Tapani Pälli wrote:
> On 05.04.2018 18:43, James Xiong wrote:
> > On Thu, 5 Apr 2018 14:30:02 +0300
> > Tapani Pälli wrote:
> >
> >> On 04/05/2018 02:51 AM, James Xiong wrote:
> >>> From: "Xiong, James"
Hi everyone,
On 5 April 2018 at 01:58, Laura Ekstrand wrote:
> I forgot to note that you have to choose space->ignore in the diff options
> on cgit in order to see the easy-to-read git diff.
>
I really should have made this more obvious. The key blocker isn't
about
ping .. CC my favourite sRGB reviewer
On 19.03.2018 13:41, Tapani Pälli wrote:
Exposing the visual makes following dEQP tests pass on Android:
dEQP-EGL.functional.wide_color.window__colorspace_srgb
dEQP-EGL.functional.wide_color.pbuffer__colorspace_srgb
Visual is exposed only
On 05.04.2018 18:43, James Xiong wrote:
On Thu, 5 Apr 2018 14:30:02 +0300
Tapani Pälli wrote:
On 04/05/2018 02:51 AM, James Xiong wrote:
From: "Xiong, James"
The planar_format in __DRIimage contains the original fourcc
used to create the
ping?
On Wed, Feb 21, 2018 at 11:17 AM, Jason Ekstrand
wrote:
> v2 (Jason Ekstrand):
> - Return the correct enum values from anv_layout_to_fast_clear_type
>
> v3 (Jason Ekstrand):
> - Always return ANV_FAST_CLEAR_NONE and leave doing the right thing for
>the patch
---
src/intel/blorp/blorp_blit.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 0757db0..0f9ecb3 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -1395,6 +1395,9 @@
Quoting Emil Velikov (2018-04-05 07:58:22)
> On 4 April 2018 at 18:45, Dylan Baker wrote:
> > Which should be relative instead of absolute.
> >
> > Fixes: f7f1b30f81e842db6057591470ce3cb6d4fb2795
> >("meson: extend install_megadrivers script to handle symmlinking")
>
On 4 April 2018 at 22:50, Mark Janes wrote:
> Leo Liu writes:
>
>> On 04/04/2018 12:40 PM, Mark Janes wrote:
>>> Leo Liu writes:
>>>
On the CI family, firmware requires the destory command have to be the
last command in the IB,
https://bugs.freedesktop.org/show_bug.cgi?id=105846
--- Comment #8 from l...@protonmail.ch ---
So I've tested it for a few hours now, and it does not seem to be happening
anymore.
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the
Plamena Manolova writes:
> This extension provides new GLSL built-in functions
> beginInvocationInterlockARB() and endInvocationInterlockARB()
> that delimit a critical section of fragment shader code. For
> pairs of shader invocations with "overlapping" coverage in
On Thu, Apr 5, 2018 at 10:06 AM, Caio Marcelo de Oliveira Filho <
caio.olive...@intel.com> wrote:
> Hello,
>
> > + if (count <= max_short_path_len) {
> > + /* If we're under max_short_path_len, just use the short path. */
> > + path->path = head;
> > + goto done;
> > + }
> > +
Hello,
> + if (count <= max_short_path_len) {
> + /* If we're under max_short_path_len, just use the short path. */
> + path->path = head;
> + goto done;
> + }
> +
> + path->path = ralloc_array(mem_ctx, nir_deref_instr *, count + 1);
> + head = tail = path->path + count;
>
Plamena Manolova writes:
> Adds suppport for ARB_fragment_shader_interlock. We achieve
> the interlock and fragment ordering by issuing a memory fence
> via sendc.
>
> Signed-off-by: Plamena Manolova
> ---
> docs/features.txt
On Thu, 5 Apr 2018 08:56:54 -0700
Jason Ekstrand wrote:
> On Thu, Apr 5, 2018 at 8:45 AM, James Xiong
> wrote:
>
> > On Thu, 5 Apr 2018 08:24:27 -0700
> > Jason Ekstrand wrote:
> >
> > > Does this fix a bug? If so, what?
https://bugs.freedesktop.org/show_bug.cgi?id=105906
Lionel Landwerlin changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop.
https://bugs.freedesktop.org/show_bug.cgi?id=105906
Lionel Landwerlin changed:
What|Removed |Added
Component|Drivers/DRI/i965
On Thu, Apr 5, 2018 at 8:45 AM, James Xiong wrote:
> On Thu, 5 Apr 2018 08:24:27 -0700
> Jason Ekstrand wrote:
>
> > Does this fix a bug? If so, what?
> Jason, yes. I am sorry for the confusion, please see my earlier reply
> to Tapani.
>
If it
On Thu, 5 Apr 2018 08:24:27 -0700
Jason Ekstrand wrote:
> Does this fix a bug? If so, what?
Jason, yes. I am sorry for the confusion, please see my earlier reply
to Tapani.
>
> On April 4, 2018 16:57:21 James Xiong wrote:
>
> > From: "Xiong,
On Thu, 5 Apr 2018 14:30:02 +0300
Tapani Pälli wrote:
> On 04/05/2018 02:51 AM, James Xiong wrote:
> > From: "Xiong, James"
> >
> > The planar_format in __DRIimage contains the original fourcc
> > used to create the image, if it's set, return the
On Thu, 5 Apr 2018 15:05:26 +0300
Tapani Pälli wrote:
> Hi;
>
> On 04/05/2018 02:51 AM, James Xiong wrote:
> > From: "Xiong, James"
> >
> > The importer creates an image out of the imported FOURCC_NV12
> > texture, the image's dri_format is set
On Thu, Apr 5, 2018 at 11:42 AM, Samuel Pitoiset
wrote:
> ... to radv_flush_vertex_buffers().
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff
Does this fix a bug? If so, what?
On April 4, 2018 16:57:21 James Xiong wrote:
From: "Xiong, James"
When creating a image from a texture, initialize the image's planar_format
with the texture's.
Signed-off-by: Xiong, James
2018-04-05 16:35 GMT+02:00 Rob Clark :
> I'd vote for PIPE_CAP until there is any place inside nir passes were
> we'd want to do something differently. Since this is just a decision
> in mesa/st I think a cap makes sense..
>
Makes sense.. will go that route - thanks for your
On 4 April 2018 at 18:45, Dylan Baker wrote:
> Which should be relative instead of absolute.
>
> Fixes: f7f1b30f81e842db6057591470ce3cb6d4fb2795
>("meson: extend install_megadrivers script to handle symmlinking")
> Bugzilla:
On 4 April 2018 at 18:58, Dylan Baker wrote:
> Fixes: 0ba909f0f111824223bc38563d1a6bc73e69c2cc
>("meson: build gallium xa state tracker")
> Signed-off-by: Dylan Baker
Reviewed-by: Emil Velikov
Please land this
I'd vote for PIPE_CAP until there is any place inside nir passes were
we'd want to do something differently. Since this is just a decision
in mesa/st I think a cap makes sense..
On Thu, Apr 5, 2018 at 10:25 AM, Jason Ekstrand wrote:
> I'm not sure if this should be a NIR
On 5 April 2018 at 14:45, Ilia Mirkin wrote:
> Shouldn't this just be handled as in, e.g.,
>
> https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c#n97
>
> i.e. return an error in the driver-specific loader? This create
> function
2018-04-05 15:44 GMT+02:00 Thierry Reding :
> From: Thierry Reding
>
> This helps cut down on the number of parameters that we need to pass
> around. Subsequent patches will also add more data to struct drm that
> init_gbm() needs to access, so
I'm not sure if this should be a NIR compiler option or a PIPE_CAP. On
Intel hardware, we have both and we handle it ourselves.
On April 4, 2018 23:04:36 Christian Gmeiner
wrote:
As not every (upcoming) backend compiler is happy with
nir_lower_xxx_to_scalar
2018-04-05 15:44 GMT+02:00 Thierry Reding :
> From: Thierry Reding
>
> One of the error returns ended up being indented twice. Fix it.
>
> Signed-off-by: Thierry Reding
Reviewed-by: Christian Gmeiner
On 5 April 2018 at 14:44, Thierry Reding wrote:
> From: Thierry Reding
>
> If available, use the formats/modifiers blob from a DRM/KMS device to
> automatically detect which modifiers to use. In the absence of the blob,
> leave it up to the
Shouldn't this just be handled as in, e.g.,
https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c#n97
i.e. return an error in the driver-specific loader? This create
function should fail:
From: Thierry Reding
If available, use the formats/modifiers blob from a DRM/KMS device to
automatically detect which modifiers to use. In the absence of the blob,
leave it up to the implementation to choose an appropriate format.
Based on work by Lucas Stach
From: Thierry Reding
In legacy mode, the user can interrupt kmscube by pressing the return
key. Implement the same behaviour for atomic mode.
Signed-off-by: Thierry Reding
---
drm-atomic.c | 25 +
1 file changed, 25 insertions(+)
From: Thierry Reding
This helps cut down on the number of parameters that we need to pass
around. Subsequent patches will also add more data to struct drm that
init_gbm() needs to access, so passing in the struct make sure these
will be available.
Based on work by Lucas
From: Thierry Reding
One of the error returns ended up being indented twice. Fix it.
Signed-off-by: Thierry Reding
---
drm-atomic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drm-atomic.c b/drm-atomic.c
index
https://bugs.freedesktop.org/show_bug.cgi?id=105901
--- Comment #2 from Brian Paul ---
With a debug build of Mesa if you set the MESA_DEBUG env var to
"incomplete_tex" you'll get a warning. This predates the GL_ARB_debug_output
extension.
It shouldn't be hard to go into the
On Wednesday, 2018-04-04 10:58:29 -0700, Dylan Baker wrote:
> Fixes: 0ba909f0f111824223bc38563d1a6bc73e69c2cc
>("meson: build gallium xa state tracker")
> Signed-off-by: Dylan Baker
Reviewed-by: Eric Engestrom
> ---
>
On Wednesday, 2018-04-04 10:45:26 -0700, Dylan Baker wrote:
> Which should be relative instead of absolute.
>
> Fixes: f7f1b30f81e842db6057591470ce3cb6d4fb2795
>("meson: extend install_megadrivers script to handle symmlinking")
> Bugzilla:
Hi;
On 04/05/2018 02:51 AM, James Xiong wrote:
From: "Xiong, James"
The importer creates an image out of the imported FOURCC_NV12 texture,
the image's dri_format is set to R8(same as the first plane's format),
when it queries the image's fourcc, mesa goes through
https://bugs.freedesktop.org/show_bug.cgi?id=105904
Bug ID: 105904
Summary: Needed to delete mesa shader cache after driver
upgrade for 32 bit wine vulkan programs to work.
Product: Mesa
Version: git
Hardware: x86-64
On 04/05/2018 02:51 AM, James Xiong wrote:
From: "Xiong, James"
The planar_format in __DRIimage contains the original fourcc
used to create the image, if it's set, return the saved fourcc
directly; Otherwise fall back to the old way.
Also we should validate the input
Reviewed-by: Bas Nieuwenhuizen
On Thu, Apr 5, 2018 at 10:27 AM, Samuel Pitoiset
wrote:
> Enable it directly in the preamble, but do not enable line
> on Polaris10/11/12 because there is a hw bug.
>
> There is possibly an issue when MSAA is
Reviewed-by: Bas Nieuwenhuizen
On Thu, Apr 5, 2018 at 10:27 AM, Samuel Pitoiset
wrote:
> This unnecessary when the precision bit flag is not set, and this
> might hurt performance. The Vulkan explains that not setting
>
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