Re: [Mesa-dev] [PATCH v2 00/45] OpenSWR driver misc changes

Entire patch set Reviewed-by: Bruce Cherniak > On Apr 17, 2018, at 8:31 PM, George Kyriazis > wrote: > > > Lots of SWR-specifc changes, including: > - work for 16-wide simd operation across all avx flavors > - separate avx instrinsics

[Mesa-dev] [Bug 105928] [TRACKER] Mesa 18.1 feature tracker

https://bugs.freedesktop.org/show_bug.cgi?id=105928 Bas Nieuwenhuizen changed: What|Removed |Added Depends on||106114

[Mesa-dev] [Bug 106114] Blocker to support VK_EXT_descriptor_indexing

https://bugs.freedesktop.org/show_bug.cgi?id=106114 Bug ID: 106114 Summary: Blocker to support VK_EXT_descriptor_indexing Product: Mesa Version: unspecified Hardware: Other OS: All Status: NEW Severity:

Re: [Mesa-dev] Query GL extensions (“GL_OES_EGL_image_external” ) RE: Create texture2D from NV12

Marek & Palli, I parsed the returned GL extensions string, it sure contains " GL_OES_EGL_image_external ". I made a mistake by looking up log manually before, the string must be truncated by log length limitation. Thank you very much! Zong Wei -Original Message- From: Palli, Tapani

[Mesa-dev] [PATCH v2 32/45] swr/rast: Fix alloca usage in jitter

Fix issue where temporary allocas were getting hoisted to function entry unnecessarily. We now explicitly mark temporary allocas and skip hoisting during the hoist pass. Shuold reduce stack usage. --- src/gallium/drivers/swr/rasterizer/jitter/builder.cpp | 17 +

[Mesa-dev] [PATCH v2 25/45] swr/rast: Enable generalized fetch jit

Enable generalized fetch jit with 8 or 16 wide SIMD target. Still some work needed to remove some simd8 double pumping for 16-wide target. Also removed unused non-gather load vertices path. --- .../drivers/swr/rasterizer/jitter/builder.cpp | 26 +-

[Mesa-dev] [PATCH v2 30/45] swr/rast: Fix byte offset for non-indexed draws

--- src/gallium/drivers/swr/rasterizer/core/frontend.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp index 25d1073..2076859 100644 ---

[Mesa-dev] [PATCH v2 41/45] swr/rast: Refactor to improve code sharing.

--- .../drivers/swr/rasterizer/jitter/fetch_jit.cpp| 79 ++ 1 file changed, 36 insertions(+), 43 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp index 767866f..af97b83 100644 ---

[Mesa-dev] [PATCH v2 27/45] swr/rast: Fix codegen for typedef types

--- src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py b/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py index a127976..d8863c0 100644 ---

[Mesa-dev] [PATCH v2 20/45] swr/rast: Start refactoring of builder/packetizer.

Move x86 intrinsic lowering to a separate pass. Builder now instantiates generic intrinsics for features not supported by llvm. The separate x86 lowering pass is responsible for lowering to valid x86 for the target SIMD architecture. Currently it's a port of existing code to get it up and running

[Mesa-dev] [PATCH v2 40/45] swr/rast: minimize codegen redundant work

Move filtering of redundant codegen operations into gen scripts themselves --- .../drivers/swr/rasterizer/codegen/gen_archrast.py | 111 + .../drivers/swr/rasterizer/codegen/gen_backends.py | 97 +-- .../drivers/swr/rasterizer/codegen/gen_common.py | 131

[Mesa-dev] [PATCH v2 12/45] swr/rast: Permute work for simd16

Fix slow permutes in PA tri lists under SIMD16 emulation on AVX Added missing permute (interlane, immediate) to SIMDLIB --- .../drivers/swr/rasterizer/common/simd16intrin.h | 1 + .../drivers/swr/rasterizer/common/simdintrin.h | 1 + .../swr/rasterizer/common/simdlib_256_avx.inl |

[Mesa-dev] [PATCH v2 14/45] swr/rast: Add "Num Instructions Executed" stats intrinsic.

Added a SWR_SHADER_STATS structure which is passed to each shader. The stats pass will instrument the shader to populate this. --- src/gallium/drivers/swr/rasterizer/core/state.h | 28 ++--- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git

[Mesa-dev] [PATCH v2 29/45] swr/rast: Add support for setting optimization level

for JIT compilation --- .../drivers/swr/rasterizer/codegen/knob_defs.py| 35 ++ .../swr/rasterizer/common/simdlib_512_emu.inl | 2 +- src/gallium/drivers/swr/rasterizer/core/state.h| 13 .../drivers/swr/rasterizer/jitter/JitManager.cpp | 10 +--

[Mesa-dev] [PATCH v2 02/45] swr/rast: Introduce JIT_MEM_CLIENT

Add assert for correct usage of memory accesses v2: reworded commit message; renamed enum more appropriately --- .../drivers/swr/rasterizer/jitter/builder_mem.cpp | 58 ++ .../drivers/swr/rasterizer/jitter/builder_mem.h| 47 --

[Mesa-dev] [PATCH v2 37/45] swr/rast: Add shader stats infrastructure (WIP)

--- .../drivers/swr/rasterizer/archrast/archrast.cpp | 64 +++-- .../drivers/swr/rasterizer/archrast/events.proto | 65 -- .../swr/rasterizer/archrast/events_private.proto | 30 ++ .../drivers/swr/rasterizer/jitter/builder.h| 23

[Mesa-dev] [PATCH v2 18/45] swr/rast: Move CallPrint() to a separate file

Needed work for jit code debug. --- src/gallium/drivers/swr/Makefile.sources | 3 +- src/gallium/drivers/swr/meson.build| 1 + .../drivers/swr/rasterizer/jitter/builder_misc.cpp | 22 +- .../rasterizer/jitter/shader_lib/DebugOutput.cpp | 51

[Mesa-dev] [PATCH v2 36/45] swr/rast: Type-check TemplateArgUnroller

Allows direct use of enum values in conversion to template args. --- src/gallium/drivers/swr/rasterizer/core/utils.h | 39 + 1 file changed, 21 insertions(+), 18 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/utils.h

[Mesa-dev] [PATCH v2 16/45] swr/rast: Add some archrast counters

Hook up archrast counters for shader stats: instructions executed. --- .../drivers/swr/rasterizer/archrast/archrast.cpp | 4 +-- .../drivers/swr/rasterizer/archrast/events.proto | 30 ++ .../drivers/swr/rasterizer/core/backend.cpp| 1 +

[Mesa-dev] [PATCH v2 35/45] swr/rast: Add vgather to x86 lowering pass.

Add support for generic VGATHERPD intrinsic in x86 lowering pass. --- .../rasterizer/jitter/functionpasses/lower_x86.cpp | 85 +++--- 1 file changed, 76 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp

[Mesa-dev] [PATCH v2 31/45] swr/rast: Change gfx pointers to gfxptr_t

Changing type to gfxptr for indices and related changes to fetch and mem builder code. --- .../swr/rasterizer/codegen/gen_llvm_ir_macros.py | 4 +- src/gallium/drivers/swr/rasterizer/core/api.cpp| 8 +- src/gallium/drivers/swr/rasterizer/core/context.h | 2 +-

[Mesa-dev] [PATCH v2 24/45] swr/rast: Add builder_gfx_mem.{h|cpp}

Abstract usage scenarios for memory accesses into builder_gfx_mem. Builder_gfx_mem will convert gfxptr_t from 64-bit int to regular pointer types for use by builder_mem. v2: reworded commit message; renamed enum more appropriately --- src/gallium/drivers/swr/Makefile.sources | 2 +

[Mesa-dev] [PATCH v2 15/45] swr/rast: Code cleanup

Removing some code that doesn't seem to do anything meaningful. --- src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp

[Mesa-dev] [PATCH v2 11/45] swr/rast: WIP builder rewrite (2)

Finish up the remaining explicit intrinsic uses. At this point all explicit Intrinsic::getDeclaration() usage has been replaced with auto generated macros generated with gen_llvm_ir_macros.py. Going forward, make sure to only use the intrinsics here, adding new ones as needed. Next step is to

[Mesa-dev] [PATCH v2 43/45] swr/rast: Optimize late/bindless JIT of samplers

Add per-worker thread private data to all shader calls Add per-worker sampler cache and jit context Add late LoadTexel JIT support Add per-worker-thread Sampler / LoadTexel JIT --- src/gallium/drivers/swr/rasterizer/core/api.cpp| 7 ++- src/gallium/drivers/swr/rasterizer/core/api.h | 47

[Mesa-dev] [PATCH v2 26/45] swr: add x86 lowering pass to fragment shader

Needed because some FP paths (namely stipple) use gather intrinsics that now need to be lowered to x86. v2: fix typo in commit message --- src/gallium/drivers/swr/swr_shader.cpp | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/gallium/drivers/swr/swr_shader.cpp

[Mesa-dev] [PATCH v2 45/45] swr/rast: Fix VGATHERPD lowering

Also Implement VHSUBPS in x86 lowering pass. --- .../rasterizer/jitter/functionpasses/lower_x86.cpp | 82 ++ 1 file changed, 69 insertions(+), 13 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp

[Mesa-dev] [PATCH v2 44/45] swr/rast: Replace x86 VMOVMSK with llvm-only implementation

--- .../swr/rasterizer/codegen/gen_llvm_ir_macros.py | 1 - .../drivers/swr/rasterizer/jitter/builder_mem.cpp | 2 +- .../drivers/swr/rasterizer/jitter/builder_misc.cpp | 25 -- .../drivers/swr/rasterizer/jitter/builder_misc.h | 2 ++

[Mesa-dev] [PATCH v2 38/45] swr/rast: Fix 64bit float loads in x86 lowering pass

--- .../drivers/swr/rasterizer/jitter/builder_mem.cpp | 39 +- .../drivers/swr/rasterizer/jitter/fetch_jit.cpp| 31 + 2 files changed, 25 insertions(+), 45 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp

[Mesa-dev] [PATCH v2 13/45] swr/rast: Add MEM_ADD helper function to Builder.

mem[offset] += value This function will be heavily used by all stats intrinsics. --- src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp | 7 +++ src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h | 2 ++ 2 files changed, 9 insertions(+) diff --git

[Mesa-dev] [PATCH v2 04/45] swr/rast: Add debug type info for i128

Help support debug info in 16 wide shaders. --- src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp index 0cefa43..bfb1d2e

[Mesa-dev] [PATCH v2 08/45] swr/rast: LLVM 6 fix

for getting masked gather intrinsic (also compatible with LLVM 4) --- src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp

[Mesa-dev] [PATCH v2 33/45] swr/rast: add cvt instructions in x86 lowering pass

Support generic VCVTPD2PS and VCVTPH2PS in x86 lowering pass. --- .../swr/rasterizer/codegen/gen_llvm_ir_macros.py | 70 -- .../drivers/swr/rasterizer/jitter/builder_mem.cpp | 14 - .../drivers/swr/rasterizer/jitter/builder_mem.h| 3 -

[Mesa-dev] [PATCH v2 22/45] swr/rast: Cleanup of JitManager convenience types

Small cleanup. Remove convenience types from JitManager and standardize on the Builder's convenience types. --- .../drivers/swr/rasterizer/jitter/JitManager.cpp | 19 --- .../drivers/swr/rasterizer/jitter/JitManager.h | 20

[Mesa-dev] [PATCH v2 28/45] swr/rast: Adding translate call to builder_gfx_mem.

--- src/gallium/drivers/swr/rasterizer/jitter/builder_gfx_mem.cpp | 5 + src/gallium/drivers/swr/rasterizer/jitter/builder_gfx_mem.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_gfx_mem.cpp

[Mesa-dev] [PATCH v2 39/45] swr/rast: double-pump in x86 lowering pass

Add support for double-pumping a smaller SIMD width intrinsic. --- .../rasterizer/jitter/functionpasses/lower_x86.cpp | 30 ++ 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp

[Mesa-dev] [PATCH v2 34/45] swr/rast: fix comment

--- src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp index 8d659d0..cdfddf3 100644 ---

[Mesa-dev] [PATCH v2 42/45] swr/rast: Implement VROUND intrinsic in x86 lowering pass

--- .../rasterizer/jitter/functionpasses/lower_x86.cpp | 38 +- 1 file changed, 37 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp b/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp index

[Mesa-dev] [PATCH v2 09/45] swr/rast: WIP builder rewrite.

Start removing avx2 macros for functionality that exists in llvm. --- src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py | 5 - src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h | 9 - 2 files changed, 14 deletions(-) diff --git

[Mesa-dev] [PATCH v2 23/45] swr/rast: Lower VGATHERPS and VGATHERPS_16 to x86.

Some more work to do before we can support simultaneous 8-wide and 16-wide and remove the VGATHERPS_16 version. --- .../drivers/swr/rasterizer/jitter/builder_mem.cpp | 69 +- 1 file changed, 2 insertions(+), 67 deletions(-) diff --git

[Mesa-dev] [PATCH v2 10/45] swr/rast: Add autogen of helper llvm intrinsics.

Replace sqrt, maskload, fp min/max, cttz, ctlz with llvm equivalent. Replace AVX maskedstore intrinsic with LLVM intrinsic. Add helper llvm macros for stacksave, stackrestore, popcnt. --- src/gallium/drivers/swr/Makefile.am| 8 ++ src/gallium/drivers/swr/SConscript

[Mesa-dev] [PATCH v2 07/45] swr/rast: Changes to allow jitter to compile with LLVM5

--- src/gallium/drivers/swr/rasterizer/jitter/jit_pch.hpp | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/jit_pch.hpp b/src/gallium/drivers/swr/rasterizer/jitter/jit_pch.hpp index 031bced..b1d6076 100644 ---

[Mesa-dev] [PATCH v2 21/45] swr/rast: Lower PERMD and PERMPS to x86.

Add support for providing an emulation callback function for arch/width combinations that don't map cleanly to an x86 intrinsic. --- .../drivers/swr/rasterizer/jitter/builder_mem.cpp | 8 +-- .../drivers/swr/rasterizer/jitter/builder_misc.cpp | 70 --

[Mesa-dev] [PATCH v2 17/45] swr/rast: Fix name mangling for LLVM pow intrinsic

--- src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py b/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py index 0245584..324f24a

[Mesa-dev] [PATCH v2 19/45] swr/rast: Simplify #define usage in gen source file

Removed preprocessor defines from structures passed to LLVM jitted code. The python scripts do not understand the preprocessor defines and ignores them. So for fields that are compiled out due to a preprocessor define the LLVM script accounts for them anyway because it doesn't know what the

[Mesa-dev] [PATCH v2 00/45] OpenSWR driver misc changes

Lots of SWR-specifc changes, including: - work for 16-wide simd operation across all avx flavors - separate avx instrinsics into a separate x86 lowering pass - stats work - misc other cleanup v2: mostly editorial changes George Kyriazis (45): swr/rast: Add some instructions to jitter

[Mesa-dev] [PATCH v2 06/45] swr/rast: Add some archrast stats

Add stats for degenerate and backfacing primitive counts Wire archrast stats for alpha blend and alpha test. pass value to jitter, upon return have archrast event increment a value --- .../drivers/swr/rasterizer/archrast/archrast.cpp | 35 +-

[Mesa-dev] [PATCH v2 05/45] swr/rast: Silence some unused variable warnings

--- src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp index 5feb5fa..1ee6691 100644 ---

[Mesa-dev] [PATCH v2 01/45] swr/rast: Add some instructions to jitter

VPHADDD, PMAXUD, PMINUD --- .../drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py | 1 + src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp | 12 src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h | 2 ++ 3 files changed, 15 insertions(+) diff --git

[Mesa-dev] [PATCH v2 03/45] swr/rast: Use blend context struct to pass params

Stuff parameters into a blend context struct before passing down through the PFN_BLEND_JIT_FUNC function pointer. Needed for stat changes. --- .../drivers/swr/rasterizer/core/backend_impl.h | 44 ++- src/gallium/drivers/swr/rasterizer/core/state.h| 17 ++--

Re: [Mesa-dev] [PATCH 2/2] i965/blorp: Do the gen11 BTI flush

On Tue, Apr 17, 2018 at 4:19 PM, Anuj Phogat wrote: > For the series: > Reviewed-by: Anuj Phogat > > This might explain piglit GPU hangs or failures. I'll do a piglit run with > these patches. > Yeah. I know it was causing problems in simulation

Re: [Mesa-dev] [PATCH v2 3/3] i965: enable INTEL_blackhole_render

On 17/04/18 00:19, Kenneth Graunke wrote: On Friday, April 6, 2018 7:31:41 AM PDT Lionel Landwerlin wrote: v2: condition the extension on context isolation support from the kernel (Chris) v3: (Lionel) The initial version of this change used a feature of the Gen7+ command parser

[Mesa-dev] [PATCH v3 3/5] i965: perf: read slice/unslice frequencies from OA reports

v2: Add comment breaking down where the frequency values come from (Ken) Signed-off-by: Lionel Landwerlin --- .../drivers/dri/i965/brw_performance_query.c | 49 +++ .../drivers/dri/i965/brw_performance_query.h | 12 + 2 files changed, 61

Re: [Mesa-dev] [PATCH v2 4/5] i965: perf: add support for raw queries

On 17/04/18 00:07, Kenneth Graunke wrote: On Tuesday, April 3, 2018 7:48:12 AM PDT Lionel Landwerlin wrote: diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c These changes look good. diff --git

Re: [Mesa-dev] [PATCH v2 3/5] i965: perf: read slice/unslice frequencies from OA reports

On 16/04/18 23:16, Kenneth Graunke wrote: On Tuesday, April 3, 2018 7:48:11 AM PDT Lionel Landwerlin wrote: Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 37 +++

Re: [Mesa-dev] [PATCH 2/2] i965/blorp: Do the gen11 BTI flush

For the series: Reviewed-by: Anuj Phogat This might explain piglit GPU hangs or failures. I'll do a piglit run with these patches. Thanks Anuj On Tue, Apr 17, 2018 at 3:10 PM, Jason Ekstrand wrote: > --- >

Re: [Mesa-dev] [PATCH 0/9] RadeonSI LLVM crash workaround for Ubuntu 18.04

For the series: Tested-by: Benedikt Schemmer Tested with Series starting with [Mesa-dev] [PATCH 1/7] ac/surface: handle DCC subresource fast clear restriction on VI Series starting with [Mesa-dev] [PATCH 1/9] radeonsi: remove r600_pipe_common.h Series starting with [Mesa-dev] [PATCH 0/9]

[Mesa-dev] [PATCH 1/3] amd/addrlib: add support for VegaM

From: Marek Olšák --- src/amd/addrlib/amdgpu_asic_addr.h | 2 ++ src/amd/addrlib/r800/ciaddrlib.cpp | 5 + src/amd/addrlib/r800/siaddrlib.cpp | 33 ++ src/amd/addrlib/r800/siaddrlib.h | 1 + 4 files changed, 41 insertions(+) diff --git

[Mesa-dev] [PATCH 2/3] radeonsi: add support for VegaM

From: Marek Olšák --- include/pci_ids/radeonsi_pci_ids.h | 3 +++ src/amd/common/ac_llvm_util.c| 1 + src/amd/common/ac_surface.c | 4 src/amd/common/amd_family.h | 1 + src/gallium/drivers/radeonsi/si_get.c

[Mesa-dev] [PATCH 3/3] radeon/vce: disable vce dual pipe on VegaM

From: Leo Liu --- src/gallium/drivers/radeon/radeon_vce.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index 57b9d349582..22168b50e24 100644 ---

[Mesa-dev] [PATCH 1/2] anv/blorp: Do the gen11 BTI flush

--- src/intel/vulkan/genX_blorp_exec.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c index 1ecec19..b2c600f 100644 --- a/src/intel/vulkan/genX_blorp_exec.c +++ b/src/intel/vulkan/genX_blorp_exec.c @@

[Mesa-dev] [PATCH 2/2] i965/blorp: Do the gen11 BTI flush

--- src/mesa/drivers/dri/i965/genX_blorp_exec.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c index 3406a6f..a6cb0e3 100644 --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c +++

[Mesa-dev] [Bug 106074] radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset

https://bugs.freedesktop.org/show_bug.cgi?id=106074 Samuel Pitoiset changed: What|Removed |Added Status|NEW |RESOLVED

Re: [Mesa-dev] [PATCH] mesa/math: Allocate memory for GLmatrix elements and its inverse contiguously

On 04/16/2018 10:55 PM, Thomas Helland wrote: > Hi, and thanks for the patch =) > > Have you done any performance testing on this to verify it > gives us a speedup of any kind? I'm asking because it seems like > this might be something that a decent compiler should be able to do. > Performance

[Mesa-dev] [Bug 103999] 4x MSAA with RG32F shows garbage on triangle edges

https://bugs.freedesktop.org/show_bug.cgi?id=103999 Samuel Pitoiset changed: What|Removed |Added Status|NEW |RESOLVED

[Mesa-dev] [PATCH] radeonsi/gfx9: fix a hang with an empty first IB

From: Marek Olšák This packet causes the no-op IB detection to fail, so the IB is always submitted. Also fix the no-op IB detection by moving the begin call. Cc: 18.0 --- src/gallium/drivers/radeonsi/si_pipe.c | 7 --- 1 file

[Mesa-dev] [Bug 105320] Storage texel buffer access produces wrong results (RX Vega)

https://bugs.freedesktop.org/show_bug.cgi?id=105320 --- Comment #6 from Samuel Pitoiset --- Does it work now with https://cgit.freedesktop.org/mesa/mesa/commit/?id=b0e3a9b19f16ed1ce4c1f150718b0c0f0e6111f6 ? -- You are receiving this mail because: You are the QA

Re: [Mesa-dev] [PATCH v4 6/6] i965: gl_BaseVertex must be zero for non-indexed draw calls

On April 17, 2018 10:31:53 Ian Romanick wrote: On 04/10/2018 09:26 AM, Jason Ekstrand wrote: On Tue, Apr 10, 2018 at 1:28 AM, Antia Puentes > wrote: On 07/04/18 08:21, Jason Ekstrand wrote: Oh, boy, this is tricky... First

Re: [Mesa-dev] [PATCH 5/7] meson: fix builds against LLVM built without rtti

Quoting Dylan Baker (2018-04-16 16:48:59) > Building without rtti is a frought with peril, but it's something that > autotools supports so we need to support it too. > > Since we've moved to version 0.44 as a whole we can use the meson > functionality for accessing random llvm-config options we

Re: [Mesa-dev] [PATCH 6/7] meson: use array type options

Quoting Eric Anholt (2018-04-17 11:37:37) > Dylan Baker writes: > > > This option type is nice since it involves less converting strings into > > lists, and because it validates the values that are provided. > > > > Signed-off-by: Dylan Baker > >

Re: [Mesa-dev] [PATCH v2 4/4] spirv: Accept doubles in FaceForward, Reflect and Refract

On Wed, Mar 21, 2018 at 12:34 PM, Neil Roberts wrote: > The SPIR-V spec doesn’t specify a size requirement for these and the > equivalent functions in the GLSL spec have explicit alternatives for > doubles. Refract is a little bit more complicated due to the fact that > the

Re: [Mesa-dev] [PATCH v2 3/4] spirv: Add a 64-bit implementation of OpIsInf

Reviewed-by: Jason Ekstrand On Wed, Mar 21, 2018 at 12:34 PM, Neil Roberts wrote: > The only change neccessary is to change the type of the constant used > to compare against. > > This has been tested against the arb_gpu_shader_fp64/execution/ >

Re: [Mesa-dev] [PATCH 2/4] spirv: Use nir_imm_floatN_t for constants for GLSL450 builtins

Thanks! 1 and 2 are Reviewed-by: Jason Ekstrand On Wed, Mar 21, 2018 at 12:34 PM, Neil Roberts wrote: > There is an existing macro that is used to choose between either a > float or a double immediate constant based on the bit size of the > first

Re: [Mesa-dev] [PATCH 1/4] nir/builder: Add a nir_imm_floatN_t helper

On Wed, Mar 21, 2018 at 12:34 PM, Neil Roberts wrote: > This lets you easily build float immediates just given the bit size. > If we have this single place here to handle this then it will be > easier to add support for 16-bit floats later. > --- >

Re: [Mesa-dev] [PATCH 6/7] meson: use array type options

Dylan Baker writes: > This option type is nice since it involves less converting strings into > lists, and because it validates the values that are provided. > > Signed-off-by: Dylan Baker > --- > meson.build | 113

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

On Tue, Apr 17, 2018 at 1:52 PM, Ian Romanick wrote: > On 04/17/2018 05:19 AM, Ilia Mirkin wrote: >> On Mon, Apr 16, 2018 at 11:22 PM, Tapani Pälli >> wrote: >>> On 17.04.2018 02:42, Ilia Mirkin wrote: differentiating the case "have

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

On 04/17/2018 05:19 AM, Ilia Mirkin wrote: > On Mon, Apr 16, 2018 at 11:22 PM, Tapani Pälli wrote: >> On 17.04.2018 02:42, Ilia Mirkin wrote: >>> differentiating the case "have NV_image_formats but not >>> EXT_texture_norm16"? >> >> I had a version that added another

Re: [Mesa-dev] [PATCH] glsl_to_nir: fix ir_binop_vector_extract handling

Actually, if you just apply my patch, it should fix glsl_to_nir too. Marek On Tue, Apr 17, 2018 at 1:31 PM, Marek Olšák wrote: > Skipping an instruction is incorrect. > > I recommend something like this: https://patchwork.freedesktop. > org/patch/217304/ > > Marek > > > > On

Re: [Mesa-dev] [PATCH] glsl_to_nir: fix ir_binop_vector_extract handling

Skipping an instruction is incorrect. I recommend something like this: https://patchwork.freedesktop.org/patch/217304/ Marek On Tue, Apr 3, 2018 at 8:32 AM, Andriy Khulap wrote: > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105438 > Signed-off-by: Andriy

Re: [Mesa-dev] [PATCH v4 6/6] i965: gl_BaseVertex must be zero for non-indexed draw calls

On 04/10/2018 09:26 AM, Jason Ekstrand wrote: > On Tue, Apr 10, 2018 at 1:28 AM, Antia Puentes > wrote: > > On 07/04/18 08:21, Jason Ekstrand wrote: > >> Oh, boy, this is tricky... First of all, it's a bit of a bummer >> that we

Re: [Mesa-dev] Query GL extensions (“GL_OES_EGL_image_external” ) RE: Create texture2D from NV12

Your extension string is too short. This is what I have: GL_ANGLE_texture_compression_dxt3, GL_ANGLE_texture_compression_dxt5, GL_APPLE_texture_max_level, GL_EXT_base_instance, GL_EXT_blend_func_extended, GL_EXT_blend_minmax, GL_EXT_buffer_storage, GL_EXT_clip_cull_distance,

Re: [Mesa-dev] [PATCH 5/5] amd/common: use the dimension-aware image intrinsics on LLVM 7+

For the series: Acked-by: Marek Olšák Marek On Wed, Apr 11, 2018 at 7:13 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > Requires LLVM trunk r329166. > --- > src/amd/common/ac_llvm_build.c | 189

Re: [Mesa-dev] Query GL extensions (“GL_OES_EGL_image_external” ) RE: Create texture2D from NV12

Hi; On 17.04.2018 13:30, Zong, Wei wrote: Hi Marek, Thanks for your help. Now I can use GL extension“*GL_OES_EGL_image_external*” to load and render NV12 image, it works well on my platform (Broxton). To ensure using this extension correctly on any platform, I checked for supported OpenGL

Re: [Mesa-dev] [PATCH 0/3] meson: Patches for autotools parity

Since no one else has commented, I'm going to merge patches 2-3 now. Dylan Quoting Jan Alexander Steffens (heftig) (2018-04-14 10:23:19) > Hi, > > these patches were added to mesa 18.0.0 by Arch Linux in order to make the > meson build product more > like the autotools one. They are in

Re: [Mesa-dev] [PATCH 09/22] spirv: Get rid of vtn_variable_mode_image/sampler

I forgot to CC any of the radv people. Sorry for the noise. On 17/04/18 16:36, Alejandro Piñeiro wrote: > From: Neil Roberts > > vtn_variable_mode_image and _sampler are instead replaced with > vtn_variable_mode_uniform which encompasses both of them. In the few > places

[Mesa-dev] [PATCH 22/22] i965: Link uniforms of SPIR-V programs using the NIR linker

From: Eduardo Lima Mitev Signed-off-by: Eduardo Lima Signed-off-by: Alejandro Piñeiro --- src/mesa/drivers/dri/i965/brw_link.cpp | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp

[Mesa-dev] [PATCH 20/22] i965: account for NIR uniforms without name

From: Eduardo Lima Mitev Right now, the BRW linker code assumes nir_variable::name is always non-NULL, but thanks to ARB_gl_spirv we will soon be linking SPIR-V programs, and those explicitly require matching uniforms by location. The name is just a debug hint. v2: simplified,

[Mesa-dev] [PATCH 21/22] i965: Setup glsl uniforms by index rather than name matching

From: Neil Roberts Previously when setting up a uniform it would try to walk the uniform storage slots and find one that matches the name of the given variable. However, each variable already has a location which is an index into the UniformStorage array so we can just

[Mesa-dev] [PATCH 19/22] i965: Update TexturesUsed after linking the shaders

From: Neil Roberts Otherwise if the shader is SPIR-V then SamplerUsed won’t have been initialised yet so it will end up thinking no textures are used. This was causing a crash later on if nothing causes it to regenerate TexturesUsed before the next render. ---

[Mesa-dev] [PATCH 18/22] i965: Build SPIR-V programs' resource list using NIR

From: Eduardo Lima Mitev --- src/mesa/drivers/dri/i965/brw_link.cpp | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp index 7841626dc33..48c06ce629f 100644 ---

[Mesa-dev] [PATCH 17/22] nir/linker: Add nir_build_program_resource_list()

From: Eduardo Lima Mitev This function is equivalent to the compiler/glsl build_program_resource_list() but will extract the resources from NIR shaders instead. For now, only uniforms and program inputs are implemented. Signed-off-by: Eduardo Lima

[Mesa-dev] [PATCH 16/22] compiler/link: move add_program_resource to linker_util

So it could be used by the GLSL and NIR linker. --- src/compiler/glsl/linker.cpp | 36 src/compiler/linker_util.cpp | 37 + src/compiler/linker_util.h | 5 + 3 files changed, 42 insertions(+), 36 deletions(-) diff

[Mesa-dev] [PATCH 14/22] nir/linker: add some cross stage uniform validation

For now it checks that the type and array size of the uniforms is the same, as right now only this and uniform->opaque is filled (and this is specific for each stage). More checks will be added as more features get added. We are not checking for the same explicit location as we are basing the

[Mesa-dev] [PATCH 15/22] nir/linker: Set the uniform initial values

From: Neil Roberts This is based on link_uniform_initializers.cpp. --- src/compiler/Makefile.sources| 1 + src/compiler/nir/meson.build | 1 + src/compiler/nir/nir_link_uniform_initializers.c | 292 +++

[Mesa-dev] [PATCH 12/22] compiler/link: add linker_util.h, move linker_error/warning to it

Linker utilities common to glsl and nir. As a first step, it moves linker_error/warning from glsl/linker.h --- src/compiler/Makefile.sources | 2 + .../glsl/link_uniform_block_active_visitor.cpp | 1 + src/compiler/glsl/linker.cpp | 27

[Mesa-dev] [PATCH 11/22] spirv: Set nir_variable->explicit_binding

From: Neil Roberts When SpvDecorationBinding is encountered in the SPIR-V source it now sets explicit_binding on the nir_variable. This will be used to determine whether to initialise sampler and image uniforms with the binding value. --- src/compiler/spirv/vtn_private.h

[Mesa-dev] [PATCH 13/22] nir/linker: Add nir_link_uniforms()

From: Eduardo Lima Mitev This function will be the entry point for linking the uniforms from the nir_shader objects associated with the gl_linked_shaders of a program. This patch includes initial support for linking uniforms from NIR shaders. It is tailored for the

[Mesa-dev] [PATCH 08/22] spirv: translate default-block uniforms

From: Nicolai Hähnle They are supported by SPIR-V for ARB_gl_spirv. v2 (changes on top of Nicolai's original patch): * Handle UniformConstant storage class for uniforms other than samplers and images. (Eduardo Lima) * Handle location decoration also for

[Mesa-dev] [PATCH 07/22] nir/types: Add a utility wrapper to glsl_type::sampler_index()

From: Eduardo Lima Mitev I think it is more accurate to call it a sampler target (?). --- src/compiler/nir_types.cpp | 7 +++ src/compiler/nir_types.h | 1 + 2 files changed, 8 insertions(+) diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp index

[Mesa-dev] [PATCH 05/22] nir/lower_samplers: Limit assert to GLSL shader programs

From: Eduardo Lima Mitev Vulkan has the concept of separate image and sampler objects in the SPIR-V code whereas GL conflates them into one. nir_lower_samplers contains an assert to verify that sampler operand is not being set on the nir instruction. However when the code comes

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