Re: [Mesa-dev] [PATCH 02/10] dri_interface: add __DRI_IMAGE_TRANSFER_USER_STRIDE

Why would you want to modify it? It's exactly what you get when you map it, but that stride can't be used for modesetting. Marek On Wed, Apr 25, 2018 at 11:14 PM, Gurchetan Singh < gurchetansi...@chromium.org> wrote: > That sounds fine to me. We can just modify the stride after >

Re: [Mesa-dev] Nouveau driver problem when using EGL_LINUX_DMA_BUF_EXT

On Wed, Apr 18, 2018 at 6:04 AM, Volker Vogelhuber wrote: > On 17.04.2018 15:44, Pekka Paalanen wrote: >> If Nouveau cannot handle that correctly, it would hopefully refuse the >> import. > > Although it would not solve my problem, it would be at least a proper >

Re: [Mesa-dev] [PATCH 02/10] dri_interface: add __DRI_IMAGE_TRANSFER_USER_STRIDE

That sounds fine to me. We can just modify the stride after dri_bo_create(..). On Wed, Apr 25, 2018 at 7:30 PM, Marek Olšák wrote: > On Wed, Apr 25, 2018 at 6:56 PM, Gurchetan Singh > wrote: >> >> On Wed, Apr 25, 2018 at 2:16 PM, Marek Olšák

Re: [Mesa-dev] [PATCH 02/10] dri_interface: add __DRI_IMAGE_TRANSFER_USER_STRIDE

On Wed, Apr 25, 2018 at 6:56 PM, Gurchetan Singh < gurchetansi...@chromium.org> wrote: > On Wed, Apr 25, 2018 at 2:16 PM, Marek Olšák wrote: > > From: Nicolai Hähnle > > > > Allow the caller to specify the row stride (in bytes) with which an image > >

[Mesa-dev] [Bug 106232] LLVM unit tests have error in random number handling

https://bugs.freedesktop.org/show_bug.cgi?id=106232 Roland Scheidegger changed: What|Removed |Added CC|

Re: [Mesa-dev] [PATCH v2 4/5] i965/clear: Simplify updating the indirect depth value

On April 25, 2018 20:25:16 Nanley Chery wrote: On Wed, Apr 25, 2018 at 04:50:11PM -0700, Jason Ekstrand wrote: On Tue, Apr 24, 2018 at 5:48 PM, Nanley Chery wrote: Determine the predicate for updating the indirect depth value in the loop which

Re: [Mesa-dev] [PATCH v2 4/5] i965/clear: Simplify updating the indirect depth value

On Wed, Apr 25, 2018 at 04:50:11PM -0700, Jason Ekstrand wrote: > On Tue, Apr 24, 2018 at 5:48 PM, Nanley Chery wrote: > > > Determine the predicate for updating the indirect depth value in the > > loop which inspects whether or not we need to resolve any slices. > > --- >

Re: [Mesa-dev] [PATCH v2 4/5] i965/clear: Simplify updating the indirect depth value

On Tue, Apr 24, 2018 at 5:48 PM, Nanley Chery wrote: > Determine the predicate for updating the indirect depth value in the > loop which inspects whether or not we need to resolve any slices. > --- > src/mesa/drivers/dri/i965/brw_clear.c | 43

Re: [Mesa-dev] [PATCH] anv/icl: Enable Vulkan on Ice Lake

On Wed, Apr 25, 2018 at 03:59:52PM -0700, Anuj Phogat wrote: > This patch enables the Vulkan driver on Ice Lake h/w > with added warning about preliminary support. > > Signed-off-by: Anuj Phogat > --- > src/intel/vulkan/anv_device.c | 2 ++ > 1 file changed, 2

[Mesa-dev] [PATCH] anv/icl: Enable Vulkan on Ice Lake

This patch enables the Vulkan driver on Ice Lake h/w with added warning about preliminary support. Signed-off-by: Anuj Phogat --- src/intel/vulkan/anv_device.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/intel/vulkan/anv_device.c

Re: [Mesa-dev] [PATCH 02/10] dri_interface: add __DRI_IMAGE_TRANSFER_USER_STRIDE

On Wed, Apr 25, 2018 at 2:16 PM, Marek Olšák wrote: > From: Nicolai Hähnle > > Allow the caller to specify the row stride (in bytes) with which an image > should be mapped. Note that completely ignoring USER_STRIDE is a valid > implementation of

[Mesa-dev] [Bug 106231] llvmpipe blends produce bad code after llvm patch https://reviews.llvm.org/D44785

https://bugs.freedesktop.org/show_bug.cgi?id=106231 --- Comment #2 from Roland Scheidegger --- FWIW I won't have time to look into this until next week, so volunteers welcome. Not using the intrinsics for new llvm version is trivial, but we need to update our existing code

Re: [Mesa-dev] [PATCH v2 4/5] i965/clear: Simplify updating the indirect depth value

On Wed, Apr 25, 2018 at 02:53:26PM -0700, Nanley Chery wrote: > On Wed, Apr 25, 2018 at 02:26:18PM -0700, Rafael Antognolli wrote: > > On Tue, Apr 24, 2018 at 05:48:45PM -0700, Nanley Chery wrote: > > > Determine the predicate for updating the indirect depth value in the > > > loop which inspects

Re: [Mesa-dev] [PATCH v2 4/5] i965/clear: Simplify updating the indirect depth value

On Wed, Apr 25, 2018 at 02:26:18PM -0700, Rafael Antognolli wrote: > On Tue, Apr 24, 2018 at 05:48:45PM -0700, Nanley Chery wrote: > > Determine the predicate for updating the indirect depth value in the > > loop which inspects whether or not we need to resolve any slices. > > --- > >

Re: [Mesa-dev] [PATCH] st: Choose a 2101010 format for GL_RGB/GL_RGBA with a 2_10_10_10 type.

Reviewed-by: Marek Olšák Marek On Wed, Apr 25, 2018 at 3:08 PM, Eric Anholt wrote: > GLES's GL_EXT_texture_type_2_10_10_10_REV allows uploading this type to an > unsized internalformat, and it should be non-color-renderable. > fbobject.c's implementation

Re: [Mesa-dev] [PATCH 09/10] gallium: add PIPE_CAP_TRANSFER_USER_STRIDE_ALIGNMENT

On Wed, Apr 25, 2018 at 5:29 PM, Roland Scheidegger wrote: > Am 25.04.2018 um 23:16 schrieb Marek Olšák: > > From: Marek Olšák > > > > --- > > src/gallium/docs/source/screen.rst | 3 +++ > > src/gallium/drivers/etnaviv/etnaviv_screen.c

Re: [Mesa-dev] [PATCH 09/10] gallium: add PIPE_CAP_TRANSFER_USER_STRIDE_ALIGNMENT

Am 25.04.2018 um 23:16 schrieb Marek Olšák: > From: Marek Olšák > > --- > src/gallium/docs/source/screen.rst | 3 +++ > src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 + > src/gallium/drivers/freedreno/freedreno_screen.c | 1 + >

Re: [Mesa-dev] [PATCH v2 4/5] i965/clear: Simplify updating the indirect depth value

On Tue, Apr 24, 2018 at 05:48:45PM -0700, Nanley Chery wrote: > Determine the predicate for updating the indirect depth value in the > loop which inspects whether or not we need to resolve any slices. > --- > src/mesa/drivers/dri/i965/brw_clear.c | 43 > +-- > 1

[Mesa-dev] [PATCH 10/10] gallium/u_tests: test user-specified transfer stride

From: Marek Olšák --- src/gallium/auxiliary/util/u_tests.c | 62 1 file changed, 62 insertions(+) diff --git a/src/gallium/auxiliary/util/u_tests.c b/src/gallium/auxiliary/util/u_tests.c index e7d11ce117e..32c543027cb 100644 ---

[Mesa-dev] [PATCH 05/10] st/dri: implement __DRI_IMAGE_TRANSFER_MAP_USER_STRIDE

From: Nicolai Hähnle --- src/gallium/state_trackers/dri/dri2.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/src/gallium/state_trackers/dri/dri2.c b/src/gallium/state_trackers/dri/dri2.c index 58a6757f037..b9c09fbabd0 100644 ---

[Mesa-dev] [PATCH 03/10] gallium: use pipe_transfer_map_box inline helper

From: Nicolai Hähnle We will change pipe_context::transfer_map in a subsequent commit. Wrapping it in an inline function makes that subsequent change less noisy. --- src/gallium/auxiliary/util/u_inlines.h | 16

[Mesa-dev] [PATCH 07/10] ac/surface: don't apply the 256-byte alignment to staging surfaces

From: Marek Olšák Having the over-alignment on staging surfaces breaks the user_stride mechanism. v2: Add a new SURF flag. --- src/amd/common/ac_surface.c | 5 - src/amd/common/ac_surface.h | 1 + src/gallium/drivers/radeonsi/si_texture.c |

[Mesa-dev] [PATCH 01/10] dri_interface: document error behavior of mapImage

From: Nicolai Hähnle This function is meant to return NULL on error, unlike some other APIs (such as mmap()), which return MAP_FAILED. --- include/GL/internal/dri_interface.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/GL/internal/dri_interface.h

[Mesa-dev] [PATCH 04/10] gallium: add user_stride parameter to pipe_context::transfer_map

From: Nicolai Hähnle Allow callers to prescribe a desired stride for a transfer. Drivers are free to ignore this new parameter. There is no new capability because it's unclear how strict requirements on this feature should be expressed. ---

[Mesa-dev] [PATCH 08/10] gallium/u_tests: test NULL in constbuf[1] instead of constbuf[0]

From: Marek Olšák radeonsi doesn't support constbuf[0] = NULL. --- src/gallium/auxiliary/util/u_tests.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/auxiliary/util/u_tests.c b/src/gallium/auxiliary/util/u_tests.c index

[Mesa-dev] [PATCH 00/10] DRI interface, gallium: User-specified transfer stride

Hi, This feature is for gralloc, which requires drivers to be able to map an image with a stride of its own choosing, which is usually the same as the image stride. This is a very silly feature that probably comes from designing around mobile GPUs, and must be emulated on everything else. GCN is

[Mesa-dev] [PATCH 06/10] radeonsi: implement transfer_map with user_stride

From: Nicolai Hähnle The stride ends up being aligned by AddrLib in ways that are inconvenient to express clearly, but basically, a stride that is aligned to both 64 pixels and 256 bytes will go through unchanged in practice. ---

[Mesa-dev] [PATCH 09/10] gallium: add PIPE_CAP_TRANSFER_USER_STRIDE_ALIGNMENT

From: Marek Olšák --- src/gallium/docs/source/screen.rst | 3 +++ src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 + src/gallium/drivers/freedreno/freedreno_screen.c | 1 + src/gallium/drivers/i915/i915_screen.c | 1 +

[Mesa-dev] [PATCH 02/10] dri_interface: add __DRI_IMAGE_TRANSFER_USER_STRIDE

From: Nicolai Hähnle Allow the caller to specify the row stride (in bytes) with which an image should be mapped. Note that completely ignoring USER_STRIDE is a valid implementation of mapImage. This is horrible API design. Unfortunately, cros_gralloc does indeed have a

Re: [Mesa-dev] [PATCH] Intel: Add a Kaby Lake PCI ID

And pushed. Thanks, Rafael On Wed, Apr 25, 2018 at 09:49:45AM -0700, Rafael Antognolli wrote: > This patch is > > Reviewed-by: Rafael Antognolli > > On Wed, Apr 25, 2018 at 09:23:04AM -0700, matthew.s.atw...@intel.com wrote: > > From: Matt Atwood

[Mesa-dev] [PATCH 12/21] swr/rast: Fix init in EventHandlerWorkerStats

Make sure we initialize variables. --- src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp index

[Mesa-dev] [PATCH 15/21] swr/rast: Fix regressions.

Bump jit cache revision number to force recompile. --- src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp

[Mesa-dev] [PATCH 11/21] swr/rast: Fix return type of VCVTPS2PH.

expecting <8xi16> return. --- src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py b/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py

[Mesa-dev] [PATCH 03/21] swr/rast: Fix wrong type allocation

ALLOCA pointer elements, not pointers. --- src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp index

[Mesa-dev] [PATCH 18/21] swr/rast: Output rasterizer dir to console since it's process specific

--- .../swr/rasterizer/codegen/templates/gen_ar_eventhandlerfile.hpp | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_ar_eventhandlerfile.hpp

[Mesa-dev] [PATCH 17/21] swr/rast: Add TranslateGfxAddress for shader

Also add GFX_MEM_CLIENT_SHADER --- .../drivers/swr/rasterizer/jitter/builder_gfx_mem.cpp | 2 +- .../drivers/swr/rasterizer/jitter/builder_gfx_mem.h | 17 - src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h | 3 ++- 3 files changed, 19 insertions(+), 3 deletions(-)

[Mesa-dev] [PATCH 06/21] swr/rast: Internal core change

--- src/gallium/drivers/swr/rasterizer/core/utils.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/swr/rasterizer/core/utils.h b/src/gallium/drivers/swr/rasterizer/core/utils.h index d6cbf24..7769e05 100644 --- a/src/gallium/drivers/swr/rasterizer/core/utils.h +++

[Mesa-dev] [PATCH 05/21] swr/rast: Fix x86 lowering 64-bit float handling

- 64-bit cvt-to-float needs to be explicitly handled - gathers need the right parameter types to work with doubles Fixes draw-vertices piglit tests --- .../drivers/swr/rasterizer/jitter/builder_misc.h | 12 ++ .../rasterizer/jitter/functionpasses/lower_x86.cpp | 50 +++---

[Mesa-dev] [PATCH 20/21] swr/rast: Small editorial changes

--- .../swr/rasterizer/jitter/builder_gfx_mem.cpp | 33 ++ .../swr/rasterizer/jitter/builder_gfx_mem.h| 1 + .../rasterizer/jitter/functionpasses/lower_x86.cpp | 2 +- 3 files changed, 17 insertions(+), 19 deletions(-) diff --git

[Mesa-dev] [PATCH 16/21] swr/rast: jit PRINT improvements.

Sign-extend integer types to 32bit when specifying "%d" and add new %u which zero-extends to 32bit. Improves printing of sub 32bit integer types (i1 specifically). --- .../drivers/swr/rasterizer/jitter/builder_misc.cpp| 15 +-- 1 file changed, 13 insertions(+), 2 deletions(-)

[Mesa-dev] [PATCH 07/21] swr/rast: Add support for TexelMask evaluation

--- .../drivers/swr/rasterizer/jitter/builder.cpp | 42 ++ .../drivers/swr/rasterizer/jitter/builder.h| 2 ++ 2 files changed, 44 insertions(+) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder.cpp

[Mesa-dev] [PATCH 21/21] swr/rast: No need to export GetSimdValidIndicesGfx

--- src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp | 4 1 file changed, 4 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp index 48f0961..7b0b80a 100644 ---

[Mesa-dev] [PATCH 19/21] swr/rast: Use new processor detection mechanism

Use specific avx512 selection mechanism based on avx512er bit instead of getHostCPUName(). LLVM 6.0.0 has a bug that reports wrong string for KNL (fixed in 6.0.1). --- .../drivers/swr/rasterizer/jitter/JitManager.cpp | 50 +- .../drivers/swr/rasterizer/jitter/JitManager.h

[Mesa-dev] [PATCH 10/21] swr/rast: WIP Translation handling

--- .../swr/rasterizer/jitter/builder_gfx_mem.cpp | 41 +- .../swr/rasterizer/jitter/builder_gfx_mem.h| 3 +- 2 files changed, 26 insertions(+), 18 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_gfx_mem.cpp

[Mesa-dev] [PATCH 02/21] swr: touch generated files to update timestamp

previous change in generators necessitates this change --- src/gallium/drivers/swr/Makefile.am | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/gallium/drivers/swr/Makefile.am b/src/gallium/drivers/swr/Makefile.am index c22f09e..8b31502 100644 ---

[Mesa-dev] [PATCH 00/21] OpenSWR batch change

Misc changes. Include: - fix KNL behavior with LLVm 6.0.0 - fix byte offset for non-indexed draws - fix 64-bit float handling with code generator - misc cleanup George Kyriazis (21): swr/rast: Fix byte offset for non-indexed draws swr: touch generated files to update timestamp swr/rast:

[Mesa-dev] [PATCH 01/21] swr/rast: Fix byte offset for non-indexed draws

for the case when USE_SIMD16_SHADERS == FALSE --- src/gallium/drivers/swr/rasterizer/core/frontend.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp index

[Mesa-dev] [PATCH 14/21] swr/rast: Cleanup old windows cruft.

--- src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp | 16 ++-- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp index 284eb27..bfc3e42 100644 ---

[Mesa-dev] [PATCH 09/21] swr/rast: Use different handing for stream masks

--- src/gallium/drivers/swr/rasterizer/common/os.h | 3 +++ src/gallium/drivers/swr/rasterizer/core/api.cpp | 4 ++-- src/gallium/drivers/swr/rasterizer/core/frontend.cpp| 6 +++--- src/gallium/drivers/swr/rasterizer/core/state.h | 2 +-

[Mesa-dev] [PATCH 04/21] swr/rast: Add some SIMD_T utility functors

VecEqual and VecHash --- .../drivers/swr/rasterizer/common/simdlib.hpp | 66 ++ 1 file changed, 66 insertions(+) diff --git a/src/gallium/drivers/swr/rasterizer/common/simdlib.hpp b/src/gallium/drivers/swr/rasterizer/common/simdlib.hpp index 4114645..24cf27d 100644 ---

[Mesa-dev] [PATCH 08/21] swr/rast: Silence warnings

--- src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp| 2 -- src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp| 1 - src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp | 3 ++- 3 files changed, 2 insertions(+), 4 deletions(-) diff

[Mesa-dev] [PATCH 13/21] swr/rast: Package events.proto with core output

However only if the file exists in DEBUG_OUTPUT_DIR. The expectation is that AR rasterizerLauncher will start placing it there when launching a workload (which is in a subsequent checkin) --- .../drivers/swr/rasterizer/archrast/archrast.cpp | 30 +-

[Mesa-dev] [PATCH] st: Choose a 2101010 format for GL_RGB/GL_RGBA with a 2_10_10_10 type.

GLES's GL_EXT_texture_type_2_10_10_10_REV allows uploading this type to an unsized internalformat, and it should be non-color-renderable. fbobject.c's implementation of the check for color-renderable is checks that the texture has a 2101010 mesa format, so make sure that we have chosen a 2101010

[Mesa-dev] [Bug 106231] llvmpipe blends produce bad code after llvm patch https://reviews.llvm.org/D44785

https://bugs.freedesktop.org/show_bug.cgi?id=106231 Roland Scheidegger changed: What|Removed |Added CC|

Re: [Mesa-dev] [PATCH v2 3/5] i965/clear: Remove an early return in fast_clear_depth

On Wed, Apr 25, 2018 at 11:43:23AM -0700, Rafael Antognolli wrote: > On Wed, Apr 25, 2018 at 11:40:15AM -0700, Nanley Chery wrote: > > On Wed, Apr 25, 2018 at 11:30:14AM -0700, Rafael Antognolli wrote: > > > On Tue, Apr 24, 2018 at 05:48:44PM -0700, Nanley Chery wrote: > > > > Reduce complexity

Re: [Mesa-dev] [PATCH] llvmpipe : Fixed an issue where the display target texture was mapped multiple times.

Am 20.04.2018 um 08:07 schrieb 정성찬: > Dear Roland Scheidegger > > Thank you very much for your time and efforts. > > First, I want to talk about the problem that I encountered. > I am currently developing a display server system using the llvmpipe driver > and the kms-dri winsys module. During

Re: [Mesa-dev] [PATCH v2 3/5] i965/clear: Remove an early return in fast_clear_depth

On Wed, Apr 25, 2018 at 11:40:15AM -0700, Nanley Chery wrote: > On Wed, Apr 25, 2018 at 11:30:14AM -0700, Rafael Antognolli wrote: > > On Tue, Apr 24, 2018 at 05:48:44PM -0700, Nanley Chery wrote: > > > Reduce complexity and allow the next patch to delete some code. With > > > this change, clear

Re: [Mesa-dev] [PATCH v2 3/5] i965/clear: Remove an early return in fast_clear_depth

On Wed, Apr 25, 2018 at 11:30:14AM -0700, Rafael Antognolli wrote: > On Tue, Apr 24, 2018 at 05:48:44PM -0700, Nanley Chery wrote: > > Reduce complexity and allow the next patch to delete some code. With > > this change, clear operations will still be skipped and setting the > > aux_state will

Re: [Mesa-dev] [PATCH v2 1/5] i965: Add and use a helper to update the indirect miptree color

This patch is Reviewed-by: Rafael Antognolli On Tue, Apr 24, 2018 at 05:48:42PM -0700, Nanley Chery wrote: > Split out this functionality to enable a fast-clear optimization for > color miptrees in the next commit. > > v2: Avoid the additional refactor (Jason). >

Re: [Mesa-dev] [PATCH v2 3/5] i965/clear: Remove an early return in fast_clear_depth

On Tue, Apr 24, 2018 at 05:48:44PM -0700, Nanley Chery wrote: > Reduce complexity and allow the next patch to delete some code. With > this change, clear operations will still be skipped and setting the > aux_state will cause no side-effects. It's going to skip the fast clear, but if I understood

[Mesa-dev] [PATCH] egl/x11: Send invalidate to the driver on dri2_copy_region

Similar to what is done in dri2_x11_swap_buffers_msc send invalidate to the driver because egl/X11 is not watching for for server's invalidate events. The dri2_copy_region path is trigerred when server supports DRI2 version minor 1. Tested with piglit egl tests for regression. Cc:

Re: [Mesa-dev] [PATCH] gallium/util: Fix incorrect refcounting of separate stencil.

On Wed, Apr 25, 2018 at 12:49 PM, Eric Anholt wrote: > The driver may have a reference on the separate stencil buffer for some > reason (like an unflushed job using it), so we can't directly free the > resource and should instead just decrement the refcount that we own. > Fixes

Re: [Mesa-dev] [PATCH] Intel: Add a Kaby Lake PCI ID

This patch is Reviewed-by: Rafael Antognolli On Wed, Apr 25, 2018 at 09:23:04AM -0700, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > v2: Branding changed > > Signed-off-by: Matt Atwood > --- >

[Mesa-dev] [PATCH] gallium/util: Fix incorrect refcounting of separate stencil.

The driver may have a reference on the separate stencil buffer for some reason (like an unflushed job using it), so we can't directly free the resource and should instead just decrement the refcount that we own. Fixes double-free in KHR-GLES3.packed_depth_stencil.blit.depth32f_stencil8 on vc5.

[Mesa-dev] [PATCH] Intel: Add a Kaby Lake PCI ID

From: Matt Atwood v2: Branding changed Signed-off-by: Matt Atwood --- include/pci_ids/i965_pci_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h index

Re: [Mesa-dev] [PATCH] meson: Fix with_intel_vk and with_amd_vk variables

Quoting Mike Lothian (2018-04-24 18:49:10) > Can you also add radeon to the amd one? That works on autotools > > On Wed, 25 Apr 2018 at 02:16 Jordan Justen wrote: > > Fixes: 5608d0a2cee "meson: use array type options" > Cc: Dylan Baker >

Re: [Mesa-dev] [PATCH] radv: set ac_surf_info::num_channels correctly

On 04/25/2018 05:11 PM, Bas Nieuwenhuizen wrote: Reviewed-by: Bas Nieuwenhuizen Do we want this in 18.1? Not sure if we have to, but we can backport it. I will run a full CTS before pushing all pending fixes. On Wed, Apr 25, 2018 at 11:22 AM, Samuel Pitoiset

Re: [Mesa-dev] [PATCH] radv: fix DCC enablement since partial MSAA implementation

On 04/25/2018 05:10 PM, Bas Nieuwenhuizen wrote: Oops. Yes, oops. :) Reviewed-by: Bas Nieuwenhuizen On Wed, Apr 25, 2018 at 10:56 AM, Samuel Pitoiset wrote: dcc_msaa_allowed is always false on GFX9+ and only true on VI if

[Mesa-dev] [PATCH v2] ac: fix texture query LOD for 1D textures on GFX9

1D textures are allocated as 2D which means we only need one coordinate for texture query LOD. v2: - move the fixup into ac_nir_to_llvm Fixes: 625dcbbc456 ("amd/common: pass address components individually to ac_build_image_intrinsic") Cc: 18.1 Signed-off-by:

Re: [Mesa-dev] [PATCH] clover: Fix host access validation for sub-buffer creation

On Wed, Apr 25, 2018 at 9:03 AM, Jan Vesely wrote: > On Thu, 2018-04-19 at 20:39 -0500, Aaron Watry wrote: >> From CL 1.2 Section 5.2.1: >> CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY and >> flags specify CL_MEM_HOST_READ_ONLY , or if

Re: [Mesa-dev] [PATCH] st/va: Fix typos

Reviewed-by: Leo Liu On 2018-04-25 11:32 AM, Drew Davenport wrote: s/attibute/attribute/ s/suface/surface/ --- src/gallium/state_trackers/va/surface.c | 48 - 1 file changed, 24 insertions(+), 24 deletions(-) diff --git

[Mesa-dev] [PATCH] radeon/vcn: fix mpeg4 msg buffer settings

From: Boyuan Zhang Previous bit-fields assignments are incorrect and will result certain mpeg4 decode failed due to wrong flag values. This patch fixes these assignments. Signed-off-by: Boyuan Zhang Reviewed-by: Leo Liu ---

[Mesa-dev] [PATCH] st/va: Fix typos

s/attibute/attribute/ s/suface/surface/ --- src/gallium/state_trackers/va/surface.c | 48 - 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/src/gallium/state_trackers/va/surface.c b/src/gallium/state_trackers/va/surface.c index 8604136944..1dc4466560

Re: [Mesa-dev] [PATCH] radv: set ac_surf_info::num_channels correctly

Reviewed-by: Bas Nieuwenhuizen Do we want this in 18.1? On Wed, Apr 25, 2018 at 11:22 AM, Samuel Pitoiset wrote: > num_channels has been introduced since "ac/surface: don't set > the display flag for obviously unsupported cases". > > Based

Re: [Mesa-dev] [PATCH] radv: fix DCC enablement since partial MSAA implementation

Oops. Reviewed-by: Bas Nieuwenhuizen On Wed, Apr 25, 2018 at 10:56 AM, Samuel Pitoiset wrote: > dcc_msaa_allowed is always false on GFX9+ and only true on VI > if RADV_PERFTEST=dccmsaa is set. This means DCC was disabled > in some situations

Re: [Mesa-dev] [PATCH] ac: fix texture query LOD for 1D textures on GFX9

On 25.04.2018 16:46, Samuel Pitoiset wrote: On 04/25/2018 04:10 PM, Nicolai Hähnle wrote: On 25.04.2018 11:58, Samuel Pitoiset wrote: 1D textures are allocated as 2D which means we only need one coordinate for texture query LOD. Fixes: 625dcbbc456 ("amd/common: pass address components

Re: [Mesa-dev] [PATCH] ac: fix texture query LOD for 1D textures on GFX9

On 04/25/2018 04:10 PM, Nicolai Hähnle wrote: On 25.04.2018 11:58, Samuel Pitoiset wrote: 1D textures are allocated as 2D which means we only need one coordinate for texture query LOD. Fixes: 625dcbbc456 ("amd/common: pass address components individually to ac_build_image_intrinsic") Cc:

Re: [Mesa-dev] [PATCH] ac: fix texture query LOD for 1D textures on GFX9

On 25.04.2018 11:58, Samuel Pitoiset wrote: 1D textures are allocated as 2D which means we only need one coordinate for texture query LOD. Fixes: 625dcbbc456 ("amd/common: pass address components individually to ac_build_image_intrinsic") Cc: 18.1

Re: [Mesa-dev] [PATCH 01/11] intel/compiler: lower 16-bit integer extended math instructions

Some of these comments may be duplicates of ones I made the first time through. On Wed, Apr 11, 2018 at 12:20 AM, Iago Toral Quiroga wrote: > The hardware doesn't support 16-bit integer types, so we need to implement > these using 32-bit integer instructions and then convert

Re: [Mesa-dev] [PATCH] clover: Fix host access validation for sub-buffer creation

On Thu, 2018-04-19 at 20:39 -0500, Aaron Watry wrote: > From CL 1.2 Section 5.2.1: > CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY and > flags specify CL_MEM_HOST_READ_ONLY , or if buffer was created with > CL_MEM_HOST_READ_ONLY and flags specify

Re: [Mesa-dev] [Mesa-stable] [PATCH v2] travis: update libva required version

On Wed, 2018-04-25 at 13:54 +0100, Emil Velikov wrote: > On 24 April 2018 at 08:49, Juan A. Suarez Romero wrote: > > On Fri, 2018-04-20 at 16:42 +0200, Juan A. Suarez Romero wrote: > > > Commit fa328456e8f29 added VP9 config support, but this needs a newer > > > libva

Re: [Mesa-dev] [PATCH i-g-t] [RFC] CONTRIBUTING: commit rights docs

On Wed, Apr 25, 2018 at 01:27:20PM +0100, Emil Velikov wrote: > On 24 April 2018 at 20:14, Daniel Vetter wrote: > > On Tue, Apr 24, 2018 at 7:30 PM, Emil Velikov > > wrote: > >> On 13 April 2018 at 11:00, Daniel Vetter

Re: [Mesa-dev] [Mesa-stable] [PATCH v2] travis: update libva required version

On 24 April 2018 at 08:49, Juan A. Suarez Romero wrote: > On Fri, 2018-04-20 at 16:42 +0200, Juan A. Suarez Romero wrote: >> Commit fa328456e8f29 added VP9 config support, but this needs a newer >> libva version, 1.7.0 or above. >> >> Fixes: fa328456e8f ("st/va: add VP9

Re: [Mesa-dev] [PATCH v2] travis: update libva required version

This is: Reviewed-by: Andres Gomez On Fri, 2018-04-20 at 16:42 +0200, Juan A. Suarez Romero wrote: > Commit fa328456e8f29 added VP9 config support, but this needs a newer > libva version, 1.7.0 or above. > > Fixes: fa328456e8f ("st/va: add VP9 config to enable profile2") >

Re: [Mesa-dev] [PATCH 03/11] i965/compiler: handle conversion to smaller type in the lowering pass for that

On April 25, 2018 02:04:03 Iago Toral wrote: On Tue, 2018-04-24 at 07:58 -0700, Jason Ekstrand wrote: On Wed, Apr 11, 2018 at 12:20 AM, Iago Toral Quiroga wrote: The lowering pass was specialized to act on 64-bit to 32-bit conversions only, but the

Re: [Mesa-dev] [PATCH 1/3] nir: support converting to 8-bit integers in nir_type_conversion_op

On April 25, 2018 05:14:17 Karol Herbst wrote: Signed-off-by: Karol Herbst --- src/compiler/nir/nir_opcodes_c.py | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_opcodes_c.py

Re: [Mesa-dev] [PATCH 2/3] nir: print 8 and 16 bit constants correctly

Making the float comment thing work with 16-bit would be cool. R-b anyway. On April 25, 2018 05:14:18 Karol Herbst wrote: Signed-off-by: Karol Herbst --- src/compiler/nir/nir_print.c | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-)

Re: [Mesa-dev] [PATCH 3/3] nir/opt_constant_folding: fix folding of 8 and 16 bit ints

Rb On April 25, 2018 05:14:20 Karol Herbst wrote: Signed-off-by: Karol Herbst --- src/compiler/nir/nir_opt_constant_folding.c | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir_opt_constant_folding.c

Re: [Mesa-dev] [PATCH 2/3] nir: print 8 and 16 bit constants correctly

On Wed, Apr 25, 2018 at 5:14 AM, Karol Herbst wrote: > Signed-off-by: Karol Herbst Reviewed-by: Rob Clark > --- > src/compiler/nir/nir_print.c | 14 -- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH i-g-t] [RFC] CONTRIBUTING: commit rights docs

On 24 April 2018 at 20:14, Daniel Vetter wrote: > On Tue, Apr 24, 2018 at 7:30 PM, Emil Velikov > wrote: >> On 13 April 2018 at 11:00, Daniel Vetter wrote: >>> This tries to align with the X.org communities's

Re: [Mesa-dev] [PATCH 3/3] nir/opt_constant_folding: fix folding of 8 and 16 bit ints

On Wed, Apr 25, 2018 at 1:50 PM, Chema Casanova wrote: > I've already got to the same code addressing Jason feedback about > "[PATCH 06/11] nir/constant_folding: support 16-bit constants." > okay, will push then as soon as possible, so that you don't have to wait. > So

[Mesa-dev] [PATCH] spirv: convert the shift operand for bitwise shift ops to uint32

SPIR-V allows to define the shift operand for shift opcodes with a bit-size different than 32 bits, but in NIR the opcodes have that limitation. As agreed in the mailing list, this patch adds a conversion to 32 bits to fix this. For more info, see:

Re: [Mesa-dev] [PATCH 06/11] nir/constant_folding: support 16-bit constants

El 24/04/18 a las 23:52, Jason Ekstrand escribió: > On Wed, Apr 11, 2018 at 12:20 AM, Iago Toral Quiroga > wrote: > > From: Jose Maria Casanova Crespo > > > --- >  

Re: [Mesa-dev] [PATCH] egl/android: remove flink name support

Hey Emil & Chih-Wei, On 04/24/2018 01:59 PM, Emil Velikov wrote: On 24 April 2018 at 12:28, Emil Velikov wrote: On the topic of keeping the old code behind a #define or just removing it, it'll be great if interested parties can reach a consensus. Actually one can

Re: [Mesa-dev] [PATCH 3/3] nir/opt_constant_folding: fix folding of 8 and 16 bit ints

I've already got to the same code addressing Jason feedback about "[PATCH 06/11] nir/constant_folding: support 16-bit constants." So this is: Reviewed-by: Jose Maria Casanova Crespo El 25/04/18 a las 11:14, Karol Herbst escribió: > Signed-off-by: Karol Herbst

Re: [Mesa-dev] [PATCH 1/3] nir: support converting to 8-bit integers in nir_type_conversion_op

Reviewed-by: Jose Maria Casanova Crespo El 25/04/18 a las 11:14, Karol Herbst escribió: > Signed-off-by: Karol Herbst > --- > src/compiler/nir/nir_opcodes_c.py | 7 ++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git

[Mesa-dev] [Bug 105494] UT2004 cube map reflection problem

https://bugs.freedesktop.org/show_bug.cgi?id=105494 --- Comment #5 from Denis --- hello. I can confirm the same behavior with a pond and on i965 driver (on KBL and SNB cpu's). I also tried to find mesa version without the issue, but I couldn't. Tested on 18.1.0 and

Re: [Mesa-dev] [PATCH 0/2] i965: Add support for fp16 <-> fp64 conversions

These two patches are still unreviewed. Sam On 13/04/18 07:30, Samuel Iglesias Gonsálvez wrote: > Hello, > > This series implements support for doing fp16 <-> fp64 conversions on > i965. The PRM says we need to do an intermediate conversion to a 32 bit > type. > > This patch series applies on

Re: [Mesa-dev] [PATCH] spirv: Don’t check for NaN for most OpFOrd* comparisons

Thanks Neil! Reviewed-by: Iago Toral Quiroga Maybe we need other drivers (radv?) to double-check that this doesn't break stuff for them either? Iago On Tue, 2018-04-24 at 16:55 +0200, Neil Roberts wrote: > For all of the OpFOrd* comparisons except OpFOrdNotEqual the

Re: [Mesa-dev] NIR issue with SPIRV ops that have operands with different bit-size

Thanks to all for the opinions. I'm going to implement the conversion then. Sam On 24/04/18 15:45, Jason Ekstrand wrote: > On Tue, Apr 24, 2018 at 6:42 AM, Ian Romanick > wrote: > > On 04/24/2018 05:44 AM, Rob Clark wrote: > > On

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