On Tue, 2019-08-06 at 21:39 -0500, Aaron Watry wrote:
> I had come up with an almost identical patch last night, but hadn't
> gotten around to testing it before turning in.
>
> Reviewed-by: Aaron Watry
Thanks both to you and Dieter.
I've pushed the patch.
Jan
>
> On Tue, Aug 6, 2019 at 12:59
Reviewed-by: Marek Olšák
Marek
On Tue, Aug 6, 2019 at 8:21 PM Timothy Arceri wrote:
> ---
> src/mesa/main/shaderapi.c | 5 -
> 1 file changed, 5 deletions(-)
>
> diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
> index 1351f7fd06f..607d30e2bd4 100644
> ---
Do you know why global buffers are in the compute state and not in the
context?
Marek
On Tue, Aug 6, 2019 at 10:50 PM Dieter Nützel wrote:
> Am 20.06.2019 20:44, schrieb Jan Vesely:
> > On Sat, 2019-06-15 at 07:38 +0200, Dieter Nützel wrote:
> >> Am 14.06.2019 08:13, schrieb Jan Vesely:
> >> >
For the first two:
Reviewed-by: Marek Olšák
Marek
On Tue, Aug 6, 2019 at 11:06 PM Ilia Mirkin wrote:
> Both AMD and NVIDIA hardware define it this way. Instead of replicating
> the logic everywhere, just fix it up in one place.
>
> Signed-off-by: Ilia Mirkin
> ---
>
> I'm open to also not
It's possible that I misread the spec, because the format qualifier looked
imprecise. Feel free to fix this.
Marek
On Tue, Aug 6, 2019 at 8:10 PM Ilia Mirkin wrote:
> Hi Pierre-Eric,
>
> I see you recently added EXT_shader_image_load_store - nice. It seems
> like you're relying on the
Signed-off-by: Ilia Mirkin
---
.../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 10 ++
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
This debug situation is unforunate. debug_printf only does something
with DEBUG set, but in practice all that needs to be moved to !NDEBUG.
For now, use _debug_printf which always prints. However the whole
function is guarded by !NDEBUG.
Signed-off-by: Ilia Mirkin
---
There's no reason to bring format-less load requirement into this
extension. It requires a size to be provided, and a compatible format is
computed from the size + data type. For example
layout(size1x32) uniform iimage1D image;
becomes
DCL IMAGE[0], 1D, PIPE_FORMAT_R32_SINT, WR
whereas
Both AMD and NVIDIA hardware define it this way. Instead of replicating
the logic everywhere, just fix it up in one place.
Signed-off-by: Ilia Mirkin
---
I'm open to also not doing this. Just seems like it'll make our
collective lives a little easier, since this is what the hw wants (and
Am 20.06.2019 20:44, schrieb Jan Vesely:
On Sat, 2019-06-15 at 07:38 +0200, Dieter Nützel wrote:
Am 14.06.2019 08:13, schrieb Jan Vesely:
> On Thu, 2019-06-13 at 21:20 +0200, Dieter Nützel wrote:
> > Blender crash as expected ;-)
> >
> > /home/dieter> trying to save userpref at
> >
I had come up with an almost identical patch last night, but hadn't
gotten around to testing it before turning in.
Reviewed-by: Aaron Watry
On Tue, Aug 6, 2019 at 12:59 PM Jan Vesely wrote:
>
> v2: Drop special case of llvm-9
> Signed-off-by: Jan Vesely
> ---
>
Back from vacation try to bring all stuff on par - LLVM 10 (with Clover)
- and boom...
Acked-by: Dieter Nützel
Tested-by: Dieter Nützel
Thank you Jan!
Dieter
Am 06.08.2019 19:59, schrieb Jan Vesely:
v2: Drop special case of llvm-9
Signed-off-by: Jan Vesely
---
---
src/mesa/main/shaderapi.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index 1351f7fd06f..607d30e2bd4 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -29,11 +29,6 @@
*
* Implementation of
Hi Pierre-Eric,
I see you recently added EXT_shader_image_load_store - nice. It seems
like you're relying on the format-less read access feature to make it
happen:
+ extensions->EXT_shader_image_load_store &=
+ screen->get_param(screen, PIPE_CAP_IMAGE_LOAD_FORMATTED);
Can you elaborate
https://bugs.freedesktop.org/show_bug.cgi?id=111309
Eric Engestrom changed:
What|Removed |Added
CC||bri...@vmware.com,
https://bugs.freedesktop.org/show_bug.cgi?id=111309
Bug ID: 111309
Summary: Mesa doesn't build with current Scons version (3.1.0)
Product: Mesa
Version: git
Hardware: All
OS: All
Status: NEW
Severity:
Alright, you win ;) R-b!
On Tue, Aug 06, 2019 at 05:06:32PM +0200, Tomeu Vizoso wrote:
> On Tue, 6 Aug 2019 at 16:58, Alyssa Rosenzweig wrote:
> >
> > > Android should be fine, as they use it in their own code.
> >
> > Hmm, still uncomfortable, but tentative R-b I guess :/
> >
> > I just..
https://bugs.freedesktop.org/show_bug.cgi?id=111308
--- Comment #2 from Ian Romanick ---
Another thing to try... does changing 'flt' to '~flt' make any difference?
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https://bugs.freedesktop.org/show_bug.cgi?id=111308
Ian Romanick changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #1 from Ian
v2: Drop special case of llvm-9
Signed-off-by: Jan Vesely
---
src/gallium/state_trackers/clover/llvm/compat.hpp | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/gallium/state_trackers/clover/llvm/compat.hpp
b/src/gallium/state_trackers/clover/llvm/compat.hpp
Signed-off-by: Jan Vesely
---
src/gallium/state_trackers/clover/llvm/compat.hpp | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/state_trackers/clover/llvm/compat.hpp
b/src/gallium/state_trackers/clover/llvm/compat.hpp
index 0ecf622a9af..b273abf75af
https://bugs.freedesktop.org/show_bug.cgi?id=111308
Bug ID: 111308
Summary: [Regression, NIR, bisected] Black squares in Unigine
Heaven via DXVK
Product: Mesa
Version: git
Hardware: Other
OS: All
https://bugs.freedesktop.org/show_bug.cgi?id=111288
--- Comment #5 from Greg ---
Mentioned memory regions can also be seen when replaying the trace,
accumulating up to 116.
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On Tue, 6 Aug 2019 at 16:58, Alyssa Rosenzweig wrote:
>
> > Android should be fine, as they use it in their own code.
>
> Hmm, still uncomfortable, but tentative R-b I guess :/
>
> I just.. don't like relying on glibc specific behaviour. Even if bionic
> implements it too, I mean... what
https://bugs.freedesktop.org/show_bug.cgi?id=111288
--- Comment #4 from Greg ---
Created attachment 144957
--> https://bugs.freedesktop.org/attachment.cgi?id=144957=edit
terminal output of `apitrace replay mine.trace`
Also not sure if it's important, but when replaying this trace I get lots
R-b but already been pushed.. please use my Collabora email so I see
stuff on time! :)
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> Android should be fine, as they use it in their own code.
Hmm, still uncomfortable, but tentative R-b I guess :/
I just.. don't like relying on glibc specific behaviour. Even if bionic
implements it too, I mean... what happens for the postmarketOS guys?
They've been interested in Panfrost
> Yeah, there's the wastage you describe, but we are currently wasting
> several megs so it's a vast improvement in this regard.
Ah, touche.
> For more fine-grained performance and memory usage improvements, I
> think we should track these kind of regressions in CI, or we'll
> struggle to
https://bugs.freedesktop.org/show_bug.cgi?id=111288
--- Comment #3 from Greg ---
Ok, here it is
https://drive.google.com/file/d/1D3GNUW-DTaxI7hFEZmoEnucRQOrzNBAR/view?usp=sharing
That's fresh trace (i've lost old one), way smaller this time. Apitrace leaks
doesn't find much, yet by the end of
https://bugs.freedesktop.org/show_bug.cgi?id=111288
--- Comment #2 from Denis ---
Hi Greg, could you please re-upload apitrace somewhere instead of BZ? Looks
like it is too big and can't be opened. (google drive or any other file-sharing
system will be ok I think).
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You are receiving this
https://bugs.freedesktop.org/show_bug.cgi?id=111306
Bug ID: 111306
Summary: gbm creates BO with wrong pitch when
dri3_get_modifiers returns modifiers, causing
drmModeAddFB2WithModifiers to fail
Product: Mesa
These tests have been fixed by:
b514f411837b ("glcpp: use pre-expansion line number for __LINE__")
Signed-off-by: Tomeu Vizoso
---
src/gallium/drivers/panfrost/ci/expected-failures.txt | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/gallium/drivers/panfrost/ci/expected-failures.txt
https://bugs.freedesktop.org/show_bug.cgi?id=111027
Bas Nieuwenhuizen changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On Mon, 5 Aug 2019 at 19:06, Alyssa Rosenzweig wrote:
>
> I didn't know about %m, nifty.
>
> I don't think this is portable, though... which might be a problem
> if/when someone tries to port Android, etc.
Android should be fine, as they use it in their own code.
Cheers,
Tomeu
>
> On Mon, Aug
On Mon, 5 Aug 2019 at 19:06, Alyssa Rosenzweig wrote:
>
> > +if (screen->kernel_version >= 1) {
>
> Maybe have some #defines for kernel versions instead of magic numbers?
> Also, maybe make it clear that this is a minor version -- what does
> happen if we bump the major version at some
On Mon, 5 Aug 2019 at 19:01, Alyssa Rosenzweig wrote:
>
> > +for (unsigned c = 0; c < 4; ++c) {
> > +struct panfrost_blend_rt *rt = >rt[c];
> > +_mesa_hash_table_u64_clear(rt->shaders,
> > panfrost_delete_blend_shader);
> > +}
>
> What's the
https://bugs.freedesktop.org/show_bug.cgi?id=111302
Turo Lamminen changed:
What|Removed |Added
Status|NEEDINFO|NEW
--- Comment #2 from Turo Lamminen
https://bugs.freedesktop.org/show_bug.cgi?id=111302
Bas Nieuwenhuizen changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #1 from Bas
https://bugs.freedesktop.org/show_bug.cgi?id=111303
Bug ID: 111303
Summary: DoW3 performance is consistently lower than nvidia
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity:
https://bugs.freedesktop.org/show_bug.cgi?id=111302
Bug ID: 111302
Summary: radv assertion failed on SI cards `reg >=
SI_CONTEXT_REG_OFFSET && reg < SI_CONFIG_REG_END'
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
On Mon, 5 Aug 2019 at 19:01, Alyssa Rosenzweig wrote:
>
> What's the implication of this for Panfrost? (I.e. which patch/es in the
> series are pending on this change)
Patch 2 needs this, otherwise we SIGSEGV on context destruction if
blend shaders are used. And patch 3 depends on patch 5,
On Thu, Aug 1, 2019 at 8:15 PM Boris Brezillon
wrote:
>
> +Marek (looks like I forgot to Cc you on this v6 :-/).
>
> On Mon, 22 Jul 2019 09:49:31 +0200
> Boris Brezillon wrote:
>
> > Hi Qiang,
> >
> > On Sun, 21 Jul 2019 17:02:54 +0800
> > Qiang Yu wrote:
> >
> > > On Mon, Jul 15, 2019 at 8:50
Hello,
The preliminary schedule for XDC 2019 has been published!
https://xdc2019.x.org/event/5/timetable/#20191002.detailed
XDC 2019 will take place at the Concordia University Conference Centre
in Montréal, Canada on October 2-4, 2019. If you haven't already done
so, now is the time to book
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