Reviewed-by: Bas Nieuwenhuizen
for the series.
On Fri, Jan 25, 2019 at 9:19 AM Samuel Pitoiset
wrote:
>
> Instead of using this useless array_params_mask variable.
> This should set these two attributes to streamout buffers too.
>
> Signed-off-by: Samuel Pitoiset
> ---
On Mon, Jan 28, 2019 at 9:38 AM Eduardo Lima Mitev wrote:
>
> On 1/26/19 5:34 PM, Jason Ekstrand wrote:
> > Mind suffixing it with _ir3 or something since it's a back-end-specific
> > intrinsic? Incidentally, this looks a lot like load_image_param_intel.
> >
>
> Yes, I felt inclined to add the
Reviewed-by: Bas Nieuwenhuizen
On Thu, Jan 24, 2019 at 6:02 AM Timothy Arceri wrote:
>
> Fixes: b722b29f10d4 ("radv: add support for 16bit input/output")
> ---
>
> Compile tested only. Noticed when passing by.
>
> src/amd/common/ac_nir_to_llvm.c | 2 +-
>
Reviewed-by: Bas Nieuwenhuizen
On Wed, Jan 23, 2019 at 10:26 AM Samuel Pitoiset
wrote:
>
> Streamout buffers are emitted like push constants.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_nir_to_llvm.c | 3 +++
> 1 file changed, 3 insertions(+)
>
>
Reviewed-by: Bas Nieuwenhuizen
On Tue, Jan 22, 2019 at 7:27 PM Samuel Pitoiset
wrote:
>
> For example, if a pipeline has two stages VS and FS. And if only
> the fragment stage needs dynamic bindings, we shouldn't allocate
> an extra user SGPR for the vertex stage. Of course, i
On Tue, Jan 22, 2019 at 4:32 PM Samuel Pitoiset
wrote:
>
> For some R8 formats, it's useless to export two channels
> when no alpha blending is used. I assume the CB should
> automatically clamps its inputs.
>
> 29077 shaders in 15096 tests
> Totals:
> SGPRS: 1321106 -> 1320970 (-0.01 %)
> VGPRS:
Reviewed-by: Bas Nieuwenhuizen
On Tue, Jan 22, 2019 at 10:20 PM Kristian Høgsberg wrote:
>
> On Tue, Jan 22, 2019 at 11:45 AM Rob Clark wrote:
> >
> > Normally modifiers take precendence over use flags, as they are more
> > explicit. But if the driver supports modifie
Reviewed-by: Bas Nieuwenhuizen
On Mon, Jan 21, 2019 at 11:38 PM Jason Ekstrand wrote:
>
> Fixes: 63b9aa2e2574 "spirv: Add support for using derefs for..."
> ---
> src/compiler/nir/nir_lower_phis_to_scalar.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletio
Reviewed-by: Bas Nieuwenhuizen
On Sat, Jan 19, 2019 at 2:56 PM Rhys Perry wrote:
>
> It's common in some applications to bind a new graphics pipeline without
> ending up changing any context registers.
>
> This has a pipline have two command buffers: one for setting context
>
RADV_FROM_HANDLE(radv_buffer, buffer,
> pCounterBuffers[counter_buffer_idx]);
> @@ -4999,6 +5014,8 @@ void radv_CmdEndTransformFeedbackEXT(
> * that the primitives-emitted query won't increment.
> */
> radeon_set_context
Not really a fan of the whole renaming thing due to the blame and
cherrypicking churn, but a bunch of these are long overdue. The series
is
Reviewed-by: Bas Nieuwenhuizen
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https
Ack, patches 1-6 are
Reviewed-by: Bas Nieuwenhuizen
On Sat, Jan 19, 2019 at 2:08 AM Marek Olšák wrote:
>
> On Fri, Jan 18, 2019 at 6:05 PM Bas Nieuwenhuizen
> wrote:
>>
>> On Fri, Jan 18, 2019 at 5:44 PM Marek Olšák wrote:
>> >
>> > From: Marek Olšák
On Sat, Jan 19, 2019 at 2:10 AM Marek Olšák wrote:
>
> On Fri, Jan 18, 2019 at 6:08 PM Bas Nieuwenhuizen
> wrote:
>>
>> On Fri, Jan 18, 2019 at 5:44 PM Marek Olšák wrote:
>> >
>> > From: Marek Olšák
>> >
>> > ---
>> > sr
On Sat, Jan 19, 2019 at 12:27 AM Bas Nieuwenhuizen
wrote:
> On Sat, Jan 19, 2019 at 12:17 AM Timothy Arceri wrote:
> >
> >
> >
> > On 19/1/19 9:36 am, Bas Nieuwenhuizen wrote:
> > > On Thu, Jan 10, 2019 at 6:59 AM Timothy Arceri
> > > wrote:
> &
Fair, r-b
On Sat, Jan 19, 2019 at 12:17 AM Timothy Arceri wrote:
>
>
>
> On 19/1/19 9:36 am, Bas Nieuwenhuizen wrote:
> > On Thu, Jan 10, 2019 at 6:59 AM Timothy Arceri
> > wrote:
> >>
> >> This builds on the recent interpolate fix by Rhys ee8488ea
On Fri, Jan 18, 2019 at 5:44 PM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ---
> src/gallium/auxiliary/Makefile.sources | 1 +
> src/gallium/auxiliary/meson.build | 1 +
> src/gallium/auxiliary/util/u_cpu_suballoc.h | 90 +
> 3 files changed, 92
On Fri, Jan 18, 2019 at 5:44 PM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ---
> src/gallium/drivers/radeonsi/si_buffer.c | 27
> src/gallium/drivers/radeonsi/si_pipe.h | 1 +
> 2 files changed, 28 insertions(+)
>
> diff --git
ilder, array_idx,
> offset, "");
> + deref_instr = nir_src_as_deref(deref_instr->parent);
> + } else if (deref_instr->deref_type == nir_deref_type_struct) {
> + /* TODO: Probably need to do more here to support
Reviewed-by: Bas Nieuwenhuizen
for the series.
On Thu, Jan 17, 2019 at 6:08 PM Samuel Pitoiset
wrote:
>
> Totally useless to write the descriptors inside the loop.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 47 ++--
Besides CTS, I'd appreciate if you can test with Talos, as that was
the msot affected by bugs in this code.
Otherwise,
Reviewed-by: Bas Nieuwenhuizen
On Mon, Jan 14, 2019 at 5:02 PM Rhys Perry wrote:
>
> It's common in some applications to bind a new graphics pipeline without
>
On Mon, Jan 14, 2019 at 5:12 PM Rhys Perry wrote:
>
> I did and found small improvements in Rise of the Tomb Raider. I
> measured framerates ~104.3% that of without the changes for the
> Geothermal Valley scene, ~101.2% for Spine of the Mountain and ~102.3%
> for Prophets Tomb.
My main question
On Tue, Jan 15, 2019 at 10:59 PM Rhys Perry wrote:
>
> DXVK often sets dynamic state without actually changing it.
>
> Signed-off-by: Rhys Perry
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 92 ++--
> 1 file changed, 76 insertions(+), 16 deletions(-)
>
> diff --git
Reviewed-by: Bas Nieuwenhuizen
On Tue, Jan 15, 2019 at 12:33 AM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ported from AMDVLK.
>
> Cc: 18.3
> ---
> src/gallium/drivers/radeonsi/si_state_draw.c | 25 +++-
> 1 file changed, 14 insertions(+), 11
On Mon, Jan 14, 2019 at 5:55 PM Samuel Pitoiset
wrote:
>
> Fix crashes with
> dEQP-VK.spirv_assembly.instruction.compute.workgroup_memory.*16
>
> v2: - add INT16/UINT16 too
> - update commit description
>
> Signed-off-by: Samuel Pitoiset
> Reviewed-by: Bas Nieuw
Reviewed-by: Bas Nieuwenhuizen
On Mon, Jan 14, 2019 at 1:49 PM Samuel Pitoiset
wrote:
>
> Fix a crash with
> dEQP-VK.spirv_assembly.instruction.compute.workgroup_memory.float16
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_nir_to_llvm.c | 2 ++
> 1 fi
On Wed, Jan 9, 2019, 2:37 PM Samuel Pitoiset A simple Vulkan extension that allows apps to query size and
> usage of all exposed memory heaps.
>
> The different usage values are not really accurate because
> they are per drm-fd, but they should be close enough.
>
> v3: - use atomic operations in
I think this is done with
https://patchwork.freedesktop.org/series/55025/
?
On Sat, Jan 12, 2019 at 12:53 AM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ---
> src/amd/common/ac_llvm_build.c | 18 +-
> .../drivers/radeonsi/si_shader_tgsi_mem.c | 4 ++--
>
On Thu, Dec 20, 2018 at 8:05 PM Rhys Perry wrote:
>
> Fixes: f4e499ec79 ('radv: add initial non-conformant radv vulkan driver')
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107986
> Signed-off-by: Rhys Perry
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 59
Reviewed-by: Bas Nieuwenhuizen
for both.
On Thu, Jan 10, 2019 at 11:26 PM Nicolai Hähnle wrote:
>
> From: Nicolai Hähnle
>
> Only on LLVM 8.0+, which supports the new intrinsic.
> ---
> src/amd/common/ac_llvm_build.c | 10 +++---
> 1 file changed, 7 inser
Reviewed-by: Bas Nieuwenhuizen
On Wed, Jan 9, 2019 at 10:03 AM Samuel Pitoiset
wrote:
>
> Loosely based on RadeonSI.
>
> v2: - do not check for indexed draws
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 13 +
> 1
On Tue, Jan 8, 2019 at 5:17 PM Marek Olšák wrote:
>
> From: Marek Olšák
>
> We have found some pipe_surface leaks internally.
>
> This is the same code as surface_destroy in radeonsi.
> Ideally, surface_destroy would be in pipe_screen.
> No, pipe_surfaces are not context objects.
>
> Cc: 18.3
I think this got fixed by
https://gitlab.freedesktop.org/mesa/mesa/commit/be6cee51c06dc72ac159bd75b4201c61952515bd
already?
On Tue, Jan 8, 2019 at 12:28 AM Timothy Arceri wrote:
>
> Cc: Marek Olšák
> ---
> src/amd/common/ac_nir_to_llvm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2
On Mon, Jan 7, 2019 at 6:20 PM Samuel Pitoiset
wrote:
>
>
> On 1/7/19 6:06 PM, Alex Smith wrote:
>
> Hi Samuel,
>
> Thanks for implementing this - I've been wanting this extension for a while
> so it's good it's finally available.
>
> This is just reporting the total heap sizes as the budget,
On Mon, Jan 7, 2019 at 2:45 PM Samuel Pitoiset
wrote:
>
> Loosely based on RadeonSI.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c
>
On Mon, Jan 7, 2019 at 1:23 PM Tapani Pälli wrote:
>
>
>
> On 1/7/19 1:28 PM, Bas Nieuwenhuizen wrote:
> > On Mon, Jan 7, 2019 at 11:54 AM Tapani Pälli wrote:
> >>
> >>
> >>
> >> On 1/7/19 11:56 AM, Bas Nieuwenhuizen wrote:
> >
On Mon, Jan 7, 2019 at 11:54 AM Tapani Pälli wrote:
>
>
>
> On 1/7/19 11:56 AM, Bas Nieuwenhuizen wrote:
> > On Wed, Dec 5, 2018 at 1:05 PM Tapani Pälli wrote:
> >>
> >>
> >>
> >> On 12/5/18 2:00 PM, Bas Nieuwenhuizen wrote:
> >&
On Wed, Dec 5, 2018 at 1:05 PM Tapani Pälli wrote:
>
>
>
> On 12/5/18 2:00 PM, Bas Nieuwenhuizen wrote:
> > On Wed, Dec 5, 2018 at 12:51 PM Tapani Pälli wrote:
> >>
> >>
> >>
> >> On 12/5/18 1:44 PM, Bas Nieuwenhuizen wrote:
> >&
Reviewed-by: Bas Nieuwenhuizen
On Mon, Jan 7, 2019 at 12:35 AM Timothy Arceri wrote:
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109231
> ---
> src/compiler/nir/nir_loop_analyze.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --g
On Thu, Jan 3, 2019 at 6:59 PM Jason Ekstrand wrote:
>
> On Thu, Jan 3, 2019 at 3:39 AM Erik Faye-Lund
> wrote:
>>
>> On Wed, 2019-01-02 at 10:16 -0600, Jason Ekstrand wrote:
>> > On Wed, Jan 2, 2019 at 9:43 AM Ilia Mirkin
>> > wrote:
>> > > Have a look at the first 4 patches in the series
On Sat, Dec 29, 2018 at 5:23 PM Jan Vesely wrote:
>
> On Wed, 2018-12-26 at 15:26 +, Eric Engestrom wrote:
> > On Tuesday, 2018-12-25 23:09:53 +0100, Jan Vesely wrote:
> > > Guess my meson-fu is still pretty weak.
> > > Now I see the build failure again:
> > > In file included from
We started using it in the btoi paths for r32g32b32, and the LLVM IR
checker will complain about it because we end up with intrinsics with
the wrong type extension in the name.
Fixes: 593996bc02 ("radv: implement buffer to image operations for R32G32B32")
---
src/amd/common/ac_nir_to_llvm.c | 19
Happy to have this patch, but all descriptions and comments say this
is an optimization
Can we get some comment that this avoids hangs?
Otherwise
Reviewed-by: Bas Nieuwenhuizen
On Thu, Dec 20, 2018 at 3:23 PM Samuel Pitoiset
wrote:
>
> This fixes GPU hangs on GFX9 with
Is not ideal but will have to do for now
Reviewed-by: Bas Nieuwenhuizen
On Thu, Dec 20, 2018 at 12:01 PM Samuel Pitoiset
wrote:
>
> The driver needs to decompress all image layers if a fast
> depth/color clear has been performed.
>
> Signed-off-by: Samuel Pitoiset
> ---
On Tue, Dec 18, 2018, 9:57 PM Samuel Pitoiset We don't ever want to do the fmask lookup on a atomic or
> store, the fmask should have been decompressed if the
> surface has been moved to IMAGE_LAYOUT.
>
Clarify the description to be a *storage* image layout?
>
> Original patch by Dave Airlie.
>
Reviewed-by: Bas Nieuwenhuizen
On Wed, Dec 19, 2018, 6:13 PM Samuel Pitoiset This workaround has been introduced by 135e4d434f6 for fixing
> DXVK GPU hangs with many games. It is no longer needed since
> LLVM r345718.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vu
Exactly what title says, the new addrlib does not allow the above with
certain dimensions that the CTS seems to hit. Work around it by not
allowing the app to render to it via compat with other 128bpp formats
and do not render to it ourselves during copies.
Fixes: 776b9113656 "amd/addrlib:
cating a non-renderable
surface without driver changes goes against actual usage?
>
> Marek
>
> On Tue, Dec 18, 2018 at 12:50 PM Haehnle, Nicolai
> wrote:
>>
>> On 18.12.18 18:36, Bas Nieuwenhuizen wrote:
>> > Hi Nicolai,
>> >
>> > I happened to b
Reviewed-by: Bas Nieuwenhuizen
On Wed, Dec 19, 2018 at 11:05 PM Jason Ekstrand wrote:
>
> Fixes: 44227453ec03f "nir: Switch to using 1-bit Booleans for almost..."
> Reviewed-by: Rhys Perry
> ---
> src/amd/vulkan/radv_query.c | 42 ++
ice *device)
> return num_db;
> }
>
> +
> +static nir_ssa_def *nir_flag_set(nir_builder *b, nir_ssa_def *flags,
> uint32_t flag)
Can I ask you to rename this to something like nir_test_flag?
nir_flag_set would first make me think of the verb in imperative,
which would result in
Hi Nicolai,
I happened to be writing something similar which also fixes up radv to
never render to those surfaces as r32g32b32a32:
https://patchwork.freedesktop.org/series/54172/ I can split out the
radv specific stuff and this one is r-b after than.
Thanks,
Bas
On Tue, Dec 18, 2018 at 5:37 PM
Exactly what title says, the new addrlib does not allow the above with
certain dimensions that the CTS seems to hit. Work around it by not
allowing the app to render to it via compat with other 128bpp formats
and do not render to it ourselves during copies.
Fixes: 776b9113656 "amd/addrlib:
On Mon, Dec 17, 2018 at 6:33 PM Juan A. Suarez Romero
wrote:
>
> On Mon, 2018-12-03 at 10:21 +, Eric Engestrom wrote:
> > Cc: Emil Velikov
> > Cc: Andres Gomez
> > Cc: Juan A. Suarez Romero
> > Cc: Dylan Baker
> > Signed-off-by: Eric Engestrom
> > ---
> > This patch depends on the
Reviewed-by: Bas Nieuwenhuizen
On Sun, Dec 16, 2018 at 7:59 AM Jason Ekstrand wrote:
>
> ---
> src/amd/vulkan/radv_shader_info.c | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_shader_info.c
> b/src/amd/vulk
Reviewed-by: Bas Nieuwenhuizen
On Fri, Dec 14, 2018 at 7:32 PM Rhys Perry wrote:
>
> Fixes: f8d5b377c8b ('radv: set cb base tile swizzles for MRT speedups (v4)')
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108116
> Signed-off-by: Rhys Perry
> ---
> Unfortunat
On Thu, Dec 13, 2018 at 4:52 PM Alex Deucher wrote:
>
> On Wed, Dec 12, 2018 at 3:42 AM Samuel Pitoiset
> wrote:
> >
> > Personally, I will continue to use the list, at least for a simplicity
> > point of view. I'm not sure if using a new tool will improve quality and
> > code review process.
>
Reviewed-by: Bas Nieuwenhuizen
for both.
On Wed, Dec 12, 2018 at 2:13 PM Samuel Pitoiset
wrote:
>
> This is always TRUE if htile_size is not 0.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_image.c | 1 -
> 1 file changed, 1 deletion(-)
>
>
On Wed, Dec 12, 2018 at 8:59 PM Marek Olšák wrote:
>
> There are 2 issues with meson:
> * -DDEBUG is not present in debugoptimized builds.
Do people expect -DDEBUG for debugoptimized? I would think that debug
optimized would be an optimized build with debug symbols, but not
expensive checks &
On Wed, Dec 12, 2018 at 1:06 AM Jason Ekstrand wrote:
>
> Ping?
>
> I see about 5 acks/reviews, 3 of which are from Intel which doesn't exactly
> seem like overwhelming consensus. However, we also haven't had any debate in
> a while.
FWIW, I'm fine with it too.
Acked-by:
On Sat, Dec 8, 2018 at 7:03 PM Rhys Perry wrote:
>
> A small number of questions/concerns:
>
> - sampleLocationCoordinateRange[1] should probably be set to 0.9375,
> because of how the sample locations are encoded
> - gl_SamplePosition doesn't seem like it would return the new sample
>
Reviewed-by: Bas Nieuwenhuizen
On Wed, Dec 5, 2018 at 4:44 PM Eric Engestrom wrote:
>
> Added in 824cfc1ee5e0aba15b676 "radv: rework the TC-compat HTILE
> hardware bug with COND_EXEC", but it is unused.
>
> Signed-off-by: Eric Engestrom
> ---
> src/amd/vulkan/ra
On Wed, Dec 5, 2018 at 2:14 PM Samuel Pitoiset
wrote:
>
> Nothing to do, the compiler already handles that.
>
> All new dEQP.VK.ubo.* and dEQP.VK.ssbo.* pass, except some
> 16-bit tests that are quite related to fdo bug #108114.
>
> Signed-off-by: Samuel Pitoiset
> ---
>
On Wed, Dec 5, 2018 at 12:51 PM Tapani Pälli wrote:
>
>
>
> On 12/5/18 1:44 PM, Bas Nieuwenhuizen wrote:
> > On Wed, Dec 5, 2018 at 12:37 PM Tapani Pälli wrote:
> >>
> >>
> >>
> >> On 12/5/18 1:22 PM, Bas Nieuwenhuizen wrote:
> >&
On Wed, Dec 5, 2018 at 12:37 PM Tapani Pälli wrote:
>
>
>
> On 12/5/18 1:22 PM, Bas Nieuwenhuizen wrote:
> > On Wed, Dec 5, 2018 at 12:15 PM Tapani Pälli wrote:
> >>
> >>
> >>
> >> On 12/5/18 1:01 PM, Bas Nieuwenhuizen wrote:
> >>
On Wed, Dec 5, 2018 at 12:15 PM Tapani Pälli wrote:
>
>
>
> On 12/5/18 1:01 PM, Bas Nieuwenhuizen wrote:
> > On Fri, Sep 7, 2018 at 12:54 AM Kevin Strasser
> > wrote:
> >>
> >> Android P and earlier expect that the surface supports storage image
On Fri, Sep 7, 2018 at 12:54 AM Kevin Strasser wrote:
>
> Android P and earlier expect that the surface supports storage images, and
> so many of the tests fail when the framework checks for that support. The
> framework also includes various image format and usage combinations that are
> invalid
Reviewed-by: Bas Nieuwenhuizen
On Wed, Dec 5, 2018 at 11:43 AM Samuel Pitoiset
wrote:
>
> In case we are unlucky if the low part is 0x.
>
> Fixes: 5d6a560a29 ("radv: do not use the availability bit for timestamp
> queries")
> Signed-off-by: Samuel Pitoi
We do the ImageFormatProperties check already, and rejecting an usage
flag when both ImageFormatProperties and the WSI (which is Android)
support it is not allowed.
Intel does support storage for some of the support WSI formats, such
as R8G8B8A8_UNORM, and looking at the
On Tue, Dec 4, 2018 at 4:52 PM Samuel Pitoiset
wrote:
>
> Because WAIT_REG_MEM can only wait for a 32-bit value, it's not
> safe to use it for timestamp queries. If we only wait on the low
> 32 bits of a timestamp query we could be unlucky and the GPU
> might hang.
>
> One possible fix is to emit
This just broke for me locally:
../mesa/src/mesa/state_tracker/st_glsl_to_tgsi.cpp: In member function
‘virtual void glsl_to_tgsi_visitor::visit(ir_call*)’:
../mesa/src/mesa/state_tracker/st_glsl_to_tgsi.cpp:4075:9: error:
‘ir_intrinsic_begin_fragment_shader_ordering’ was not declared in this
ce->instance->debug_flags &
> RADV_DEBUG_NO_HIZ)) {
> - radv_image_alloc_htile(image);
> image->tc_compatible_htile =
> image->surface.flags & RADEON_SURF_TC_C
On Mon, Dec 3, 2018 at 7:30 PM Jan Vesely wrote:
>
> On Mon, 2018-12-03 at 10:21 +, Eric Engestrom wrote:
> > Cc: Emil Velikov
> > Cc: Andres Gomez
> > Cc: Juan A. Suarez Romero
> > Cc: Dylan Baker
> > Signed-off-by: Eric Engestrom
> > ---
> > This patch depends on the releasing
On Fri, Nov 30, 2018 at 10:29 PM Jason Ekstrand wrote:
>
> On Fri, Nov 30, 2018 at 3:18 PM Ian Romanick wrote:
>>
>> On 11/29/2018 07:47 AM, Connor Abbott wrote:
>> > On Thu, Nov 29, 2018 at 4:22 PM Jason Ekstrand
>> > wrote:
>> >>
>> >> Can you provide some context for this? Those rules are
Reviewed-by: Bas Nieuwenhuizen
for the series. Any plans with the newly gotten GDS/OA support?
On Tue, Nov 27, 2018 at 2:57 AM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ---
> src/gallium/drivers/radeonsi/si_pipe.c | 46 ++
> src/gallium/drivers/
On Mon, Nov 26, 2018 at 8:54 PM Marek Olšák wrote:
>
> On Mon, Nov 26, 2018 at 8:46 AM Bas Nieuwenhuizen wrote:
>>
>> patches 4-7 are
>>
>> Reviewed-by: Bas Nieuwenhuizen
>>
>> though I agree with Christian that it would be nice to get a case
&
On Mon, 26 Nov 2018, 20:48 Marek Olšák You increase both virtual and physical alignment. Are you sure it's
> necessary to increase the physical alignment?
>
Hence the v2 which should not do that.
>
> Marek
>
> On Sun, Nov 25, 2018 at 11:13 PM Bas Nieuwenhuizen <
>
One place to put the logic makes things easier to change.
---
src/amd/vulkan/radv_image.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 7c0ecb89661..c459e81379b 100644
---
These days we don't always allocate scanout compatible textures anymore.
That does mean we have to fix the radv android WSI though.
Fixes: b1444c9ccb0 "radv: Implement VK_ANDROID_native_buffer."
---
src/amd/vulkan/radv_android.c | 73 ++-
Fixes: b1444c9ccb0 "radv: Implement VK_ANDROID_native_buffer."
---
src/amd/vulkan/radv_android.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_android.c b/src/amd/vulkan/radv_android.c
index f5d70825dd2..93799b87b8f 100644
---
patches 4-7 are
Reviewed-by: Bas Nieuwenhuizen
though I agree with Christian that it would be nice to get a case
where 7 improves things before we submit it.
For patches 1-3 I need to dive into the slab allocator before I have
enough knowledge to review.
On Sat, Nov 24, 2018 at 12:41 AM Marek
Reviewed-by: Bas Nieuwenhuizen
On Sat, Nov 24, 2018 at 12:34 AM Marek Olšák wrote:
>
> From: Marek Olšák
>
> no change in behavior.
> ---
> src/gallium/drivers/radeonsi/si_pipe.c | 27 +++---
> 1 file changed, 16 insertions(+), 11 deletions(-)
>
&g
Reviewed-by: Bas Nieuwenhuizen
for both.
On Mon, Nov 26, 2018 at 5:14 AM Eric Engestrom wrote:
>
> Scons and autotools don't define it, and as of last commit nothing
> uses it.
>
> `VERSION` is also a generic enough name that something somewhere will
> eventually clash,
Reviewed-by: Bas Nieuwenhuizen
On Mon, Nov 26, 2018 at 5:14 AM Lionel Landwerlin
wrote:
>
> On 23/11/2018 19:47, Eric Engestrom wrote:
> > Per chapter 3.2 "Instances":
> >> Providing a NULL VkInstanceCreateInfo::pApplicationInfo or providing
> >> an ap
Reviewed-by: Bas Nieuwenhuizen
On Fri, Nov 23, 2018 at 5:04 PM Samuel Pitoiset
wrote:
>
> Apparently some games allocate depth buffers without rendering
> to them, this will avoid wasting memory if that image usage
> flag is not set.
>
> Signed-off-by: Samuel Pitoiset
>
Improves performance in Talos by about 15% (and significant improvements
in RotR and possibly other but did not bench with final patch) on
kernel 4.19 and earlier.
On 4.20+ a similar effect comes from
433ca054949a "drm/amdgpu: try allocating VRAM as power of two"
v2: Do not impact the alignment
Improves performance in Talos by about 15% (and significant improvements
in RotR and possibly other but did not bench with final patch) on
kernel 4.19 and earlier.
On 4.20+ a similar effect comes from
433ca054949a "drm/amdgpu: try allocating VRAM as power of two"
Given the simplicity of the
Mirrors AMDVLK. Looks like if we go over the alignment of height
we actually start to change the addressing. Seems like the extra
miplevels actually work with this.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108245
Fixes: f6cc15dccd5 "radv/gfx9: fix block compression texture views.
We used the layer count which results in an off by one error.
Not sure this really affects anything.
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
---
src/amd/vulkan/radv_image.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Reviewed-by: Bas Nieuwenhuizen
for both
On Fri, Nov 23, 2018 at 7:53 PM Marek Olšák wrote:
>
> Ping
>
> On Mon, Nov 19, 2018 at 6:24 PM Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> Cc: 18.2 18.3
>> ---
>> src/gallium/winsys/amdgpu/
Fixes: ffa15861ef7c924a33e1f "radv: UseEnumerateInstanceVersion for the
> default version."
>
> Bas, I double-checked the spec and Niklas is right; why did you change
> it to use the icd version instead? Was is fixing an issue somewhere?
Copying behavior from ANV ;)
No ob
Reviewed-by: Bas Nieuwenhuizen
for both.
On Fri, Nov 23, 2018 at 9:45 AM Samuel Pitoiset
wrote:
>
> We really need to refactor this...
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_pass.c | 10 ++
> 1 file changed, 10 insertions(+)
>
>
So to complicate things, drawing with DCC enabled also compresses
things again. (maybe set it on framebuffer CB emit time?)
On Thu, Nov 22, 2018 at 1:47 PM Samuel Pitoiset
wrote:
>
> It's somehow similar to the FCE predicate.
>
> Signed-off-by: Samuel Pitoiset
> ---
>
rc1")
> +binop_compare("fne", tfloat, commutative, "!isnan(src0) && !isnan(src1) &&
> src0 == src1")
> +binop_compare("fltu", tfloat, "", "!(src0 >= src1)")
> +binop_compare("fgeu", tfloat, "", &q
On Wed, Nov 21, 2018 at 9:33 PM Marek Olšák wrote:
>
> See what Gustaw said. Other than that:
>
> Reviewed-by: Marek Olšák
With that change:
Reviewed-by: Bas Nieuwenhuizen
Tested-by: Bas Nieuwenhuizen
>
> Marek
>
> On Wed, Nov 21, 2018 at 10:21 AM Nicolai Hähnle wr
Reviewed-by: Bas Nieuwenhuizen
On Wed, Nov 21, 2018 at 11:32 AM Samuel Pitoiset
wrote:
>
> 'post_flush' is only set to NULL for the normal clear path
> (ie. only vkCmdClearColorImage() and vkCmdClearDepthStencilImage()
> are affected commands).
>
> Because these t
Since apps also have to follow the ImageFormatProperties query,
we can disallow formats that don't allow image stores (for AMD
that would be SRGB formats).
Note that this only affects anything if the app actually decides
to use the flag.
Had someone ask for this on IRC and at least on the AMD
Reviewed-by: Bas Nieuwenhuizen
On Tue, Nov 20, 2018 at 4:41 PM Samuel Pitoiset
wrote:
>
> Unnecessary as they allow the app to call vkCmdPipelineBarrier()
> inside the render pass.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_pass.c | 10 ++
Reviewed-by: Bas Nieuwenhuizen
On Tue, Nov 20, 2018 at 9:58 AM Samuel Pitoiset
wrote:
>
> Fixes an assertion in SoTTR.
>
> Fixes: dd0172e865 ("radv: Use structured intrinsics instead of indexing
> workaround for GFX9.")
> Signed-off-by: Samuel Pitoiset
> ---
>
;
>> > On Mon, Nov 19, 2018 at 7:15 PM Bas Nieuwenhuizen
>> > wrote:
>> >>
>> >> So I tried to test this with radv and got a bunch of crashes in CTS,
>> >> mostly around 3d image support:
>> >>
>> >> #3 0x771
So I tried to test this with radv and got a bunch of crashes in CTS,
mostly around 3d image support:
#3 0x771a9396 in __assert_fail () from /usr/lib/libc.so.6
#4 0x769da3b4 in
Addr::V2::Gfx9Lib::HwlGetPreferredSurfaceSetting (this=0x57661b30,
pIn=0x7fffd5f0,
Reviewed-by: Bas Nieuwenhuizen
On Mon, Nov 19, 2018 at 4:39 PM Jason Ekstrand wrote:
>
> ---
> include/vulkan/vulkan_core.h | 35 ---
> src/vulkan/registry/vk.xml | 84 +---
> 2 files changed, 98 insertions(+), 21 deletions(-)
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