Re: [Mesa-dev] [PATCHv2] glx: fix non-dri build

it just return NULL in that case. Fixes: 84f764a7591 "glxglvnddispatch: Add missing dispatch for GetDriverConfig Seems sensible to me and thank you for fixing this up after me :) : Reviewed-by: Hans de Goede <hdego...@redhat.com> Regards, Hans --- Difference between v1 a

Re: [Mesa-dev] [PATCH] glxglvnddispatch: Add missing dispatch for GetDriverConfig

Hi, On 17-05-17 14:57, Emil Velikov wrote: On 16 May 2017 at 22:42, Hans de Goede <hdego...@redhat.com> wrote: Hi, On 05/16/2017 07:51 PM, Emil Velikov wrote: Hi Hans Please poke if patches fall through the cracks. On 20 March 2017 at 11:05, Hans de Goede <hdego...@redhat.c

Re: [Mesa-dev] [PATCH] glxglvnddispatch: Add missing dispatch for GetDriverConfig

Hi, On 05/16/2017 07:51 PM, Emil Velikov wrote: Hi Hans Please poke if patches fall through the cracks. On 20 March 2017 at 11:05, Hans de Goede <hdego...@redhat.com> wrote: Together with some fixes to xdriinfo this fixes xdriinfo not working with glvnd. Since apps (xdriinfo)

[Mesa-dev] [PATCH] glxglvnddispatch: Add missing dispatch for GetDriverConfig

then any other dispatch function. This patch gets the job done, but I'm not really happy with how this patch turned out, suggestions for a better fix are welcome. Cc: Kyle Brenneman <kbrenne...@nvidia.com> Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/glx/g_glxglvnddispatchfu

Re: [Mesa-dev] [PATCH mesa v2] glx: add GLXdispatchIndex sort check

Hi, On 22-02-17 12:24, Eric Engestrom wrote: Signed-off-by: Eric Engestrom --- v2: make sure the list is in the order C's strcmp uses (Ilia) Ilia: I used LC_ALL instead of LANG, as it takes precedence (ie. LANG=C in this script would be overridden by

Re: [Mesa-dev] [PATCH] glx/glvnd: Fix GLXdispatchIndex sorting

Hi Emil, On 16-02-17 16:38, Emil Velikov wrote: Hi Hans, On 6 February 2017 at 13:09, Hans de Goede <hdego...@redhat.com> wrote: Commit 8bca8d89ef3b ("glx/glvnd: Fix dispatch function names and indices") fixed the sorting of the array initializers in g_glxglvnddispatc

[Mesa-dev] [PATCH] glx/glvnd: Fix GLXdispatchIndex sorting

ot; <mesa-sta...@lists.freedesktop.org> Cc: "17.0" <mesa-sta...@lists.freedesktop.org> Cc: Adam Jackson <a...@redhat.com> Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/glx/g_glxglvnddispatchindices.h | 8 1 file changed, 4 insertions(+), 4 deletio

Re: [Mesa-dev] [PATCH v2 0/4] gallium/winsys/kms: Fix issues with prime import

/winsys/kms: Move display target handle lookup to separate function (v2) gallium/winsys/kms: Look up the GEM handle after importing a prime FD (v2) Series looks good to me and is: Reviewed-by: Hans de Goede <hdego...@redhat.com> Regards,

Re: [Mesa-dev] [PATCH] nv50/ir: add missing string for SV_WORK_DIM

Hi, On 12-07-16 14:17, Samuel Pitoiset wrote: Fixes: 2aa1197 ("nouveau: Add support for SV_WORK_DIM") Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Oops, thanks for catching this. Reviewed-by: Hans de Goede <hdego...@redhat.com> Regards, Hans --

Re: [Mesa-dev] [PATCH v2 4/4] nouveau: Add support for SV_WORK_DIM

Hi, On 29-06-16 15:41, Ilia Mirkin wrote: On Wed, Jun 29, 2016 at 8:37 AM, Hans de Goede <hdego...@redhat.com> wrote: Add support for SV_WORK_DIM for nvc0 and nve4. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2 -Use new NVC0_CB_AUX_GRID_INFO(i) version C

Re: [Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

Hi, On 29-06-16 15:57, Samuel Pitoiset wrote: On 06/29/2016 03:55 PM, Hans de Goede wrote: Hi, On 29-06-16 15:27, Ilia Mirkin wrote: For those of us who are lazy and forgetful (i.e. me), can you remind the difference between auto_ptr and unique_ptr? IIRC unique_ptr is more like scoped_ptr

Re: [Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

the patch), I found the 2nd answer here: http://stackoverflow.com/questions/3697686/why-is-auto-ptr-being-deprecated To be the best / clearest explanation and I used that to choose unique_ptr as replacement. Regards, Hans On Wed, Jun 29, 2016 at 8:38 AM, Hans de Goede <hdego...@redhat.

[Mesa-dev] [PATCH v2 2/3] nouveau: Fix a couple of "foo may be used uninitialized' compiler warnings

this. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 4 ++-- src/gallium/drivers/nouveau/nouveau_compiler.c| 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v2 1/4] tgsi: Add WORK_DIM System Value

Add a new WORK_DIM SV type, this is will return the grid dimensions (1-4) for compute (opencl) kernels. This is necessary to implement the opencl get_work_dim() function. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -No changes Changes in v1 (first non RFC): -Do

[Mesa-dev] [PATCH v2 2/4] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

In order to implement get_work_dim() the driver may need to know the clEnqueueNDRangeKernel() work_dim parameter, so pass it to the driver. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -No changes --- src/gallium/include/pipe/p_state.h| 7 ++

[Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_util.h | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h index 7b0de85..c619499

[Mesa-dev] [PATCH v2 3/4] nvc0: Make NVC0_CB_AUX_GRID_INFO take an index argument

This brings it inline with the other macros like NVC0_CB_AUX_UBO_INFO and NVC0_CB_AUX_TEX_INFO. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -New patch in v2 of this patch-set --- src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 2 +- src/gallium/drivers/nouvea

[Mesa-dev] [PATCH v2 3/3] nv30: Fix "array subscript is below array bounds" compiler warning

gcc6 does not like the trick where we point to one entry before the array start and then start a while with a pre-increment. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/nv30/nv30_transfer.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff

[Mesa-dev] [PATCH v2 4/4] nouveau: Add support for SV_WORK_DIM

Add support for SV_WORK_DIM for nvc0 and nve4. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2 -Use new NVC0_CB_AUX_GRID_INFO(i) version Changes in v1 (first non RFC posting): -Adjust NVC0_CB_AUX_GRID_SIZE for the extra value in grid-info -Use NVC0_CB_AUX_GRID_SIZE i

[Mesa-dev] [PATCH v2 0/4] tgsi/nouveau: Add WORK_DIM support

Hi All, After being busy with other stuff I'm now back to mostly working on opencl for nouveau. So here is the long overdue v2 of my patchset for adding WORK_DIM support. See the individual patch commit messages for the changes from v1. Regards, Hans

Re: [Mesa-dev] [PATCH resend] pipe_loader_sw: Fix fd leak when instantiated via pipe_loader_sw_probe_kms

Hi, On 27-05-16 16:24, Emil Velikov wrote: Hi Hans, On 27 May 2016 at 15:06, Hans de Goede <hdego...@redhat.com> wrote: Make pipe_loader_sw_probe_kms take ownership of the passed in fd, like pipe_loader_drm_probe_fd does. The only caller is dri_kms_init_screen which passes in a dup

[Mesa-dev] [PATCH resend] pipe_loader_sw: Fix fd leak when instantiated via pipe_loader_sw_probe_kms

Make pipe_loader_sw_probe_kms take ownership of the passed in fd, like pipe_loader_drm_probe_fd does. The only caller is dri_kms_init_screen which passes in a dupped fd, just like dri2_init_screen passes in a dupped fd to pipe_loader_drm_probe_fd. Signed-off-by: Hans de Goede <hd

Re: [Mesa-dev] [PATCH 1/2] nvc0/ir: avoid generating illegal instructions for compute constbuf loads

Hi, On 26-05-16 14:43, Ilia Mirkin wrote: On Thu, May 26, 2016 at 8:41 AM, Hans de Goede <hdego...@redhat.com> wrote: Hi, On 26-05-16 04:44, Ilia Mirkin wrote: For user-supplied constbufs, fileIndex is 0. In that case, when we subtract 1, we'll end up loading from constbuf offs

Re: [Mesa-dev] [PATCH 1/2] nvc0/ir: avoid generating illegal instructions for compute constbuf loads

Hi, On 26-05-16 04:44, Ilia Mirkin wrote: For user-supplied constbufs, fileIndex is 0. In that case, when we subtract 1, we'll end up loading from constbuf offset -16. This is illegal, and there are asserts to avoid it. Normally we'd just DCE it, but no point in generating the instructions if

Re: [Mesa-dev] [PATCH] Revert "i965: Always use Y-tiled buffers on SKL+"

as it actually explains the root cause (I just git bisected down to this commit to get my system to work again), so lets go with yours, and add my: Tested-by: Hans de Goede <hdego...@redhat.com> Regards, Hans Cheers, Daniel On Sunday, 8 May 2016, Hans de Goede <hdego...@redhat.com <

[Mesa-dev] [PATCH] pipe_loader_sw: Fix fd leak when instantiated via pipe_loader_sw_probe_kms

Make pipe_loader_sw_probe_kms take ownership of the passed in fd, like pipe_loader_drm_probe_fd does. The only caller is dri_kms_init_screen which passes in a dupped fd, just like dri2_init_screen passes in a dupped fd to pipe_loader_drm_probe_fd. Signed-off-by: Hans de Goede <hd

[Mesa-dev] [PATCH] Revert "i965: Always use Y-tiled buffers on SKL+"

return FALSE; } } Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 4 ++-- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 10 ++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 +--

[Mesa-dev] [PATCH 2/3] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

In order to implement get_work_dim() the driver may need to know the clEnqueueNDRangeKernel() work_dim parameter, so pass it to the driver. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/include/pipe/p_state.h| 7 +++ src/gallium/state_trackers/clove

[Mesa-dev] [PATCH 3/3] nouveau: Add support for SV_WORK_DIM

Add support for SV_WORK_DIM for nvc0 and nve4. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v1 (first non RFC posting): -Adjust NVC0_CB_AUX_GRID_SIZE for the extra value in grid-info -Use NVC0_CB_AUX_GRID_SIZE instead of a hardcoded value when uploading the grid info

[Mesa-dev] [PATCH 1/3] tgsi: Add WORK_DIM System Value

Add a new WORK_DIM SV type, this is will return the grid dimensions (1-4) for compute (opencl) kernels. This is necessary to implement the opencl get_work_dim() function. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v1 (first non RFC): -Document TGSI_SEMANTIC_WORK_DIM

Re: [Mesa-dev] [RFC 1/3] tgsi: Add WORK_DIM System Value

Hi, On 28-04-16 10:13, Pierre Moreau wrote: On 05:43 PM - Apr 27 2016, Samuel Pitoiset wrote: On 04/27/2016 05:24 PM, Ilia Mirkin wrote: On Wed, Apr 27, 2016 at 11:19 AM, Hans de Goede <hdego...@redhat.com> wrote: Hi, On 27-04-16 16:49, Ilia Mirkin wrote: Please add this semantic

Re: [Mesa-dev] [RFC 1/3] tgsi: Add WORK_DIM System Value

ds, Hans Is this the equivalent of gl_LocalGroupSizeARB from GL_ARB_compute_variable_group_size ? [which is basically the same as gl_WorkGroupSize, but allowed to be specified at dispatch time] On Wed, Apr 27, 2016 at 10:43 AM, Hans de Goede <hdego...@redhat.com> wrote: Add a new WORK_DIM SV type, this

[Mesa-dev] [RFC 2/3] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

In order to implement get_work_dim() the driver may need to know the clEnqueueNDRangeKernel() work_dim parameter, so pass it to the driver. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/include/pipe/p_state.h| 7 +++ src/gallium/state_trackers/clove

[Mesa-dev] [RFC 3/3] nouveau: codegen: Add support for SV_WORK_DIM

Add support for SV_WORK_DIM. Note this is only implemented for nve4 for now, hence this patch being RFC. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp

[Mesa-dev] [RFC 1/3] tgsi: Add WORK_DIM System Value

Add a new WORK_DIM SV type, this is will return the grid dimensions (1-4) for compute (opencl) kernels. This is necessary to implement the opencl get_work_dim() function. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/auxiliary/tgsi/tgsi_strings.c | 1 + src/gallium/i

Re: [Mesa-dev] [PATCH] nvc0: stick compute kernel arguments into uniform_bo

but it should not hurt anything because the states are dirtied and date will get reuploaded. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Good to see this cleaned up and the patch looks good to me: Reviewed-by: Hans de Goede <hdego...@redhat.com> Regards, Hans ---

Re: [Mesa-dev] [PATCH] nouveau: codegen: combineLd/St do not combine indirect loads

Hi, On 24-04-16 23:35, Ilia Mirkin wrote: On Fri, Apr 22, 2016 at 7:06 AM, Hans de Goede <hdego...@redhat.com> wrote: folding indirect add into offset ld src 0x2dda328 ind0 0x27ca558 add def0 0x27ca558 2 ref value 0x27ca558, indirect -1 -1 file 1 size 4 st u32 # g[%r70+0x0] %r38 (

Re: [Mesa-dev] [PATCH mesa v2] nouveau: codegen: combineLd/St do not combine indirect loads

Hi, On 22-04-16 22:11, Ilia Mirkin wrote: Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> Thanks, pushed. What about the series to add swizzling suffix support for the resource argument to LOAD ? Regards, Hans On Fri, Apr 22, 2016 at 7:07 AM, Hans de Goede <hdego...@redhat.c

[Mesa-dev] [PATCH mesa v2] nouveau: codegen: combineLd/St do not combine indirect loads

loads / stores as combining indirect loads / stores may break alignment rules. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -Only check for indirect loads/stores in the compute case --- src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 7 +++ 1 file c

Re: [Mesa-dev] [PATCH] nouveau: codegen: combineLd/St do not combine indirect loads

Hi, On 21-04-16 17:52, Ilia Mirkin wrote: On Thu, Apr 21, 2016 at 11:40 AM, Hans de Goede <hdego...@redhat.com> wrote: Hi, On 21-04-16 17:09, Samuel Pitoiset wrote: On 04/21/2016 04:46 PM, Hans de Goede wrote: Hi, On 21-04-16 16:28, Ilia Mirkin wrote: On Thu, Apr 21, 2016 at 9

Re: [Mesa-dev] [PATCH mesa v2 3/3] nouveau: codegen: LOAD: Take src swizzle into account

Hi, On 22-04-16 10:37, Marek Olšák wrote: On Fri, Apr 22, 2016 at 9:23 AM, Hans de Goede <hdego...@redhat.com> wrote: Hi, On 22-04-16 09:08, Marek Olšák wrote: On Thu, Apr 21, 2016 at 7:04 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: [+radeon folk] Marek, Nicolai, Bas -

Re: [Mesa-dev] [PATCH mesa v2 3/3] nouveau: codegen: LOAD: Take src swizzle into account

Hi, On 22-04-16 09:08, Marek Olšák wrote: On Thu, Apr 21, 2016 at 7:04 PM, Ilia Mirkin wrote: [+radeon folk] Marek, Nicolai, Bas - please have a look at the doc change and let us know if you think this will cause a problem for radeon. Hans is solving the issue that he

Re: [Mesa-dev] [PATCH] nouveau: codegen: combineLd/St do not combine indirect loads

Hi, On 21-04-16 17:09, Samuel Pitoiset wrote: On 04/21/2016 04:46 PM, Hans de Goede wrote: Hi, On 21-04-16 16:28, Ilia Mirkin wrote: On Thu, Apr 21, 2016 at 9:55 AM, Hans de Goede <hdego...@redhat.com> wrote: combineLd/St would combine, i.e. : st u32 # g[$r2+0x0] $r2 st u32 # g[$

Re: [Mesa-dev] [PATCH] nouveau: codegen: combineLd/St do not combine indirect loads

Hi, On 21-04-16 16:28, Ilia Mirkin wrote: On Thu, Apr 21, 2016 at 9:55 AM, Hans de Goede <hdego...@redhat.com> wrote: combineLd/St would combine, i.e. : st u32 # g[$r2+0x0] $r2 st u32 # g[$r2+0x4] $r3 into: st u64 # g[$r2+0x0] $r2d But this is only valid if r2 contains an 8 byte a

[Mesa-dev] [PATCH] nouveau: codegen: combineLd/St do not combine indirect loads

as combining indirect loads / stores may break alignment rules. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peepho

[Mesa-dev] [PATCH mesa v2 1/3] nouveau: codegen: LOAD: Always use component 0 when getting the address

LOAD loads upto 4 components from the specified resource starting at the passed in x value of the 2nd source operand, the y, z and w components of the address should not be used. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -New patch in v2 of this patch-set --

[Mesa-dev] [PATCH mesa v2 3/3] nouveau: codegen: LOAD: Take src swizzle into account

for the 1st source operand, which allows using: LOAD TEMP[0].y, MEMORY[0]., TEMP[0] And actually getting the desired behavior Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -Tweaked commit msg a bit -Add documentation for this to src/gallium/docs/source/tgsi.rst --

[Mesa-dev] [PATCH mesa v2 2/3] nouveau: codegen: LOAD: Do not call fetchSrc(1) if the address is immediate

"off" later gets set to NULL when the address is immediate, so move the fetchSrc(1) call to the non-immediate branch of the if-else. This brings handleLOAD's offset handling inline with how it is done in handleSTORE. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes i

Re: [Mesa-dev] [PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers

Hi, On 15-04-16 00:29, Samuel Pitoiset wrote: On 04/12/2016 12:04 PM, Hans de Goede wrote: Hi, On 08-04-16 18:14, Samuel Pitoiset wrote: On 04/08/2016 12:17 PM, Hans de Goede wrote: Hi, On 23-03-16 23:10, Samuel Pitoiset wrote: Are you sure this won't break compute shaders on fermi

Re: [Mesa-dev] [PATCH] nvc0/lowering: Handle conversions to U64/S64 manually

Hi, On 17-04-16 22:27, Pierre Moreau wrote: On 04:17 PM - Apr 17 2016, Ilia Mirkin wrote: On Sun, Apr 17, 2016 at 4:07 PM, Pierre Moreau wrote: Ping :-) On 10:56 PM - Mar 19 2016, Pierre Moreau wrote: Generating a `cvt u32 $r0 u64 $r1d` or a `cvt u64 $r0d u32 $r2`

Re: [Mesa-dev] [RFC 04/24] nvc0: bind images on 3D shaders for Kepler

Hi, On 15-04-16 00:01, Samuel Pitoiset wrote: On 04/14/2016 08:03 PM, Pierre Moreau wrote: On 01:56 AM - Apr 13 2016, Samuel Pitoiset wrote: Similar to surfaces validation for compute shaders. Signed-off-by: Samuel Pitoiset ---

Re: [Mesa-dev] [PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers

Hi, On 08-04-16 18:14, Samuel Pitoiset wrote: On 04/08/2016 12:17 PM, Hans de Goede wrote: Hi, On 23-03-16 23:10, Samuel Pitoiset wrote: Are you sure this won't break compute shaders on fermi? Could you please double-check that? I just checked: lspci: 01:00.0 VGA compatible controller

[Mesa-dev] [PATCH] nouveau: Add missing PIPE_SHADER_CAP_INTEGERS to get_shader_param()

Add missing PIPE_SHADER_CAP_INTEGERS for frag shaders to nv30_screen_get_shader_param(). Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/nv30/nv30_screen.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c

Re: [Mesa-dev] [Nouveau] [PATCH] nouveau: codegen: Take src swizzle into account on loads

Hi, On 08-04-16 18:06, Hans de Goede wrote: Hi, On 08-04-16 17:45, Ilia Mirkin wrote: On Fri, Apr 8, 2016 at 11:28 AM, Hans de Goede <hdego...@redhat.com> wrote: When dealing with non vector variables the llvm register allocator will use TEMP[0].x then TEMP[0].y, etc. When loading som

Re: [Mesa-dev] [PATCH] nouveau: codegen: Take src swizzle into account on loads

Hi, On 08-04-16 17:45, Ilia Mirkin wrote: On Fri, Apr 8, 2016 at 11:28 AM, Hans de Goede <hdego...@redhat.com> wrote: When dealing with non vector variables the llvm register allocator will use TEMP[0].x then TEMP[0].y, etc. When loading something from a global buffer it will cal

Re: [Mesa-dev] [PATCH] nouveau: codegen: Take src swizzle into account on loads

Hi, On 08-04-16 17:02, Ilia Mirkin wrote: On Fri, Apr 8, 2016 at 5:27 AM, Hans de Goede <hdego...@redhat.com> wrote: Hi, On 07-04-16 15:58, Ilia Mirkin wrote: That's wrong. It used to work with the old RES[] code and if one cannot specify a source swizzle, then how can I do som

Re: [Mesa-dev] [PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers

run -o shader -t '.*arb_shader_storage_buffer_object.*' results/shader [9/9] pass: 9 / Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -New patch in v2 of patch-set to re-enable support for global opencl buffers --- src/gallium/drivers/nouveau/codegen/nv5

Re: [Mesa-dev] [PATCH] nouveau: codegen: Take src swizzle into account on loads

., TEMP[0] Regards, Hans On Thu, Apr 7, 2016 at 9:27 AM, Hans de Goede <hdego...@redhat.com> wrote: The llvm TGSI backend does things like: Expecting the data at address TEMP[0].x to get loaded to TEMP[0].y. Before this commit the data at TEMP[0].x + 4 would be loaded instead

[Mesa-dev] [PATCH] nouveau: codegen: Take src swizzle into account on loads

The llvm TGSI backend does things like: LOAD TEMP[0].y, MEMORY[0]., TEMP[0].x Expecting the data at address TEMP[0].x to get loaded to TEMP[0].y. Before this commit the data at TEMP[0].x + 4 would be loaded instead. This commit fixes this. Signed-off-by: Hans de Goede <hdego...@redhat.

Re: [Mesa-dev] [PATCH 01/10] tgsi: add Texture and Format to tgsi_instruction_memory

Hi Ilia On 20-03-16 21:17, Ilia Mirkin wrote: Hi Nicolai, Looks like this results in uninitialized formats when parsing text, so a shader which looks like this: I already have a fix for this ready:

[Mesa-dev] [PATCH mesa v2 1/3] nouveau: codegen: Disable more old resource handling code

eption due to trying to access the now always zero-sized resources vector. Disable all the dead code. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -Split out assert() on getFile() != BUFFER/MEMORY into a separate patch -Split out removal of TGSI_RESOURCE_* defines into

[Mesa-dev] [PATCH mesa v2 2/3] nouveau: codegen: Do not silently fail in handeLOAD / handleSTORE / handleATOM

handeLOAD / handleSTORE / handleATOM can only handle TGSI_FILE_BUFFER and TGSI_FILE_MEMORY. Make things fail explictly when another register-file is used in these functions. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -Split out of "nouveau: codegen: Disab

Re: [Mesa-dev] [RFC mesa] nouveau: Add support for OpenCL global memory buffers

Hi, On 14-03-16 21:50, Samuel Pitoiset wrote: Btw, do you need someone with commit access to push your previous series (the tgsi thing)? I can do this for you. Thanks for the offer. IIRC Ilia wanted some minor fixes there, so I'll do a v2 tomorrow. Talking about commit rights, I guess it

[Mesa-dev] [PATCH mesa v2 3/3] gallium: Remove unused TGSI_RESOURCE_ defines

These magic file-index defines where only ever used in the nouveau code and that no longer uses them. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -Split out of "nouveau: codegen: Disable more old resource handling code" --- src/gallium/include/pipe/p_sha

[Mesa-dev] [PATCH mesa v2 2/2] nouveau: codegen: Add support for OpenCL global memory buffers

Add support for OpenCL global memory buffers, note this has only been tested with regular load and stores and likely needs more work for e.g. atomic ops. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -Redo on top of new "Use FILE_MEMORY_BUFFER for buffers"

Re: [Mesa-dev] [PATCH mesa 6/6] nouveau: codegen: Disable more old resource handling code

Hi, On 16-03-16 11:45, Samuel Pitoiset wrote: On 03/16/2016 10:23 AM, Hans de Goede wrote: Commit c3083c7082 ("nv50/ir: add support for BUFFER accesses") disabled / commented out some of the old resource handling code, but not all of it. Effectively all of it is dead already,

Re: [Mesa-dev] [PATCH mesa 5/6] nouveau: codegen: Add support for OpenCL global memory buffers

here, so it should be easy to make it work. On 03/16/2016 10:23 AM, Hans de Goede wrote: Add support for OpenCL global memory buffers, note this has only been tested with regular load and stores and likely needs more work for e.g. atomic ops. Signed-off-by: Hans de Goede <hdego...@redhat.co

Re: [Mesa-dev] [PATCH 2/5] nv50/ir: make use of auxCBSlot instead of magic numbers

Hi, On 15-03-16 21:55, Samuel Pitoiset wrote: This avoids using magic numbers for the driver constbuf slot which is always 15 except for compute shaders on gk104+ where the slot 0 is used. For gk104+, some special compute-related values like the thread index are uploaded to screen->parm which

[Mesa-dev] [PATCH mesa 5/6] nouveau: codegen: Add support for OpenCL global memory buffers

Add support for OpenCL global memory buffers, note this has only been tested with regular load and stores and likely needs more work for e.g. atomic ops. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + .../drivers/nouveau/c

[Mesa-dev] [PATCH mesa 3/6] nouveau: codegen: gk110: Make emitSTORE offset handling identical to emitLOAD

Make the store offset handling in CodeEmitterGK110::emitSTORE identical to the one in CodeEmitterGK110::emitLOAD handling. This is just a cleanup, it does not cause any functional changes. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH mesa 4/6] nouveau: codegen: s/FILE_MEMORY_GLOBAL/FILE_MEMORY_BUFFER/

handling, this will allow the later (re-)addition of FILE_MEMORY_GLOBAL for regular global memory. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir.h| 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp

[Mesa-dev] [PATCH mesa 6/6] nouveau: codegen: Disable more old resource handling code

r_tokens.h as those are no longer used now (which is a good thing). Signed-off-by: Hans de Goede <hdego...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 42 +++--- src/gallium/include/pipe/p_shader_tokens.h | 9 - 2 files changed, 30 i

[Mesa-dev] [PATCH mesa 2/6] nouveau: codegen: Slightly refactor Source::scanInstruction() dst handling

Use the dst temp variable which was used in the TGSI_FILE_OUTPUT case everywhere. This makes the code somewhat easier to reads and helps avoiding going over 80 chars with upcoming changes. This also brings the dst handling more in line with the src handling. Signed-off-by: Hans de Goede <hd

[Mesa-dev] [PATCH mesa 1/6] tgsi_build: Fix return of uninitialized memory in tgsi_*_instruction_memory

ormat to tgsi_instruction_memory") Cc: Nicolai Hähnle <nicolai.haeh...@amd.com> Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/auxiliary/tgsi/tgsi_build.c | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c b/src/

[Mesa-dev] [PATCH mesa v2 3/3] nouveau: codegen: Add support for clover / OpenCL kernel input parameters

Add support for clover / OpenCL kernel input parameters. Signed-off-by: Hans de Goede <hdego...@redhat.com> Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> --- Changes in v2: -s/local/private/ -Add: Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> --- .../drive

[Mesa-dev] [PATCH mesa v2 2/3] tgsi: Add support for global / private / input MEMORY

BO-s) may differ per implementation. The uploading of kernel parameters is handled by launch_grid, "MEMORY[x], INPUT" allows drivers to use an access mechanism for parameter reads which matches with the upload method. Signed-off-by: Hans de Goede <hdego...@redhat.com> Reviewed-by: Ilia Mirki

[Mesa-dev] [PATCH mesa v2 1/3] tgsi: Fix decl.Atomic and .Shared not propagating when parsing tgsi text

When support for decl.Atomic and .Shared was added, tgsi_build_declaration was not updated to propagate these properly. Signed-off-by: Hans de Goede <hdego...@redhat.com> Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> --- Changes in v2: -Add Reviewed-by: Ilia Mirkin <imir.

Re: [Mesa-dev] [RFC mesa] nouveau: Add support for OpenCL global memory buffers

Hi, On 14-03-16 16:41, Samuel Pitoiset wrote: On 03/14/2016 04:28 PM, Hans de Goede wrote: Hi, On 14-03-16 16:05, Ilia Mirkin wrote: There's a less hacky and more hacky way forward. The more hacky solution is to set file index to -1 or something and then not do the lowering when you see

Re: [Mesa-dev] [RFC mesa] nouveau: Add support for OpenCL global memory buffers

that solution #1 (which was also my first hunch) is the right one then I will go and implement that. What I really don't want is to somehow differentiate glsl-sourced and opencl-sourced compute programs in the backend. Ok, understood. Regards, Hans On Mar 14, 2016 6:22 AM, "Han

[Mesa-dev] [PATCH mesa v2] clover: Fix pipe_grid_info.indirect not being initialized

;11.2" <mesa-sta...@lists.freedesktop.org> Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -Drop trailing "," from struct initializer -Add Cc: "11.2" <mesa-sta...@lists.freedesktop.org> --- src/gallium/state_trackers/clover/core/kern

Re: [Mesa-dev] [RFC mesa] clover: Fix pipe_grid_info.indirect not being initialized

Messed up the subject prefix, sorry. Resending with proper prefix. On 14-03-16 15:00, Hans de Goede wrote: After pipe_grid_info.indirect was introduced, clover was not modified to set it causing it to pass uninitialized memory for it to launch_grid. This commit fixes this by zero-ing

[Mesa-dev] [RFC mesa] clover: Fix pipe_grid_info.indirect not being initialized

;11.2" <mesa-sta...@lists.freedesktop.org> Signed-off-by: Hans de Goede <hdego...@redhat.com> --- Changes in v2: -Drop trailing "," from struct initializer -Add Cc: "11.2" <mesa-sta...@lists.freedesktop.org> --- src/gallium/state_trackers/clover/core/kern

Re: [Mesa-dev] [PATCH mesa] clover: Fix pipe_grid_info.indirect not being initialized

Hi, On 14-03-16 14:01, Samuel Pitoiset wrote: On 03/14/2016 01:50 PM, Hans de Goede wrote: After pipe_grid_info.indirect was introduced, clover was not modified to set it causing it to pass uninitialized memory for it to launch_grid. This commit fixes this by zero-ing the entire

[Mesa-dev] [RFC mesa] nouveau: Add support for OpenCL global memory buffers

Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 4 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 ++ 2 files changed, 6 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from

[Mesa-dev] [PATCH mesa] clover: Fix pipe_grid_info.indirect not being initialized

-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/state_trackers/clover/core/kernel.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/state_trackers/clover/core/kernel.cpp b/src/gallium/state_trackers/clover/core/kernel.cpp index 8396be9..dad66aa

Re: [Mesa-dev] [PATCH mesa 2/3] tgsi: Add support for global / local / input MEMORY

Hi, On 10-03-16 16:35, Aaron Watry wrote: On Thu, Mar 10, 2016 at 9:14 AM, Hans de Goede <hdego...@redhat.com> wrote: Extend the MEMORY file support to differentiate between global, local and shared memory, as well as "input" memory. "MEMORY[x], INPUT" is intend

Re: [Mesa-dev] [PATCH mesa 3/3] nouveau: Add support for clover / OpenCL kernel input parameters

04:23 PM, Ilia Mirkin wrote: On Thu, Mar 10, 2016 at 10:14 AM, Hans de Goede <hdego...@redhat.com> wrote: Add support for clover / OpenCL kernel input parameters. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 18 +

[Mesa-dev] [PATCH mesa 0/3] tgsi and nouveau global / local / opencl-input mem support

Hi, Here are patches which implement the support for OpenCL kernel input parameters we discussed. They also add the tgsi parsing bits for adding support for global / local mem, but no implementation yet. Regards, Hans ___ mesa-dev mailing list

[Mesa-dev] [PATCH mesa 3/3] nouveau: Add support for clover / OpenCL kernel input parameters

Add support for clover / OpenCL kernel input parameters. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH mesa 1/3] tgsi: Fix decl.Atomic and .Shared not propagating when parsing tgsi text

When support for decl.Atomic and .Shared was added, tgsi_build_declaration was not updated to propagate these properly. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/auxiliary/tgsi/tgsi_build.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/aux

[Mesa-dev] [PATCH mesa 2/3] tgsi: Add support for global / local / input MEMORY

BO-s) may differ per implementation. The uploading of kernel parameters is handled by launch_grid, "MEMORY[x], INPUT" allows drivers to use an access mechanism for parameter reads which matches with the upload method. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/auxilia

Re: [Mesa-dev] [PATCH] clover: Check the return value of pipe_loader_probe() when probing for devices

Hi, On 29-11-15 17:14, Samuel Pitoiset wrote: This patch fixes the issue for me (eg. https://bugs.freedesktop.org/show_bug.cgi?id=93091#c8). Thanks Tom. Tested-by: Samuel Pitoiset I'm seeing a similar crash, but for me the problem is caused by

Re: [Mesa-dev] llvm TGSI backend (WIP) questions

Hi, On 13-11-15 19:51, Tom Stellard wrote: On Fri, Nov 13, 2015 at 02:46:52PM +0100, Hans de Goede wrote: Hi All, So as discussed I've started working on a TGSI backend for llvm to use as a way to get compute going on nouveau (and other gpu-s). I'm still learning all the ins and outs of llvm

Re: [Mesa-dev] llvm TGSI backend (WIP) questions

Hi, On 13-11-15 19:51, Tom Stellard wrote: On Fri, Nov 13, 2015 at 02:46:52PM +0100, Hans de Goede wrote: Hi All, So as discussed I've started working on a TGSI backend for llvm to use as a way to get compute going on nouveau (and other gpu-s). I'm still learning all the ins and outs of llvm

[Mesa-dev] llvm TGSI backend (WIP) questions

Hi All, So as discussed I've started working on a TGSI backend for llvm to use as a way to get compute going on nouveau (and other gpu-s). I'm still learning all the ins and outs of llvm so I do not have much to show yet. I've rebased Francisco's (curro's) latest version on top of llvm trunk,

Re: [Mesa-dev] [PATCH mesa 0/5] nouveau: codegen: Make use of double immediates

Hi, On 07-11-15 01:59, Ilia Mirkin wrote: Hi Hans, All pushed. I made a few additional fixes and improvement to fp64 immediate handling along the way, but all your commits were fine as-is. (Except that they enabled fp64 immediates on nv50 implicitly which is wrong -- there are no

Re: [Mesa-dev] [PATCH] nvc0: enable compute support on Fermi

Hi, On 06-11-15 00:51, Samuel Pitoiset wrote: On 11/06/2015 12:43 AM, Ilia Mirkin wrote: On Thu, Nov 5, 2015 at 6:41 PM, Samuel Pitoiset wrote: Altough the compute support is still not complete because textures and surfaces need to be implemented, it allows to

[Mesa-dev] [PATCH mesa 2/5] nouveau: codegen: emit_gm107: Add support for double immediates

Add support for encoding double immediates (up to 20 bits of precision) into the generated gm107 machine-code. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff

[Mesa-dev] [PATCH mesa 1/5] nouveau: codegen: emit_nvc0: Add support for double immediates

Add support for encoding double immediates (up to 20 bits of precision) into the generated nvc0 machine-code. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 8 1 file changed, 8 insertions(+) diff --git a/src/g

[Mesa-dev] [PATCH mesa 4/5] nouveau: codegen: Teach insnCanLoad about double immediates

.50 (8) Signed-off-by: Hans de Goede <hdego...@redhat.com> --- .../nouveau/codegen/nv50_ir_target_nvc0.cpp| 25 -- 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers

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