[Mesa-dev] [PATCH 3/4] nir: reword code comment

--- src/compiler/nir/nir_loop_analyze.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir_loop_analyze.c b/src/compiler/nir/nir_loop_analyze.c index c804a66ac4..8903e15105 100644 --- a/src/compiler/nir/nir_loop_analyze.c +++

[Mesa-dev] [PATCH 4/4] nir: detect more induction variables

This adds allows loop analysis to detect inductions varibales that are incremented in both branches of an if rather than in a main loop block. For example: loop { block block_1: /* preds: block_0 block_7 */ vec1 32 ssa_8 = phi block_0: ssa_4, block_7: ssa_20 vec1 32

[Mesa-dev] [PATCH 1/4] nir: add if opt opt_if_loop_last_continue()

vate memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 8524 -> 8488 (-0.42 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 7 -> 7 (0.00 %) Wait states: 0 -> 0 (0.00 %) v2: (Timothy Arceri): - allow for continues in either branch - move

[Mesa-dev] [PATCH 2/2] nir: merge some basic consecutive ifs

After trying multiple times to merge if-statements with phis between them I've come to the conclusion that it cannot be done without regressions. The problem is for some shaders we end up with a whole bunch of phis for the merged ifs resulting in increased register pressure. So this patch just

[Mesa-dev] [PATCH 1/2] nir: add rewrite_phi_predecessor_blocks() helper

This will also be used by the if merge pass in the following commit. --- src/compiler/nir/nir_opt_if.c | 45 ++- 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c index

Re: [Mesa-dev] [PATCH 00/15] nir: Rework boolean (and maybe all?) conversions

On 10/11/18 3:58 am, Jason Ekstrand wrote: In case anyone is wondering my opinion based on my experience writing both patch series, I think it's decidedly in the version B camp.  The code changes required to nir_algebraic and nir_search are almost identical between the two besides the whole

Re: [Mesa-dev] [PATCH 06/15] nir/algebraic: Improve error messages for replace expressions

I'm no python expect but for what its worth patches 1-6 are: Reviewed-by: Timothy Arceri On 9/11/18 2:45 pm, Jason Ekstrand wrote: In bf441d22a7917f38c, I wrote a bunch of descriptive asserts for various bit size checks in the validation of search expressions. This commit improves a few

Re: [Mesa-dev] [PATCH] nir: propagate known constant values into the if-then branch

On 23/11/18 11:49 am, Timothy Arceri wrote: shader-db results radeonsi (VEGA): Totals from affected shaders: SGPRS: 7272 -> 7488 (2.97 %) VGPRS: 4168 -> 4160 (-0.19 %) Spilled SGPRs: 328 -> 327 (-0.30 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scrat

[Mesa-dev] [PATCH] nir: propagate known constant values into the if-then branch

shader-db results radeonsi (VEGA): Totals from affected shaders: SGPRS: 7272 -> 7488 (2.97 %) VGPRS: 4168 -> 4160 (-0.19 %) Spilled SGPRs: 328 -> 327 (-0.30 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 268212 ->

Re: [Mesa-dev] [PATCH] radv-report: Show biggest improvements

Sorry the subject should probably have been something like: vkpipline-db: Show biggest improvements in radv-report On 22/11/18 11:52 am, Timothy Arceri wrote: Being able to see improvements as well as regressions is useful during the development of shader opts. Ported from commit

[Mesa-dev] [PATCH] radv-report: Show biggest improvements

Being able to see improvements as well as regressions is useful during the development of shader opts. Ported from commit 8f0c7aca8683 in shader-db --- radv-report.py | 30 ++ 1 file changed, 30 insertions(+) diff --git a/radv-report.py b/radv-report.py index

Re: [Mesa-dev] [PATCH 3/3] drirc: enable glthread for Talos Principle

Can we get some stats and preferably the cpu/gpu hardware combo used to go in the commit message? Or in the comment above the drirc entry? With that: Reviewed-by: Timothy Arceri On 10/11/18 5:29 pm, Marek Olšák wrote: From: Marek Olšák Immediate mode was needed. --- src/util/00-mesa

Re: [Mesa-dev] [PATCH 2/3] mesa/glthread: enable immediate mode

Reviewed-by: Timothy Arceri On 10/11/18 5:29 pm, Marek Olšák wrote: From: Marek Olšák --- src/mapi/glapi/gen/gl_API.xml | 2 +- src/mesa/vbo/vbo_exec_api.c | 14 ++ 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi

Re: [Mesa-dev] [PATCH 1/3] mesa/glthread: pass the function name to _mesa_glthread_restore_dispatch

Can we add the printf inside #if 0 #endif So that we know why the name is passed? With that: Reviewed-by: Timothy Arceri On 10/11/18 5:29 pm, Marek Olšák wrote: From: Marek Olšák If you insert printf there, you'll know why glthread was disabled. --- src/mapi/glapi/gen/gl_marshal.py

Re: [Mesa-dev] [PATCH 10/10] mesa: Remove unneeded bitfield widths from the VAO.

On 20/11/18 10:10 pm, Mathias Fröhlich wrote: Hi, Yes thank you. In more actively changed code I guess it would make more sense to leave the bitfield width but as this is unlikely to change much in future you have convinced me its probably not worth leaving it. Thanks. Oh, you mean as it

Re: [Mesa-dev] [PATCH 10/10] mesa: Remove unneeded bitfield widths from the VAO.

On 20/11/18 8:51 pm, Mathias Fröhlich wrote: Hi, On Tuesday, 20 November 2018 09:23:53 CET Timothy Arceri wrote: Just curious. Why is this change better? Why not just leave these as is if it's not hurting anything? Well, you mean the unsigned char -> GLubyte? That very similar part Br

Re: [Mesa-dev] [PATCH 2/2] amd/addrlib: update Mesa's copy of addrlib

On 20/11/18 5:46 pm, Marek Olšák wrote: On Tue, Nov 20, 2018 at 12:08 AM Dave Airlie > wrote: On Tue, 20 Nov 2018 at 14:42, Marek Olšák mailto:mar...@gmail.com>> wrote: > > On Mon, Nov 19, 2018 at 7:15 PM Bas Nieuwenhuizen

Re: [Mesa-dev] [PATCH 10/10] mesa: Remove unneeded bitfield widths from the VAO.

Just curious. Why is this change better? Why not just leave these as is if it's not hurting anything? On 20/11/18 6:24 pm, mathias.froehl...@gmx.net wrote: From: Mathias Fröhlich With the current VAO layout we do not need to make these fields a bitfield. We get a tight struct layout with

[Mesa-dev] [PATCH 03/11] nir: add a new nir_cf_list_clone_and_reinsert() helper

--- src/compiler/nir/nir_control_flow.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/compiler/nir/nir_control_flow.h b/src/compiler/nir/nir_control_flow.h index 2ea460e5df..9111b30a29 100644 --- a/src/compiler/nir/nir_control_flow.h +++

[Mesa-dev] [PATCH 09/11] nir: add partial loop unrolling support

This adds partial loop unrolling support and makes use of a guessed trip count based on array access. The code is written so that we could use partial unrolling more generally, but for now it's only use when we have guessed the trip count. We use partial unrolling for this guessed trip count

[Mesa-dev] [PATCH 10/11] nir: calculate trip count for more loops

This adds support to loop analysis for loops where the induction variable is compared to the result of min(variable, constant). For example: for (int i = 0; i < imin(x, 4); i++) ... We add a new bool to the loop terminator struct in order to differentiate terminators with this exit

[Mesa-dev] [PATCH 04/11] nir: make use of new nir_cf_list_clone_and_reinsert() helper

--- src/compiler/nir/nir_opt_loop_unroll.c | 74 ++ 1 file changed, 28 insertions(+), 46 deletions(-) diff --git a/src/compiler/nir/nir_opt_loop_unroll.c b/src/compiler/nir/nir_opt_loop_unroll.c index 0e9966320b..935429add4 100644 ---

[Mesa-dev] [PATCH 02/11] nir: clarify some nit_loop_info member names

Following commits will introduce additional fields such as guessed_trip_count. Renaming these will help avoid confusion as our unrolling feature set grows. --- src/compiler/nir/nir.h | 8 +--- src/compiler/nir/nir_loop_analyze.c| 14 +++---

[Mesa-dev] [PATCH 05/11] nir: factor out some of the complex loop unroll code to a helper

--- src/compiler/nir/nir_opt_loop_unroll.c | 116 ++--- 1 file changed, 64 insertions(+), 52 deletions(-) diff --git a/src/compiler/nir/nir_opt_loop_unroll.c b/src/compiler/nir/nir_opt_loop_unroll.c index 935429add4..dc440e88b1 100644 ---

[Mesa-dev] [PATCH 07/11] nir: add guess trip count support to loop analysis

This detects an induction variable used as an array index to guess the trip count of the loop. This enables us to do a partial unroll of the loop, with can eventually result in the loop being eliminated. --- src/compiler/nir/nir.h | 4 ++ src/compiler/nir/nir_loop_analyze.c | 78

[Mesa-dev] [PATCH 11/11] nir: unroll some loops with a variable limit

For some loops can have a single terminator but the exact trip count is still unknown. For example: for (int i = 0; i < imin(x, 4); i++) ... Shader-db results radeonsi (all affected are from Tropico 5): Totals from affected shaders: SGPRS: 216 -> 208 (-3.70 %) VGPRS: 160 -> 136 (-15.00

[Mesa-dev] [PATCH 06/11] nir: rework force_unroll_array_access()

Here we rework force_unroll_array_access() so that we can reused the induction variable detection in a following patch. --- src/compiler/nir/nir_loop_analyze.c | 49 - 1 file changed, 35 insertions(+), 14 deletions(-) diff --git a/src/compiler/nir/nir_loop_analyze.c

[Mesa-dev] [PATCH 08/11] nir: add new partially_unrolled bool to nir_loop

In order to stop continuously partially unrolling the same loop we add the bool partialy_unrolled to nir_loop, we add it here rather than in nir_loop_info because nir_loop_info is only set via loop analysis and is intended to be cleared before each analysis. Also nir_loop_info is never cloned. ---

[Mesa-dev] [PATCH 01/11] nir: small tidy ups for nir_loop_analyze()

--- src/compiler/nir/nir_loop_analyze.c | 31 ++--- 1 file changed, 10 insertions(+), 21 deletions(-) diff --git a/src/compiler/nir/nir_loop_analyze.c b/src/compiler/nir/nir_loop_analyze.c index 9c3fd2f286..c779383b36 100644 --- a/src/compiler/nir/nir_loop_analyze.c +++

[Mesa-dev] Partial loop unrolling support v2

This series add support for partial loop unrolling for loops with an unknown trip count. The new partial_unroll function allows the caller to specifiy how may times the loop should be unrolled and then the loop is inserted in the innermost continue branch of the unrolled loop. For now we only do

Re: [Mesa-dev] Partial loop unrolling support

ich is a bit of a different use case from the new functions introduced in this series but shouldn't bee too hard to do. --Jason On Mon, Nov 19, 2018 at 12:18 AM Timothy Arceri <mailto:tarc...@itsqueeze.com>> wrote: This series add support for partial loop unrolling for loops with an

Re: [Mesa-dev] Lets talk about autotools

One thing I always go to the autoconfig webpage for is to copy and paste the line for a 32bit cross-compiled mesa build. It would be good if someone could document the method for cross compiling on the meson page before we remove autotools. [1] https://www.mesa3d.org/autoconf.html On

Re: [Mesa-dev] Partial loop unrolling support

On 19/11/18 5:18 pm, Timothy Arceri wrote> This series add support for partial loop unrolling for loops with an unknown trip count. The new partial_unroll function allows the caller to specifiy how may times the loop should be unrolled and then the loop is inserted in the innermost conti

[Mesa-dev] [PATCH 5/8] nir: rework force_unroll_array_access()

Here we rework force_unroll_array_access() so that we can reused the induction variable detection in a following patch. --- src/compiler/nir/nir_loop_analyze.c | 49 - 1 file changed, 35 insertions(+), 14 deletions(-) diff --git a/src/compiler/nir/nir_loop_analyze.c

[Mesa-dev] [PATCH 8/8] nir: add partial loop unrolling support

This adds partial loop unrolling support and makes use of a guessed trip count based on array access. The code is written so that we could use partial unrolling more generally, but for now it's only use when we have guessed the trip count. We use partial unrolling for this guessed trip count

[Mesa-dev] [PATCH 4/8] nir: factor out some of the complex loop unroll code to a helper

--- src/compiler/nir/nir_opt_loop_unroll.c | 116 ++--- 1 file changed, 64 insertions(+), 52 deletions(-) diff --git a/src/compiler/nir/nir_opt_loop_unroll.c b/src/compiler/nir/nir_opt_loop_unroll.c index a25a89f094..d9272fedd8 100644 ---

[Mesa-dev] Partial loop unrolling support

This series add support for partial loop unrolling for loops with an unknown trip count. The new partial_unroll function allows the caller to specifiy how may times the loop should be unrolled and then the loop is inserted in the innermost continue branch of the unrolled loop. For now we only do

[Mesa-dev] [PATCH 2/8] nir: add a new nir_cf_list_clone_and_reinsert() helper

--- src/compiler/nir/nir_control_flow.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/compiler/nir/nir_control_flow.h b/src/compiler/nir/nir_control_flow.h index 2ea460e5df..9111b30a29 100644 --- a/src/compiler/nir/nir_control_flow.h +++

[Mesa-dev] [PATCH 3/8] nir: make use of new nir_cf_list_clone_and_reinsert() helper

--- src/compiler/nir/nir_opt_loop_unroll.c | 74 ++ 1 file changed, 28 insertions(+), 46 deletions(-) diff --git a/src/compiler/nir/nir_opt_loop_unroll.c b/src/compiler/nir/nir_opt_loop_unroll.c index ea2012e292..a25a89f094 100644 ---

[Mesa-dev] [PATCH 6/8] nir: add guess trip count support to loop analysis

This detects an induction variable used as an array index to guess the trip count of the loop. This enables us to do a partial unroll of the loop, with can eventually result in the loop being eliminated. --- src/compiler/nir/nir.h | 4 ++ src/compiler/nir/nir_loop_analyze.c | 78

[Mesa-dev] [PATCH 7/8] nir: add new partially_unrolled bool to nir_loop

In order to stop continuously partially unrolling the same loop we add the bool partialy_unrolled to nir_loop, we add it here rather than in nir_loop_info because nir_loop_info is only set via loop analysis and is intended to be cleared before each analysis. Also nir_loop_info is never cloned. ---

[Mesa-dev] [PATCH 1/8] nir: small tidy ups for nir_loop_analyze()

--- src/compiler/nir/nir_loop_analyze.c | 31 ++--- 1 file changed, 10 insertions(+), 21 deletions(-) diff --git a/src/compiler/nir/nir_loop_analyze.c b/src/compiler/nir/nir_loop_analyze.c index 9c3fd2f286..c779383b36 100644 --- a/src/compiler/nir/nir_loop_analyze.c +++

[Mesa-dev] [PATCH] nir: small tidy ups for nir_loop_analyze()

--- src/compiler/nir/nir_loop_analyze.c | 31 ++--- 1 file changed, 10 insertions(+), 21 deletions(-) diff --git a/src/compiler/nir/nir_loop_analyze.c b/src/compiler/nir/nir_loop_analyze.c index 9c3fd2f286..c779383b36 100644 --- a/src/compiler/nir/nir_loop_analyze.c +++

Re: [Mesa-dev] [PATCH 1/2] nir: add new nir_remove_dead_barriers() pass

On 14/11/18 11:39 pm, Bas Nieuwenhuizen wrote: On Wed, Nov 14, 2018 at 1:03 PM Timothy Arceri wrote: On 14/11/18 10:22 pm, Bas Nieuwenhuizen wrote: On Wed, Nov 14, 2018 at 6:30 AM Timothy Arceri wrote: Link time opts can remove unused outputs leaving behind useless barriers. This pass

Re: [Mesa-dev] [PATCH 1/2] nir: add new nir_remove_dead_barriers() pass

On 14/11/18 10:22 pm, Bas Nieuwenhuizen wrote: On Wed, Nov 14, 2018 at 6:30 AM Timothy Arceri wrote: Link time opts can remove unused outputs leaving behind useless barriers. This pass is intended to be called after linking so I've added it to nir_linking_helpers.c This pass removes some

[Mesa-dev] [PATCH 2/2] radv: make use of nir_remove_dead_barriers()

--- src/amd/vulkan/radv_pipeline.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 33076cc2bd..577d17e614 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -1843,6 +1843,12 @@

[Mesa-dev] [PATCH 1/2] nir: add new nir_remove_dead_barriers() pass

Link time opts can remove unused outputs leaving behind useless barriers. This pass is intended to be called after linking so I've added it to nir_linking_helpers.c This pass removes some barriers from Witcher 3 (DXVK) Vulkan shaders. --- src/compiler/nir/nir.h | 1 +

[Mesa-dev] [PATCH v3] nir: add support for removing redundant stores to copy prop var

For example the following type of thing is seen in TCS from a number of Vulkan and DXVK games: vec1 32 ssa_557 = deref_var (shader_out float) vec1 32 ssa_558 = intrinsic load_deref (ssa_557) () vec1 32 ssa_559 = deref_var @42 (shader_out float) vec1 32 ssa_560 =

Re: [Mesa-dev] [PATCH v2] i965/glsl: don't add unused aoa element to the program resource list

Sorry for not getting back sooner on this one. I'm leaning towards a NAK on this one. This is just under 300 new lines of code to work around a possibly over strict piglit test. While the test is not wrong an implementation is also not required to optimise away these unused elements. If

[Mesa-dev] [PATCH v2] nir: add support for removing redundant stores to copy prop var

For example the following type of thing is seen in TCS from a number of Vulkan and DXVK games: vec1 32 ssa_557 = deref_var (shader_out float) vec1 32 ssa_558 = intrinsic load_deref (ssa_557) () vec1 32 ssa_559 = deref_var @42 (shader_out float) vec1 32 ssa_560 =

Re: [Mesa-dev] [radeonsi] Blender/vsraytrace/fsraytrace/gsraytrace - GPUShader: compile error

I'm guessing your using GCC 8.2.1 to compile Mesa? There was a compiler bug: https://bugzilla.redhat.com/show_bug.cgi?id=1645400 On 12/11/18 2:11 pm, Dieter Nützel wrote: Hello, I get brocken shaders with Blender and the above demos didn't start any longer. NOT NIR related. Have to start

Re: [Mesa-dev] [PATCH 2/2] nir: don't pack varyings ints with floats unless flat

On 12/11/18 2:11 pm, Jason Ekstrand wrote: On November 11, 2018 20:30:29 Timothy Arceri wrote: Fixes: 1c9c42d16b4c ("nir: add varying component packing helpers") --- src/compiler/nir/nir_linking_helpers.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff -

[Mesa-dev] [PATCH 2/2] nir: don't pack varyings ints with floats unless flat

Fixes: 1c9c42d16b4c ("nir: add varying component packing helpers") --- src/compiler/nir/nir_linking_helpers.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/compiler/nir/nir_linking_helpers.c b/src/compiler/nir/nir_linking_helpers.c index

[Mesa-dev] [PATCH 1/2] nir: add glsl_type_is_integer() helper

--- src/compiler/nir_types.cpp | 5 + src/compiler/nir_types.h | 1 + 2 files changed, 6 insertions(+) diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp index d24f0941519..3cd61f66056 100644 --- a/src/compiler/nir_types.cpp +++ b/src/compiler/nir_types.cpp @@ -301,6

Re: [Mesa-dev] [PATCH 1/3 v2] glsl: prevent qualifiers modification of predeclared variables

Nice! Series is: Reviewed-by: Timothy Arceri On 10/10/18 9:07 am, Ian Romanick wrote: From: Ian Romanick Section 3.7 (Identifiers) of the GLSL spec says: However, as noted in the specification, there are some cases where previously declared variables can be redeclared to change

[Mesa-dev] [PATCH] st/mesa: make use of nir_link_constant_varyings()

Shader-db results radeonsi (VEGA): Totals from affected shaders: SGPRS: 161464 -> 161368 (-0.06 %) VGPRS: 86904 -> 86292 (-0.70 %) Spilled SGPRs: 296 -> 314 (6.08 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size:

Re: [Mesa-dev] [PATCH 04/28] r200: use preprocessor for big vs little endian checks

On 10/11/18 5:39 am, Dylan Baker wrote: Instead of using a function at runtime we can just build the right code for the right platform. --- src/mesa/drivers/dri/r200/r200_blit.c | 76 ++- src/mesa/drivers/dri/r200/r200_texstate.c | 7 ++- 2 files changed, 38

Re: [Mesa-dev] [PATCH v2] glsl: Correct several built-in functions availability

On 2/11/18 6:41 am, Ian Romanick wrote: On 10/31/2018 03:05 PM, Timothy Arceri wrote: If we are going to start tightening up this stuff I would really really like to see CTS tests (not piglit tests) to go along with this stuff. We are already way stricter with these type of things than

Re: [Mesa-dev] [PATCH v2] nir: add new linking opt nir_move_out_const_to_consumer()

On 9/11/18 6:53 am, Samuel Pitoiset wrote: On 11/7/18 9:36 AM, Timothy Arceri wrote: This pass moves constant outputs to the consuming shader stage where possible. V2: limit pass to scalars for now ---   V2 doesn't change any shader-db/vkpipeline-db results as all 32bit   varyings that we

[Mesa-dev] [PATCH] nir: add support for removing redundant stores to copy prop var

For example the following type of thing is seen in TCS from a number of Vulkan and DXVK games: vec1 32 ssa_557 = deref_var (shader_out float) vec1 32 ssa_558 = intrinsic load_deref (ssa_557) () vec1 32 ssa_559 = deref_var @42 (shader_out float) vec1 32 ssa_560 =

Re: [Mesa-dev] [PATCH 2/3] radv: make use of nir_move_out_const_to_consumer()

On 7/11/18 7:40 pm, Samuel Pitoiset wrot> On 11/7/18 5:20 AM, Timothy Arceri wrote: vkpipeline-db results: Totals from affected shaders: SGPRS: 28400 -> 28576 (0.62 %) VGPRS: 27916 -> 27692 (-0.80 %) Spilled SGPRs: 140 -> 138 (-1.43 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memor

Re: [Mesa-dev] [PATCH 1/3] nir: add new linking opt nir_move_out_const_to_consumer()

with nir_link_constant_varyings() unless there are any other objections. On 11/7/18 5:20 AM, Timothy Arceri wrote: This pass moves constant outputs to the consuming shader stage where possible. ---   src/compiler/nir/nir.h    |   2 +   src/compiler/nir/nir_linking_helpers.c    | 104

[Mesa-dev] [PATCH v2] nir: add new linking opt nir_move_out_const_to_consumer()

This pass moves constant outputs to the consuming shader stage where possible. V2: limit pass to scalars for now --- V2 doesn't change any shader-db/vkpipeline-db results as all 32bit varyings that we don't skip are already scalar. V2 just avoids a potential bug with doubles as we don't

Re: [Mesa-dev] [PATCH 1/3] nir: add new linking opt nir_move_out_const_to_consumer()

Thinking about this some more I think I need to add some code to check write_masks. I'll add this and some piglit tests for it later tonight or tomorrow. On 7/11/18 3:20 pm, Timothy Arceri wrote: This pass moves constant outputs to the consuming shader stage where possible. --- src/compiler

Re: [Mesa-dev] [PATCH 3/3] anv/i965: make use of nir_move_out_const_to_consumer()

shader-db results for SLK: On 7/11/18 3:20 pm, Timothy Arceri wrote: total instructions in shared programs: 13106498 -> 13091573 (-0.11%) instructions in affected programs: 1186244 -> 1171319 (-1.26%) helped: 6186 HURT: 0 total cycles in shared programs: 332062633 -> 331961653 (-0.03

[Mesa-dev] [PATCH 3/3] anv/i965: make use of nir_move_out_const_to_consumer()

total instructions in shared programs: 13106498 -> 13091573 (-0.11%) instructions in affected programs: 1186244 -> 1171319 (-1.26%) helped: 6186 HURT: 0 total cycles in shared programs: 332062633 -> 331961653 (-0.03%) cycles in affected programs: 8537165 -> 8436185 (-1.18%) helped: 5371 HURT: 862

[Mesa-dev] [PATCH 1/3] nir: add new linking opt nir_move_out_const_to_consumer()

This pass moves constant outputs to the consuming shader stage where possible. --- src/compiler/nir/nir.h| 2 + src/compiler/nir/nir_linking_helpers.c| 104 ++ src/mesa/state_tracker/st_glsl_to_nir.cpp | 2 +- 3 files changed, 107 insertions(+), 1

[Mesa-dev] [PATCH 2/3] radv: make use of nir_move_out_const_to_consumer()

vkpipeline-db results: Totals from affected shaders: SGPRS: 28400 -> 28576 (0.62 %) VGPRS: 27916 -> 27692 (-0.80 %) Spilled SGPRs: 140 -> 138 (-1.43 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 1534456 ->

Re: [Mesa-dev] [PATCH] radv/nir: avoid packing vertex outputs we can eliminate

On 7/11/18 7:40 am, Timothy Arceri wrote: On 7/11/18 5:00 am, Eric Anholt wrote: Timothy Arceri writes: On Mon, Nov 5, 2018, at 4:44 PM, Timothy Arceri wrote: On 6/11/18 11:30 am, Eric Anholt wrote: Timothy Arceri writes: For now I have only enabled this for RADV we can do it also

Re: [Mesa-dev] [PATCH] radv/nir: avoid packing vertex outputs we can eliminate

On 7/11/18 5:00 am, Eric Anholt wrote: Timothy Arceri writes: On Mon, Nov 5, 2018, at 4:44 PM, Timothy Arceri wrote: On 6/11/18 11:30 am, Eric Anholt wrote: Timothy Arceri writes: For now I have only enabled this for RADV we can do it also for radeonsi also but we need to add a CAP

Re: [Mesa-dev] [PATCH 07/28] spirv/nir: don't set interface_type if it is not a struct

;num_members); for (unsigned i = 0; i < var->var->num_members; i++) { var->var->members[i].mode = nir_mode; var->var->members[i].patch = var->patch; } } With that change this is: Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 03/28] spirv/nir: setting interface type for ubos/ssbos

wed-by: Timothy Arceri --- src/compiler/spirv/vtn_variables.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index 5665106ab14..04103455614 100644 --- a/src/compiler/spirv/vtn_variables.c ++

[Mesa-dev] NIR vectorise varyings V3

This fixes the regressions in the glxbench tessellation benchmark [1]. This version fixes some silly mistakes that were causing some tests to fail on Intels CI system, see patch 2 for more details. [1] https://bugs.freedesktop.org/show_bug.cgi?id=107510

[Mesa-dev] [PATCH v3 1/3] nir: add glsl_replace_vector_type()

This creates a new glsl_type with the specified number on components. We will use this in the following patch when vectorising io. --- src/compiler/nir_types.cpp | 24 src/compiler/nir_types.h | 2 ++ 2 files changed, 26 insertions(+) diff --git

[Mesa-dev] [PATCH v3 3/3] i965/anv: use nir_opt_vectorize_io()

Commit 8d8222461f9d7f49 caused substantially more URB messages in geometry and tessellation shaders (due to enabling nir_lower_io_to_scalar_early). This combines io again to avoid this regression while still allowing link time optimisation of components. Shader-db results (SKL): total

[Mesa-dev] [PATCH v3 2/3] nir: add nir_opt_vectorize_io()

@@ +/* + * Copyright © 2018 Timothy Arceri + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to

Re: [Mesa-dev] [PATCH] radv/nir: avoid packing vertex outputs we can eliminate

On Mon, Nov 5, 2018, at 4:44 PM, Timothy Arceri wrote: > On 6/11/18 11:30 am, Eric Anholt wrote: > > Timothy Arceri writes: > > > >> For now I have only enabled this for RADV we can do it > >> also for radeonsi also but we need to add a CAP for it. > > &g

Re: [Mesa-dev] [PATCH] radv/nir: avoid packing vertex outputs we can eliminate

On 6/11/18 11:30 am, Eric Anholt wrote: Timothy Arceri writes: For now I have only enabled this for RADV we can do it also for radeonsi also but we need to add a CAP for it. If we're doing this at link time, why not push the constant value from the producer into the consumer shader

Re: [Mesa-dev] [PATCH 2/2] glsl: allow linking ES shaders with desktop shaders in desktop GL

bug. Otherwise maybe this patch is valid after all. This all does sound very odd -- what did you see in practice? On Wed, May 16, 2018 at 3:04 AM, Timothy Arceri wrote: In GLES shader versions must match but there is nothing in the ARB_ES*_compatibility specs that say they must match. This fix

[Mesa-dev] [PATCH v2] nir: fix condition propagation when src has a swizzle

We cannot use nir_build_alu() to create the new alu as it has no way to know how many components of the src we will use. This results in it guessing the max number of components from one of its inputs. Fixes the following CTS tests:

Re: [Mesa-dev] [PATCH] nir: fix condition propagation when src has a swizzle

On 2/11/18 11:52 pm, Jason Ekstrand wrote: On November 2, 2018 06:25:59 Timothy Arceri wrote: We cannot use nir_build_alu() to create the new alu as it has no way to know how many components of the src we will use. This results in it guessing the max number of components from one of its

[Mesa-dev] [PATCH] nir: fix condition propagation when src has a swizzle

We cannot use nir_build_alu() to create the new alu as it has no way to know how many components of the src we will use. This results in it guessing the max number of components from one of its inputs. Fixes the following CTS tests:

[Mesa-dev] [PATCH] ac/nir_to_llvm: fix b2f for f64

Fixes: d7e0d47b9de3 ("nir: Add a bunch of b2[if] optimizations") --- src/amd/common/ac_nir_to_llvm.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index e5fbe003f53..c950b81dca2 100644 ---

[Mesa-dev] [PATCH] nir: allow propagation of if evaluation for bcsel

Cc: Jason Ekstrand --- src/compiler/nir/nir_opt_if.c | 26 +- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c index 1fe95e53766..50e8947eaa1 100644 --- a/src/compiler/nir/nir_opt_if.c +++

Re: [Mesa-dev] [PATCH 2/2] nir: allow propagation of if evaluation to all alu instructions

On 1/11/18 1:28 am, Jason Ekstrand wrote: On Tue, Oct 30, 2018 at 9:17 PM Timothy Arceri <mailto:tarc...@itsqueeze.com>> wrote: With the simplifications to this pass in a3b4cb34589e2f1a68 we can allow any alu instruction to be processed. For one this can potentially help wi

Re: [Mesa-dev] [PATCH v2] glsl: Correct several built-in functions availability

If we are going to start tightening up this stuff I would really really like to see CTS tests (not piglit tests) to go along with this stuff. We are already way stricter with these type of things than the closed source drivers and this leads to some apps not working. Before we go ahead and

[Mesa-dev] [PATCH] radv/nir: avoid packing vertex outputs we can eliminate

For now I have only enabled this for RADV we can do it also for radeonsi also but we need to add a CAP for it. vkpipeline-db results: Totals from affected shaders: SGPRS: 4104 -> 3728 (-9.16 %) VGPRS: 3604 -> 3472 (-3.66 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private

Re: [Mesa-dev] [PATCH 07/31] nir/opt_if: Rework condition propagation

On 31/10/18 1:23 am, Jason Ekstrand wrote: Weird.  I didn't expect this patch to have any impact whatsoever. I thought it was just moving around the way we emit stuff. I think I've spotted the problem. Iago does patch 1 help with the regressions you are seeing.

[Mesa-dev] [PATCH 1/2] nir: fix if condition propagation for alu use

From: Timothy Arceri We need to update the cursor before we check if the alu use is dominated by the if condition. Previously we were checking if the current location of the alu instruction was dominated by the if condition which would miss some optimisation opportunities. Fixes: a3b4cb34589e

[Mesa-dev] [PATCH 2/2] nir: allow propagation of if evaluation to all alu instructions

With the simplifications to this pass in a3b4cb34589e2f1a68 we can allow any alu instruction to be processed. For one this can potentially help with bcsels. No shader-db change. --- src/compiler/nir/nir_opt_if.c | 20 1 file changed, 4 insertions(+), 16 deletions(-) diff

Re: [Mesa-dev] [PATCH] glsl/linker: Fix out variables linking during single stage

On 30/10/18 10:14 pm, Tapani Pälli wrote: Hi; On 10/30/18 1:28 AM, Timothy Arceri wrote: On 29/10/18 10:05 pm, Vadim Shovkoplias wrote: Hi Timothy, Thanks for the review. Piglit patch is updated with the additional out var: https://patchwork.freedesktop.org/patch/258899/ Original reporter

Re: [Mesa-dev] [Mesa-stable] [PATCH 1/1] util: Change remaining uint32 cache ids to sha1

On 26/10/18 9:18 pm, Juan A. Suarez Romero wrote: On Fri, 2018-10-26 at 14:52 +1100, Timothy Arceri wrote: Pushed. Thanks again! Ccing stable in case the Fixes tag isnt enough for this to get picked up (since the previous cache fix this fixes was also backported) Enqueued for 18.2. I didn't

Re: [Mesa-dev] [PATCH] glsl/linker: Fix out variables linking during single stage

to push the patch please ? I've pushed both. Thanks for the patches! Regards, Vadym сб, 27 окт. 2018 г. в 1:21, Timothy Arceri <mailto:tarc...@itsqueeze.com>>: On Wed, Oct 24, 2018, at 3:28 AM, Vadym Shovkoplias wrote: > Since out variables are copied from shader objects

Re: [Mesa-dev] [PATCH 05/15] ac: revert new LLVM 7.0 behavior for fdiv

Hi Marek, It's late and I haven't dug into this any further but this patch causes a whole bunch of f64 piglit tests to fail for the radeonsi nir backend. e.g. ./bin/shader_runner generated_tests/spec/glsl-4.00/execution/built-in-functions/fs-inverse-dmat2.shader_test -auto -fbo LLVM

[Mesa-dev] [PATCH] st/mesa: calculate buffer size correctly for packed uniforms

Fixes: edded1237607 ("mesa: rework ParameterList to allow packing") --- src/mesa/state_tracker/st_atom_constbuf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_atom_constbuf.c b/src/mesa/state_tracker/st_atom_constbuf.c index

[Mesa-dev] [PATCH v2 3/3] i965/anv: use nir_opt_vectorize_io()

Commit 8d8222461f9d7f49 caused substantially more URB messages in geometry and tessellation shaders (due to enabling nir_lower_io_to_scalar_early). This combines io again to avoid this regression while still allowing link time optimisation of components. Shader-db results (SKL): total

[Mesa-dev] [PATCH v2 1/3] nir: add glsl_replace_vector_type()

This creates a new glsl_type with the specified number on components. We will use this in the folloing patch when vectorising io. --- src/compiler/nir_types.cpp | 24 src/compiler/nir_types.h | 2 ++ 2 files changed, 26 insertions(+) diff --git

[Mesa-dev] [PATCH v2 2/3] nir: add nir_opt_vectorize_io()

/nir_opt_vectorize_io.c b/src/compiler/nir/nir_opt_vectorize_io.c new file mode 100644 index 000..6695827290a --- /dev/null +++ b/src/compiler/nir/nir_opt_vectorize_io.c @@ -0,0 +1,526 @@ +/* + * Copyright © 2018 Timothy Arceri + * + * Permission is hereby granted, free of charge, to any person obtaining

Re: [Mesa-dev] [PATCH 3/3] i965/anv: use nir_opt_vectorize_io()

On 28/10/18 1:04 pm, Bas Nieuwenhuizen wrote: On Sun, Oct 28, 2018 at 2:42 AM Timothy Arceri wrote: On 28/10/18 12:18 pm, Jason Ekstrand wrote: On Sat, Oct 27, 2018 at 8:03 PM Timothy Arceri mailto:tarc...@itsqueeze.com>> wrote: From: Timothy Arceri Commit 8d8222461f

Re: [Mesa-dev] [PATCH 3/3] i965/anv: use nir_opt_vectorize_io()

On 28/10/18 12:18 pm, Jason Ekstrand wrote: On Sat, Oct 27, 2018 at 8:03 PM Timothy Arceri <mailto:tarc...@itsqueeze.com>> wrote: From: Timothy Arceri Commit 8d8222461f9d7f49 caused substantially more URB messages in geometry and tessellation shaders (due to

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