On Wednesday, November 12, 2014 11:28:15 AM Daniel Vetter wrote:
> On Tue, Nov 11, 2014 at 11:13:28AM -0800, Kenneth Graunke wrote:
> > On Tuesday, November 11, 2014 06:59:51 PM Neil Roberts wrote:
> > > Kenneth Graunke writes:
> > >
> > > > drm-intel-next must have the new software checker turne
On Tue, Nov 11, 2014 at 11:13:28AM -0800, Kenneth Graunke wrote:
> On Tuesday, November 11, 2014 06:59:51 PM Neil Roberts wrote:
> > Kenneth Graunke writes:
> >
> > > drm-intel-next must have the new software checker turned on, which
> > > disallows non-whitelisted register writes (along with lib
On Tuesday, November 11, 2014 06:59:51 PM Neil Roberts wrote:
> Kenneth Graunke writes:
>
> > drm-intel-next must have the new software checker turned on, which
> > disallows non-whitelisted register writes (along with libva, so it
> > can't really be enabled upstream yet).
>
> For what it's wor
Kenneth Graunke writes:
> drm-intel-next must have the new software checker turned on, which
> disallows non-whitelisted register writes (along with libva, so it
> can't really be enabled upstream yet).
For what it's worth, I get the EINVAL error even on the stock Fedora 20
kernel on Haswell (an
On Monday, November 10, 2014 02:57:22 PM Neil Roberts wrote:
> I'm not really sure if I understand your reply correctly. Did you see
> that I also posted the corresponding kernel patch? I was testing my
> patch on top of the drm-intel-next branch with IvyBridge.
That's why. Ivybridge has had the
Neil Roberts writes:
> It looks like the PRM for Haswell says that MI_LOAD_REGISTER_MEM is
> converted to no-op for non-privileged buffers. However I can't find any
> mention of this for IvyBridge. Does that mean it's allowed on IvyBridge
> but it won't work on Haswell? I haven't tested it on Has
On Mon, Nov 10, 2014 at 2:57 PM, Neil Roberts wrote:
>
> The bit I mentioned about OACONTROL was just saying that the method of
> detecting whether we can write to OACONTROL specifically doesn't work.
> This is because writing to a register that is not in the whitelist
> returns EINVAL and Mesa ca
> On Fri, Nov 07, 2014 at 03:28:01PM +, Neil Roberts wrote:
>> Unfortunately these two source registers are not in the whitelist of
>> available registers in the kernel driver so this needs a kernel patch
>> to work. This patch tries to check whether it is possible to write to
>> this register
On Fri, Nov 07, 2014 at 03:28:01PM +, Neil Roberts wrote:
> Previously whenever a primitive is drawn the driver would call
> _mesa_check_conditional_render which blocks waiting for the result of the
> query to determine whether to render. On Gen7+ there is a bit in the
> 3DPRIMITIVE command whi
Previously whenever a primitive is drawn the driver would call
_mesa_check_conditional_render which blocks waiting for the result of the
query to determine whether to render. On Gen7+ there is a bit in the
3DPRIMITIVE command which can be used to disable the primitive based on the
value of a state
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