From: Marek Olšák <marek.ol...@amd.com> --- src/amd/common/ac_llvm_build.c | 23 +++++++++---------- src/amd/common/ac_nir_to_llvm.c | 4 ++-- src/gallium/drivers/radeonsi/si_shader.c | 4 ++-- .../drivers/radeonsi/si_shader_tgsi_alu.c | 2 +- 4 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 629cd2a7527..1c8d944db74 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -822,25 +822,24 @@ ac_build_fs_interp_mov(struct ac_llvm_context *ctx, return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov", ctx->f32, args, 4, AC_FUNC_ATTR_READNONE); } LLVMValueRef ac_build_gep0(struct ac_llvm_context *ctx, LLVMValueRef base_ptr, LLVMValueRef index) { LLVMValueRef indices[2] = { - LLVMConstInt(ctx->i32, 0, 0), + ctx->i32_0, index, }; - return LLVMBuildGEP(ctx->builder, base_ptr, - indices, 2, ""); + return LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, ""); } void ac_build_indexed_store(struct ac_llvm_context *ctx, LLVMValueRef base_ptr, LLVMValueRef index, LLVMValueRef value) { LLVMBuildStore(ctx->builder, value, ac_build_gep0(ctx, base_ptr, index)); } @@ -937,21 +936,21 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx, if (inst_offset) offset = LLVMBuildAdd(ctx->builder, offset, LLVMConstInt(ctx->i32, inst_offset, 0), ""); if (voffset) offset = LLVMBuildAdd(ctx->builder, offset, voffset, ""); LLVMValueRef args[] = { ac_to_float(ctx, vdata), LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""), - LLVMConstInt(ctx->i32, 0, 0), + ctx->i32_0, offset, LLVMConstInt(ctx->i1, glc, 0), LLVMConstInt(ctx->i1, slc, 0), }; char name[256]; snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s", types[CLAMP(num_channels, 1, 3) - 1]); ac_build_intrinsic(ctx, name, ctx->voidt, @@ -965,22 +964,22 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx, static const unsigned dfmt[] = { V_008F0C_BUF_DATA_FORMAT_32, V_008F0C_BUF_DATA_FORMAT_32_32, V_008F0C_BUF_DATA_FORMAT_32_32_32, V_008F0C_BUF_DATA_FORMAT_32_32_32_32 }; static const char *types[] = {"i32", "v2i32", "v4i32"}; LLVMValueRef args[] = { vdata, LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""), - LLVMConstInt(ctx->i32, 0, 0), - voffset ? voffset : LLVMConstInt(ctx->i32, 0, 0), + ctx->i32_0, + voffset ? voffset : ctx->i32_0, soffset, LLVMConstInt(ctx->i32, inst_offset, 0), LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0), LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0), LLVMConstInt(ctx->i1, glc, 0), LLVMConstInt(ctx->i1, slc, 0), }; char name[256]; snprintf(name, sizeof(name), "llvm.amdgcn.tbuffer.store.%s", types[CLAMP(num_channels, 1, 3) - 1]); @@ -998,21 +997,21 @@ ac_build_buffer_load_common(struct ac_llvm_context *ctx, LLVMValueRef vindex, LLVMValueRef voffset, unsigned num_channels, bool glc, bool slc, bool can_speculate, bool use_format) { LLVMValueRef args[] = { LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""), - vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0), + vindex ? vindex : ctx->i32_0, voffset, LLVMConstInt(ctx->i1, glc, 0), LLVMConstInt(ctx->i1, slc, 0) }; unsigned func = CLAMP(num_channels, 1, 3) - 1; LLVMTypeRef types[] = {ctx->f32, ctx->v2f32, ctx->v4f32}; const char *type_names[] = {"f32", "v2f32", "v4f32"}; char name[256]; @@ -1093,21 +1092,21 @@ LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx, LLVMValueRef ac_build_buffer_load_format_gfx9_safe(struct ac_llvm_context *ctx, LLVMValueRef rsrc, LLVMValueRef vindex, LLVMValueRef voffset, unsigned num_channels, bool glc, bool can_speculate) { LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->builder, rsrc, LLVMConstInt(ctx->i32, 2, 0), ""); - LLVMValueRef stride = LLVMBuildExtractElement(ctx->builder, rsrc, LLVMConstInt(ctx->i32, 1, 0), ""); + LLVMValueRef stride = LLVMBuildExtractElement(ctx->builder, rsrc, ctx->i32_1, ""); stride = LLVMBuildLShr(ctx->builder, stride, LLVMConstInt(ctx->i32, 16, 0), ""); LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder, LLVMIntUGT, elem_count, stride, ""), elem_count, stride, ""); LLVMValueRef new_rsrc = LLVMBuildInsertElement(ctx->builder, rsrc, new_elem_count, LLVMConstInt(ctx->i32, 2, 0), ""); return ac_build_buffer_load_common(ctx, new_rsrc, vindex, voffset, @@ -1160,21 +1159,21 @@ static void set_range_metadata(struct ac_llvm_context *ctx, LLVMSetMetadata(value, ctx->range_md_kind, range_md); } LLVMValueRef ac_get_thread_id(struct ac_llvm_context *ctx) { LLVMValueRef tid; LLVMValueRef tid_args[2]; tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false); - tid_args[1] = LLVMConstInt(ctx->i32, 0, false); + tid_args[1] = ctx->i32_0; tid_args[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.lo", ctx->i32, tid_args, 2, AC_FUNC_ATTR_READNONE); tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi", ctx->i32, tid_args, 2, AC_FUNC_ATTR_READNONE); set_range_metadata(ctx, tid, 0, 64); return tid; } @@ -1327,21 +1326,21 @@ ac_build_imsb(struct ac_llvm_context *ctx, AC_FUNC_ATTR_READNONE); /* The HW returns the last bit index from MSB, but NIR/TGSI wants * the index from LSB. Invert it by doing "31 - msb". */ msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false), msb, ""); LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true); LLVMValueRef cond = LLVMBuildOr(ctx->builder, LLVMBuildICmp(ctx->builder, LLVMIntEQ, - arg, LLVMConstInt(ctx->i32, 0, 0), ""), + arg, ctx->i32_0, ""), LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg, all_ones, ""), ""); return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, ""); } LLVMValueRef ac_build_umsb(struct ac_llvm_context *ctx, LLVMValueRef arg, LLVMTypeRef dst_type) @@ -2396,21 +2395,21 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx, /* The value of 1 means that ffs(x=0) = undef, so LLVM won't * add special code to check for x=0. The reason is that * the LLVM behavior for x=0 is different from what we * need here. However, LLVM also assumes that ffs(x) is * in [0, 31], but GLSL expects that ffs(0) = -1, so * a conditional assignment to handle 0 is still required. * * The hardware already implements the correct behavior. */ - LLVMConstInt(ctx->i1, 1, false), + ctx->i1true, }; LLVMValueRef lsb = ac_build_intrinsic(ctx, intrin_name, type, params, 2, AC_FUNC_ATTR_READNONE); if (src0_bitsize == 64) { lsb = LLVMBuildTrunc(ctx->builder, lsb, ctx->i32, ""); } @@ -2650,21 +2649,21 @@ LLVMValueRef ac_cast_ptr(struct ac_llvm_context *ctx, LLVMValueRef ptr, } LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value, unsigned count) { unsigned num_components = ac_get_llvm_num_components(value); if (count == num_components) return value; LLVMValueRef masks[] = { - LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false), + ctx->i32_0, ctx->i32_1, LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)}; if (count == 1) return LLVMBuildExtractElement(ctx->builder, value, masks[0], ""); LLVMValueRef swizzle = LLVMConstVector(masks, count); return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, ""); } diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 61e79ec9138..192ef079215 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -420,21 +420,21 @@ static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx, LLVMValueRef result; if (HAVE_LLVM < 0x0700) { LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), ""); result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed); result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, ""); } else { /* FIXME: LLVM 7 returns incorrect result when count is 0. * https://bugs.freedesktop.org/show_bug.cgi?id=107276 */ - LLVMValueRef zero = LLVMConstInt(ctx->i32, 0, false); + LLVMValueRef zero = ctx->i32_0; LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), ""); LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, ""); result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed); result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, ""); result = LLVMBuildSelect(ctx->builder, icond2, zero, result, ""); } return result; } @@ -1428,21 +1428,21 @@ static uint32_t widen_mask(uint32_t mask, unsigned multiplier) for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i) if (mask & (1u << i)) new_mask |= ((1u << multiplier) - 1u) << (i * multiplier); return new_mask; } static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned start, unsigned count) { LLVMValueRef mask[] = { - LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false), + ctx->i32_0, ctx->i32_1, LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) }; unsigned src_elements = ac_get_llvm_num_components(src); if (count == src_elements) { assert(start == 0); return src; } else if (count == 1) { assert(start < src_elements); return LLVMBuildExtractElement(ctx->builder, src, mask[start], ""); diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index c51e91b1d3d..71a28b1fd99 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2598,21 +2598,21 @@ static void si_alpha_test(struct lp_build_tgsi_context *bld_base, }; LLVMRealPredicate cond = cond_map[ctx->shader->key.part.ps.epilog.alpha_func]; assert(cond); LLVMValueRef alpha_ref = LLVMGetParam(ctx->main_fn, SI_PARAM_ALPHA_REF); LLVMValueRef alpha_pass = LLVMBuildFCmp(ctx->ac.builder, cond, alpha, alpha_ref, ""); ac_build_kill_if_false(&ctx->ac, alpha_pass); } else { - ac_build_kill_if_false(&ctx->ac, LLVMConstInt(ctx->i1, 0, 0)); + ac_build_kill_if_false(&ctx->ac, ctx->i1false); } } static LLVMValueRef si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context *bld_base, LLVMValueRef alpha, unsigned samplemask_param) { struct si_shader_context *ctx = si_shader_context(bld_base); LLVMValueRef coverage; @@ -6143,21 +6143,21 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx) int i; for (i = 0; i < 4; i++) { ctx->gs_next_vertex[i] = ac_build_alloca(&ctx->ac, ctx->i32, ""); } } if (sel->force_correct_derivs_after_kill) { ctx->postponed_kill = ac_build_alloca_undef(&ctx->ac, ctx->i1, ""); /* true = don't kill. */ - LLVMBuildStore(ctx->ac.builder, LLVMConstInt(ctx->i1, 1, 0), + LLVMBuildStore(ctx->ac.builder, ctx->i1true, ctx->postponed_kill); } if (sel->tokens) { if (!lp_build_tgsi_llvm(bld_base, sel->tokens)) { fprintf(stderr, "Failed to translate shader from TGSI to LLVM\n"); return false; } } else { if (!si_nir_build_llvm(ctx, sel->nir)) { diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c index 028ca8b0dd6..f54d025aec0 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c @@ -64,21 +64,21 @@ static void kil_emit(const struct lp_build_tgsi_action *action, ctx->ac.f32_0, ""); } /* And the conditions together */ for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) { conds[i - 1] = LLVMBuildAnd(builder, conds[i], conds[i - 1], ""); } visible = conds[0]; } else { assert(emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL); - visible = LLVMConstInt(ctx->i1, false, 0); + visible = ctx->i1false; } si_llvm_emit_kill(&ctx->abi, visible); } static void emit_icmp(const struct lp_build_tgsi_action *action, struct lp_build_tgsi_context *bld_base, struct lp_build_emit_data *emit_data) { unsigned pred; -- 2.17.1 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev