From: "Lonnberg, Toni" <toni.lonnb...@intel.com>
Pre-work for the new shader assembler.
To make it easier to read the shader disassembly, the message descriptor is
typed as
unsigned so it's easier to decode the individual parts from the disassembled
hexadecimal value.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 +-
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index f4bec33..c1868d6 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -624,7 +624,7 @@ brw_set_message_descriptor(struct brw_codegen *p,
{
const struct gen_device_info *devinfo = p->devinfo;
- brw_set_src1(p, inst, brw_imm_d(0));
+ brw_set_src1(p, inst, brw_imm_ud(0));
/* For indirect sends, `inst` will not be the SEND/SENDC instruction
* itself; instead, it will be a MOV/OR into the address register.
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 6ea6ca8..966b7b8 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -480,7 +480,7 @@ fs_generator::generate_urb_write(fs_inst *inst, struct
brw_reg payload)
brw_set_dest(p, insn, brw_null_reg());
brw_set_src0(p, insn, payload);
- brw_set_src1(p, insn, brw_imm_d(0));
+ brw_set_src1(p, insn, brw_imm_ud(0));
brw_inst_set_sfid(p->devinfo, insn, BRW_SFID_URB);
brw_inst_set_urb_opcode(p->devinfo, insn, GEN8_URB_OPCODE_SIMD8_WRITE);
--
2.7.4
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