Re: [Mesa-dev] [PATCH 1/2] intel: gen-decoder: rework how we handle groups

2017-05-30 Thread Lionel Landwerlin
On 30/05/17 22:39, Rafael Antognolli wrote: On Tue, May 30, 2017 at 08:59:06PM +0100, Lionel Landwerlin wrote: The current way of handling groups doesn't seem to be able to handle MI_LOAD_REGISTER_* with more than one register. Hi Lionel, I don't think this is entirely true. I have added

Re: [Mesa-dev] [PATCH 1/2] intel: gen-decoder: rework how we handle groups

2017-05-30 Thread Kenneth Graunke
On Tuesday, May 30, 2017 2:39:42 PM PDT Rafael Antognolli wrote: > On Tue, May 30, 2017 at 08:59:06PM +0100, Lionel Landwerlin wrote: > > The current way of handling groups doesn't seem to be able to handle > > MI_LOAD_REGISTER_* with more than one register. Somewhat related, I fixed a bunch of

Re: [Mesa-dev] [PATCH 1/2] intel: gen-decoder: rework how we handle groups

2017-05-30 Thread Rafael Antognolli
On Tue, May 30, 2017 at 08:59:06PM +0100, Lionel Landwerlin wrote: > The current way of handling groups doesn't seem to be able to handle > MI_LOAD_REGISTER_* with more than one register. Hi Lionel, I don't think this is entirely true. I have added support to read variable length structs on

[Mesa-dev] [PATCH 1/2] intel: gen-decoder: rework how we handle groups

2017-05-30 Thread Lionel Landwerlin
The current way of handling groups doesn't seem to be able to handle MI_LOAD_REGISTER_* with more than one register. This change reworks the way we handle groups by building a traversal list on load the GENXML files. Let's say you have Instruction { Field0 Field1 Field2 Group0 (count=2)