instead of using the surface state x/y-offsets. These are not available in the gen8 anymore.
No regressions on IVB and SNB. Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com> --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 7 +++++++ src/mesa/drivers/dri/i965/gen6_blorp.cpp | 22 ++++++++++++++++------ src/mesa/drivers/dri/i965/gen7_blorp.cpp | 20 +++++++++++++++----- 3 files changed, 38 insertions(+), 11 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 0b749a9..ff590b5 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -195,6 +195,13 @@ brw_blorp_params::configure_miplevel_offsets() uint32_t dst_tile_orig_space_x = 0; uint32_t dst_tile_orig_space_y = 0; + if (dst.map_stencil_as_y_tiled) { + dst.compute_tile_offsets(&dst.tile_x, &dst.tile_y); + + dst_tile_orig_space_x = dst.tile_x / 2; + dst_tile_orig_space_y = dst.tile_y * 2; + } + /* Compensate for the adjusted destination offsets when calculating the * corresponding sampling coordinates for the source. */ diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 8f257a7..5cd947b 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -378,7 +378,6 @@ gen6_blorp_emit_surface_state(struct brw_context *brw, height /= 2; } struct intel_region *region = surface->mt->region; - uint32_t tile_x, tile_y; uint32_t *surf = (uint32_t *) brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 6 * 4, 32, @@ -392,6 +391,13 @@ gen6_blorp_emit_surface_state(struct brw_context *brw, /* reloc */ surf[1] = surface->compute_page_offset() + region->bo->offset64; + /* When the tile offsets are handled by the blorp program directly the + * dimensions of the surface need to be updated to allow full access. + */ + if (surface->map_stencil_as_y_tiled && ¶ms->dst == surface) { + width += surface->tile_x; + height += surface->tile_y; + } surf[2] = (0 << BRW_SURFACE_LOD_SHIFT | (width - 1) << BRW_SURFACE_WIDTH_SHIFT | (height - 1) << BRW_SURFACE_HEIGHT_SHIFT); @@ -407,12 +413,16 @@ gen6_blorp_emit_surface_state(struct brw_context *brw, (pitch_bytes - 1) << BRW_SURFACE_PITCH_SHIFT); surf[4] = brw_get_surface_num_multisamples(surface->num_samples); + surf[5] = (surface->mt->align_h == 4 ? + BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0); - surface->compute_tile_offsets(&tile_x, &tile_y); - surf[5] = ((tile_x / 4) << BRW_SURFACE_X_OFFSET_SHIFT | - (tile_y / 2) << BRW_SURFACE_Y_OFFSET_SHIFT | - (surface->mt->align_h == 4 ? - BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0)); + if (!surface->map_stencil_as_y_tiled || ¶ms->dst != surface) { + uint32_t tile_x, tile_y; + + surface->compute_tile_offsets(&tile_x, &tile_y); + surf[5] |= (SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) | + SET_FIELD(tile_y / 2, BRW_SURFACE_Y_OFFSET)); + } /* Emit relocation to surface contents */ drm_intel_bo_emit_reloc(brw->batch.bo, diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index f6afab2..9e51b03 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -150,7 +150,6 @@ gen7_blorp_emit_surface_state(struct brw_context *brw, * gen6_blorp_emit_surface_state). */ struct intel_region *region = surface->mt->region; - uint32_t tile_x, tile_y; const uint8_t mocs = GEN7_MOCS_L3; uint32_t tiling = surface->map_stencil_as_y_tiled @@ -177,10 +176,21 @@ gen7_blorp_emit_surface_state(struct brw_context *brw, /* reloc */ surf[1] = surface->compute_page_offset() + region->bo->offset64; - surface->compute_tile_offsets(&tile_x, &tile_y); - surf[5] = SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) | - SET_FIELD(tile_y / 2, BRW_SURFACE_Y_OFFSET) | - SET_FIELD(mocs, GEN7_SURFACE_MOCS); + surf[5] = SET_FIELD(mocs, GEN7_SURFACE_MOCS); + + /* When the tile offsets are handled by the blorp program directly the + * dimensions of the surface need to be updated to allow full access. + */ + if (surface->map_stencil_as_y_tiled && is_render_target) { + width += surface->tile_x; + height += surface->tile_y; + } else { + uint32_t tile_x, tile_y; + + surface->compute_tile_offsets(&tile_x, &tile_y); + surf[5] |= (SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) | + SET_FIELD(tile_y / 2, BRW_SURFACE_Y_OFFSET)); + } surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) | SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT); -- 1.8.3.1 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev