This is similar to clflush_range except that it puts the mfence on the
other side to ensure caches are flushed prior to reading.
Cc: "13.0 17.0" <mesa-sta...@lists.freedesktop.org>
---
src/intel/vulkan/anv_private.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index da1ca29..5344f07 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -452,6 +452,19 @@ anv_clflush_range(void *start, size_t size)
}
}
+static inline void
+anv_invalidate_range(void *start, size_t size)
+{
+ void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
+ void *end = start + size;
+
+ while (p < end) {
+ __builtin_ia32_clflush(p);
+ p += CACHELINE_SIZE;
+ }
+ __builtin_ia32_mfence();
+}
+
static void inline
anv_state_clflush(struct anv_state state)
{
--
2.5.0.400.gff86faf
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