Re: [Mesa-dev] [RFC PATCH 2/2] panfrost/midgard: Ignore imov/fmov distinction

2019-05-13 Thread Alyssa Rosenzweig
> Using nir_gather_ssa_types is wrong. In both Midgard and NIR, SSA > values are just a bunch of bits with no int/float distinction, and > therefore you shouldn't need to know how a register is used to compile > the instruction producing it. The only distinction between imov and > fmov, in both

Re: [Mesa-dev] [RFC PATCH 2/2] panfrost/midgard: Ignore imov/fmov distinction

2019-05-13 Thread Connor Abbott
On Mon, May 13, 2019 at 4:48 PM Alyssa Rosenzweig wrote: > > > Using nir_gather_ssa_types is wrong. In both Midgard and NIR, SSA > > values are just a bunch of bits with no int/float distinction, and > > therefore you shouldn't need to know how a register is used to compile > > the instruction

Re: [Mesa-dev] [RFC PATCH 2/2] panfrost/midgard: Ignore imov/fmov distinction

2019-05-13 Thread Connor Abbott
Using nir_gather_ssa_types is wrong. In both Midgard and NIR, SSA values are just a bunch of bits with no int/float distinction, and therefore you shouldn't need to know how a register is used to compile the instruction producing it. The only distinction between imov and fmov, in both NIR and the

[Mesa-dev] [RFC PATCH 2/2] panfrost/midgard: Ignore imov/fmov distinction

2019-05-12 Thread Alyssa Rosenzweig
We use nir_gather_ssa_types, rather than the instruction name, to decide how moves should be compiled. This is important since the imov/fmov never mapped to what Midgard needed to begin with. This should allow Jason's imov/fmov merger to proceed without regressing Panfrost, since this is one less