On Wed, 2011-10-19 at 10:49 -0400, Tom Stellard wrote:
On Fri, 2011-10-07 at 10:14 -0400, Vadim Girlin wrote:
Hi,
Recently I've been working on the shader optimization for r600g, and now
I have the initial working implementation of simple alu scheduler and
register allocator. It has no
Hi Vadim,
wow quite impressive, does it also contains peep-hole optimisation?
I tried to implement that once, but failed because I never got all the
dependencies between opcodes correctly resolved. Rescheduling export
instructions and setting the barrier flag of CF instructions correctly
can
On Sat, 2011-10-08 at 11:35 +0200, Christian König wrote:
Hi Vadim,
wow quite impressive, does it also contains peep-hole optimisation?
Not yet, I want to create a stable framework first (conversion to the
internal representation and back to the bytecode), and this is still
not finished.
