Re: [Mesa-dev] [PATCH] nvc0: increase alignment to 256 for texture buffers on fermi

2017-03-02 Thread Ilia Mirkin
On Thu, Mar 2, 2017 at 6:37 PM, Samuel Pitoiset wrote: > Replying here. > > Yes, it makes sense, but looks like Roy still has some rendering issues with > Pidgin even with that patch. Maybe something else is also broken in > nvc0_validate_suf()? Could be. Could also be

Re: [Mesa-dev] [PATCH] nvc0: increase alignment to 256 for texture buffers on fermi

2017-03-02 Thread Samuel Pitoiset
Replying here. Yes, it makes sense, but looks like Roy still has some rendering issues with Pidgin even with that patch. Maybe something else is also broken in nvc0_validate_suf()? Either way: Acked-by: Samuel Pitoiset On 03/01/2017 05:09 PM, Ilia Mirkin wrote:

Re: [Mesa-dev] [PATCH] nvc0: increase alignment to 256 for texture buffers on fermi

2017-03-01 Thread Ilia Mirkin
On Wed, Mar 1, 2017 at 11:54 AM, Roland Scheidegger wrote: > Am 01.03.2017 um 17:09 schrieb Ilia Mirkin: >> When binding as textures, the alignment can be 16. However when binding >> as an image, the address has to be aligned to 256. (Also when binding as >> an RT, but that

Re: [Mesa-dev] [PATCH] nvc0: increase alignment to 256 for texture buffers on fermi

2017-03-01 Thread Roland Scheidegger
Am 01.03.2017 um 17:09 schrieb Ilia Mirkin: > When binding as textures, the alignment can be 16. However when binding > as an image, the address has to be aligned to 256. (Also when binding as > an RT, but that can't happen with GL or current gallium APIs.) FWIW binding buffers as rt is fully