Hi,
A long time ago back in the beginning of May
I submitted a patch to add to Mesa's support
for the GLES2 extensions:
GL_OES_texture_float,
GL_OES_texture_half_float,
GL_OES_texture_float_linear and
GL_OES_texture_half_float_linear
A linky to the post is here:
Hi,
A long time back in May, I made a very small patch to the GLSL pre-processor
to define the symbol GL_OES_standard_derivatives (as 1), if the extension is
supported. Without that patch, shaders that detect if they can use dFdx, dFdy
and fwidth via #ifdef's do not function correctly (namely
We will program the gen6 renderbuffer surface state differently to
enable layered rendering on gen6.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
For gen6 we will use the ALL_SLICES_AT_EACH_LOD miptree layout for
separate stencil/hiz. This is needed because gen6 hiz and separate
stencil only support a single miplevel. When accessing the other LODs,
we will program a tile aligned offset for the bo.
PRM Volume 1, Part 1, 7.18.3.7.2 For
Since gen6 separate stencil hiz only supports LOD0, we need to
program an offset to the LOD when emitting the separate stencil/hiz.
v3:
* Use new array_layout enum
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
Since this code was branched from brw_misc_state.c, it had support for
gen 6. We can now remove this.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/drivers/dri/i965/gen6_depth_state.c | 40 +---
1 file changed, 13 insertions(+), 27 deletions(-)
In the gen6 PRM Volume 1 Part 1: Graphics Core, Section
7.18.3.7.1 (Surface Arrays For all surfaces other than separate
stencil buffer):
[DevSNB] Errata: Sampler MSAA Qpitch will be 4 greater than the
value calculated in the equation above , for every other odd Surface
Height starting from 1
(08ef1dd for gen6)
This will be used in 3DSTATE_DEPTH_BUFFER in a later patch.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3
Previously array_layout ALL_SLICES_AT_EACH_LOD was only used for array
spacing lod0 on gen7+ and therefore was only used with a single mip
level.
gen6 separate stencil hiz only support LOD0, so we need to allocate
the miptree similar to gen7+ array spacing lod0, except we also need
space for
(171e633 for gen6)
This will be used in 3DSTATE_DEPTH_BUFFER in a later patch.
Note: Cube maps are treated as 2D arrays with 6 times as
many array elements as the cube map array would have.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen
(a23cfb8 for gen6)
In layered rendering this will be 0. Otherwise it will be the
selected slice.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 +++
src/mesa/drivers/dri/i965/gen6_depth_state.c | 10 ++
2 files changed, 13
We will program the gen6 hiz depth state differently to enable layered
rendering on gen6.
v2:
* Remove unneeded gen6_emit_depthbuffer as suggested by Topi
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
Rather than pointing the surface_state directly at a single
sub-image of the texture for rendering, we now point the
surface_state at the top level of the texture, and configure
the surface_state as needed based on this.
v2:
* Use SET_FIELD as suggested by Topi
* Simplify min_array_element
Gen6 doesn't support multiple miplevels for hiz and stencil.
Therefore, we must point to the LOD directly during rendering.
But, we also have removed the tile offsets from normal depth surfaces,
so we need to align each LOD to a tile boundary for hiz and stencil.
v3:
* Use new array_layout
Since this code was branched from brw_wm_surface_state.c, it had
support for gen 6. We can now remove this.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/gen6_surface_state.c | 22 --
1
(bc1acaa for gen6)
This will be used in 3DSTATE_DEPTH_BUFFER in a later patch.
Note: Cube maps are treated as 2D arrays with 6 times as
many array elements as the cube map array would have.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen
gen6 does not support multiple miplevels with separate
stencil/hiz. Therefore we need to layout its miptree with no mipmap
spacing between the slices of each miplevel.
v3:
* Use new array_layout enum
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen
We will want to setup gen6 separate stencil and hiz miptrees in a
layout that is similar to array_spacing_lod0. This is needed because
gen6 hiz and stencil only support a single mip-level.
In both use cases (gen7+ LOD0 spacing gen6 separate stencil/hiz),
the array slices will be packed at each
(e3a49e1 for gen6)
This will be used in 3DSTATE_DEPTH_BUFFER in a later patch.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 13 +
1 file changed, 13 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
v3 has some changes suggested by Topi and Ken on the July 18
version. These patches do not have Reviewed-by:
* 04 i965/gen6: Adjust render height in errata case for MSAA
* 06 i965/gen6_depth_state.c: Remove (gen 6) code paths
* 10 i965/gen6 depth surface: calculate minimum array element being
(f3c886b for gen6)
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
src/mesa/drivers/dri/i965/intel_fbo.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
(bf25ee2 for gen6)
Previously we would always find the 2D sub-surface of interest,
and then program the surface to this location. Now we always
program the 3DSTATE_DEPTH_BUFFER at the start of the surface.
To select the lod/slice, we utilize the lod minimum array
element fields.
We also must
On Tue, Jul 29, 2014 at 05:10:09PM -0400, enpeng xu wrote:
Hi Topi,
On mesa mailing list,I saw you posted some patches for supporting
OES_external_image externsion, you also added yuv buffer format support,
it's really useful, but looks like just part of codes merged into mesa,
On Fri, Aug 01, 2014 at 12:53:43AM -0700, Jordan Justen wrote:
(bf25ee2 for gen6)
Previously we would always find the 2D sub-surface of interest,
and then program the surface to this location. Now we always
program the 3DSTATE_DEPTH_BUFFER at the start of the surface.
To select the
On Thu, Jul 31, 2014 at 01:09:17AM -0700, Jordan Justen wrote:
On Tue, Jul 22, 2014 at 3:09 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Fri, Jul 18, 2014 at 02:16:46PM -0700, Jordan Justen wrote:
(bf25ee2 for gen6)
Previously we would always find the 2D sub-surface of
On Fri, Aug 01, 2014 at 12:53:36AM -0700, Jordan Justen wrote:
Since this code was branched from brw_misc_state.c, it had support for
gen 6. We can now remove this.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/drivers/dri/i965/gen6_depth_state.c | 40
On Fri, Aug 01, 2014 at 12:53:41AM -0700, Jordan Justen wrote:
(e3a49e1 for gen6)
This will be used in 3DSTATE_DEPTH_BUFFER in a later patch.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
On Fri, Aug 01, 2014 at 12:53:40AM -0700, Jordan Justen wrote:
(a23cfb8 for gen6)
In layered rendering this will be 0. Otherwise it will be the
selected slice.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 +++
On 01.08.2014 06:39, Jason Ekstrand wrote:
This adds the API entrypoint, error checking logic, and a driver hook for
the ARB_copy_image extension.
v2: Fix a typo in ARB_copy_image.xml and add it to the makefile
v3: Put ARB_copy_image.xml in the right place alphebetically in the makefile
On 31.07.2014 21:28, Jason Ekstrand wrote:
This, together with the meta path, provides a almost-complete implemetation
of ARB_copy_image. The only case that won't work is if one of the textures
is compressed and has a pitch greater than INT16_MAX. I think that's good
enough to justify
https://bugs.freedesktop.org/show_bug.cgi?id=80848
Tapani Pälli lem...@gmail.com changed:
What|Removed |Added
CC||lem...@gmail.com
---
https://bugs.freedesktop.org/show_bug.cgi?id=80848
--- Comment #19 from Tapani Pälli lem...@gmail.com ---
(In reply to comment #18)
I had cross-compilation problems on Ubuntu (building 32bit Mesa on 64bit
environment) and my problems went away by reverting
The initial firmware for hawaii does not support type3 nop packet.
Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2.
If the returned value is 2, then the new firmware is used.
This patch uses type2 for the old firmware and type3 for the new firmware.
It fixes the cases when
On Fri, Aug 1, 2014 at 3:09 PM, Andreas Boll andreas.boll@gmail.com wrote:
The initial firmware for hawaii does not support type3 nop packet.
Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2.
If the returned value is 2, then the new firmware is used.
This patch uses
Is this patch necessary? I think the read buffer is part of the
framebuffer state so any meta function that binds its own framebuffer
won't need to save the read buffer, right? This is the case for
_mesa_meta_CopyImageSubData_uncompressed which binds both a read and
write FBO so I think it
From: Marek Olšák marek.ol...@amd.com
We don't support this type of X acceleration and we never did.
Other drivers might want to do the same thing.
---
configure.ac | 6 +++---
src/gallium/targets/xa/Makefile.am | 32
2 files changed, 3
Jason Ekstrand ja...@jlekstrand.net writes:
+bool
+_mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx,
+ struct gl_texture_image
*src_tex_image,
+ int src_x, int src_y, int src_z,
+
There is one line that is 116 characters long (!) but apart from that:
Reviewed-by: Neil Roberts n...@linux.intel.com
Regards,
- Neil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Pushed, thanks.
Marek
On Thu, Jul 24, 2014 at 9:18 PM, Aditya Atluri adityaavina...@gmail.com wrote:
---
src/mesa/main/bufferobj.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index
The initial firmware for hawaii does not support type3 nop packet.
Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2.
If the returned value is 2, then the new firmware is used.
This patch uses type2 for the old firmware and type3 for the new firmware.
It fixes the cases when
On 01.08.2014 23:46, Andreas Boll wrote:
2014-08-01 16:32 GMT+02:00 Michel Dänzer mic...@daenzer.net:
On 01.08.2014 22:09, Andreas Boll wrote:
The initial firmware for hawaii does not support type3 nop packet.
Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2.
If the
On Fri, Aug 01, 2014 at 03:55:56PM +0200, Marek Olšák wrote:
From: David Heidelberger david.heidelber...@ixit.cz
Get rid of error Failed to build loop info by fixing failure in cases
like
4: SGE temp[2].x, temp[0]., const[0].;
5: CMP temp[1].x, -temp[2]., const[0].,
On 01/08/14 14:45, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
We don't support this type of X acceleration and we never did.
Other drivers might want to do the same thing.
Practically XA+radeon is a thing since mesa 10.2, which uses a dynamic method
(so called pipe-loader) of
2014-08-01 16:50 GMT+02:00 Michel Dänzer mic...@daenzer.net:
On 01.08.2014 23:46, Andreas Boll wrote:
2014-08-01 16:32 GMT+02:00 Michel Dänzer mic...@daenzer.net:
On 01.08.2014 22:09, Andreas Boll wrote:
The initial firmware for hawaii does not support type3 nop packet.
Detect the new hawaii
On 30/07/14 05:30, Ian Romanick wrote:
I think we should replace all the #ifdef garbage around this with a
HAVE_STRTOD_L macro. Having lots of platform knowledge sprinkled around
the code is ugly, at best.
Asking for the last guy to refactor it because the previous N people before
him did
When the compiler is not capable/does not accept -msse4.1 while the target
has the instruction set we'll blow up as _mesa_streaming_load_memcpy is
going to be undefined.
To make sure that never happens, wrap the runtime cpu check+caller in an
ifdef thus do not compile that hunk of the code.
Fix
On Fri, Aug 1, 2014 at 2:28 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Fri, Aug 01, 2014 at 12:53:36AM -0700, Jordan Justen wrote:
Since this code was branched from brw_misc_state.c, it had support for
gen 6. We can now remove this.
Signed-off-by: Jordan Justen
On Fri, Aug 01, 2014 at 09:18:00AM -0700, Jordan Justen wrote:
On Fri, Aug 1, 2014 at 2:28 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Fri, Aug 01, 2014 at 12:53:36AM -0700, Jordan Justen wrote:
Since this code was branched from brw_misc_state.c, it had support for
gen 6.
Marek Olšák mar...@gmail.com writes:
I have a few things.
Thanks for the feedback, Marek I appreciate this.
1) Please apply the first attached patch, which fixes is a build
failure caused by one of the recent fixes in the branch. (that driver
is not built by default)
...
2) Please
We should assert when either the function or the flag pointer
is null or we'll end up with a null reference a few lines later.
Currently unused by mesa thus it has gone unnoticed.
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
include/c11/threads_win32.h | 2 +-
1 file changed, 1
... for win32 builds. Spotted this warning when I've imported the
library into waffle, and gave mingw-w64-gcc a bash at compiling it.
src/waffle/core/wcore_display.c:37:5: warning: missing braces around
initializer [-Wmissing-braces]
static mtx_t mutex = _MTX_INITIALIZER_NP;
^
Signed-off-by:
On Fri, Aug 01, 2014 at 12:53:44AM -0700, Jordan Justen wrote:
We will want to setup gen6 separate stencil and hiz miptrees in a
layout that is similar to array_spacing_lod0. This is needed because
gen6 hiz and stencil only support a single mip-level.
In both use cases (gen7+ LOD0 spacing
On Fri, Aug 1, 2014 at 2:56 AM, Juha-Pekka Heikkila
juhapekka.heikk...@gmail.com wrote:
On 01.08.2014 06:39, Jason Ekstrand wrote:
This adds the API entrypoint, error checking logic, and a driver hook for
the ARB_copy_image extension.
v2: Fix a typo in ARB_copy_image.xml and add it to
Similarly to an older patch. This is the minimum needed to fix the
bug but there are other meta-paths remaining that have the bit
since its introduction but not before.
commit e526ebf35c113d59eb0b860e492c1308d3862ee9
Author: Kenneth Graunke kenn...@whitecape.org
Date: Mon May 5 14:03:46 2014
So... going by our usual release cycle, I should make the 10.3 release
branch... today. I don't think that's a good idea due, at the very
least, to the short notice. Here's my proposal:
8/15: Create 10.3 release branch, RC1
8/22: RC2
8/29: RC3
9/5: Mesa 10.3 final
The previous release cycle
The initial firmware for hawaii does not support type3 nop packet.
Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2.
If the returned value is 3, then the new firmware is used.
This patch uses type2 for the old firmware and type3 for the new firmware.
It fixes the cases when
Connor Abbott cwabbo...@gmail.com writes:
On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
That's not necessarily true - you could want to spill a trivially
colored register that interferes with a non trivially colored
register,
On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
That's not necessarily true - you could want to spill a trivially
Connor Abbott cwabbo...@gmail.com writes:
On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
That's not necessarily true -
On Fri, Aug 1, 2014 at 2:44 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Fri, Aug 01, 2014 at 12:53:40AM -0700, Jordan Justen wrote:
(a23cfb8 for gen6)
In layered rendering this will be 0. Otherwise it will be the
selected slice.
Signed-off-by: Jordan Justen
On Fri, Aug 1, 2014 at 9:28 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Fri, Aug 01, 2014 at 09:18:00AM -0700, Jordan Justen wrote:
On Fri, Aug 1, 2014 at 2:28 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Fri, Aug 01, 2014 at 12:53:36AM -0700, Jordan Justen wrote:
On Fri, Aug 1, 2014 at 1:53 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Fri, Aug 01, 2014 at 12:53:43AM -0700, Jordan Justen wrote:
(bf25ee2 for gen6)
Previously we would always find the 2D sub-surface of interest,
and then program the surface to this location. Now we always
On Mon, 2014-07-28 at 10:56 -0600, Brian Paul wrote:
On 07/25/2014 08:33 AM, Jan Vesely wrote:
warning: type qualifiers ignored on function return type
Signed-off-by: Jan Vesely jan.ves...@rutgers.edu
---
src/gallium/auxiliary/tgsi/tgsi_ureg.c | 2 +-
On Fri, Aug 1, 2014 at 7:21 AM, Neil Roberts n...@linux.intel.com wrote:
Jason Ekstrand ja...@jlekstrand.net writes:
This, together with the meta path, provides a almost-complete
implemetation of ARB_copy_image. The only case that won't work is if
one of the textures is compressed and has
On Fri, Aug 1, 2014 at 6:48 AM, Neil Roberts n...@linux.intel.com wrote:
Jason Ekstrand ja...@jlekstrand.net writes:
+bool
+_mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx,
+ struct gl_texture_image
*src_tex_image,
+
On Fri, Aug 1, 2014 at 12:25 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt e...@anholt.net wrote:
On Fri, Aug 1, 2014 at 6:44 AM, Neil Roberts n...@linux.intel.com wrote:
Is this patch necessary? I think the read buffer is part of the
framebuffer state so any meta function that binds its own framebuffer
won't need to save the read buffer, right? This is the case for
This, together with the meta path, provides a almost-complete implemetation
of ARB_copy_image. The only case that won't work is if one of the textures
is compressed and has a pitch greater than INT16_MAX. I think that's good
enough to justify turning on the extension.
v2: Add a fallback memcpy
On Wed, Jul 30, 2014 at 2:29 PM, Ian Romanick i...@freedesktop.org wrote:
On 07/29/2014 05:02 PM, Jason Ekstrand wrote:
On Fri, Jun 6, 2014 at 4:57 PM, Anuj Phogat anuj.pho...@gmail.com
mailto:anuj.pho...@gmail.com wrote:
Fixes gles3 Khronos CTS test:
On Wed, Jun 11, 2014 at 11:09 AM, Anuj Phogat anuj.pho...@gmail.com wrote:
Adding mesa-dev to the conversation.
On Wed, Jun 11, 2014 at 10:52 AM, Anuj Phogat anuj.pho...@gmail.com
wrote:
On Wed, Jun 11, 2014 at 10:28 AM, Courtney Goeltzenleuchter
court...@lunarg.com wrote:
On Fri,
On 06/18/2014 05:49 PM, Anuj Phogat wrote:
Fixes gles3 Khronos CTS test:
egl_create_context.egl_create_context
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/egl/main/eglcontext.c | 11 ---
1 file changed, 8 insertions(+), 3
On 08/01/2014 09:41 AM, Emil Velikov wrote:
We should assert when either the function or the flag pointer
is null or we'll end up with a null reference a few lines later.
Currently unused by mesa thus it has gone unnoticed.
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
On 08/01/2014 09:41 AM, Emil Velikov wrote:
... for win32 builds. Spotted this warning when I've imported the
library into waffle, and gave mingw-w64-gcc a bash at compiling it.
src/waffle/core/wcore_display.c:37:5: warning: missing braces around
initializer [-Wmissing-braces]
static mtx_t
On Fri, Aug 1, 2014 at 3:03 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
On Wed, Jun 11, 2014 at 11:09 AM, Anuj Phogat anuj.pho...@gmail.com wrote:
Adding mesa-dev to the conversation.
On Wed, Jun 11, 2014 at 10:52 AM, Anuj Phogat anuj.pho...@gmail.com
wrote:
On Wed, Jun 11, 2014 at
On 02/08/14 00:26, Ian Romanick wrote:
On 08/01/2014 09:41 AM, Emil Velikov wrote:
... for win32 builds. Spotted this warning when I've imported the
library into waffle, and gave mingw-w64-gcc a bash at compiling it.
src/waffle/core/wcore_display.c:37:5: warning: missing braces around
From: Ian Romanick ian.d.roman...@intel.com
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 72 --
1 file changed, 72 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
From: Ian Romanick ian.d.roman...@intel.com
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
---
src/mesa/main/uniform_query.cpp | 9 ++---
src/mesa/main/uniforms.h| 19 ---
2 files changed, 6 insertions(+), 22 deletions(-)
diff --git
From: Ian Romanick ian.d.roman...@intel.com
This simplifies all the callers, and it enables the removal of one of
the function parameters.
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
---
src/mesa/main/uniform_query.cpp | 61 -
1 file changed, 30
From: Ian Romanick ian.d.roman...@intel.com
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
---
src/mesa/main/uniform_query.cpp | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index 7b089fa..2dc9f27
From: Ian Romanick ian.d.roman...@intel.com
Also delete the comment before that function. Everything in that
comment was either stale, wrong, or captured elsewhere.
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
---
src/mesa/main/uniform_query.cpp | 4 +---
src/mesa/main/uniforms.c
From: Roland Scheidegger srol...@vmware.com
This just covers the resource side of things, not the actual sampling.
Here things are trivial as cube map arrays are identical to 2d arrays in
all respects.
---
src/gallium/drivers/llvmpipe/lp_screen.c| 3 ++-
From: Roland Scheidegger srol...@vmware.com
In particular need to handle TEX2/TXB2/TXL2 opcodes (cube map shadow
could already have used TXB2 which clearly couldn't have worked, despite
that no piglit change), and add a bunch more switch cases.
The actual sampling code still won't handle cube map
On Wednesday, July 30, 2014 10:50:59 PM Eric Anholt wrote:
Connor Abbott cwabbo...@gmail.com writes:
Before, we would only consider nodes for spilling if they were
optimistically pushed onto the stack. But the logic for this was
complicated, and duplicated some things; also, we might want
https://bugs.freedesktop.org/show_bug.cgi?id=79039
Bug 79039 depends on bug 78466, which changed state.
Bug 78466 Summary: [ILK Bisected]Piglit glean/makeCurrent fails
https://bugs.freedesktop.org/show_bug.cgi?id=78466
What|Removed |Added
With earlier commit we've conditionally enabled/added the kms_dri target
for automake builds. Unfortunately the we forgot to add the appropriate
define in the scons build, resulting in a broken library due to the
undefined symbol 'kms_swrast_create_screen'.
Reported-by: Roland Scheidegger
On 01/08/14 17:06, Emil Velikov wrote:
When the compiler is not capable/does not accept -msse4.1 while the target
has the instruction set we'll blow up as _mesa_streaming_load_memcpy is
going to be undefined.
To make sure that never happens, wrap the runtime cpu check+caller in an
ifdef
I've discovered by accident that the mesa state tracker is trying to use
REPEAT wrap mode with texture rectangles - this happens with piglit
tex-miplevel-selection texture() 2DRectShadow -fbo -auto for instance
though I guess others as well. Needless to say the test fails in
llvmpipe because I was
Am 02.08.2014 05:49, schrieb Emil Velikov:
With earlier commit we've conditionally enabled/added the kms_dri target
for automake builds. Unfortunately the we forgot to add the appropriate
define in the scons build, resulting in a broken library due to the
undefined symbol
https://bugs.freedesktop.org/show_bug.cgi?id=80848
--- Comment #21 from Tapani Pälli lem...@gmail.com ---
(In reply to comment #20)
(In reply to comment #19)
(In reply to comment #18)
I had cross-compilation problems on Ubuntu (building 32bit Mesa on 64bit
environment) and my problems
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