That's already done :) At least in nouveau, thanks to Samuel.
On Tue, Jul 21, 2015 at 11:22 AM, Marek Olšák mar...@gmail.com wrote:
Acked-by: Marek Olšák marek.ol...@amd.com
What's next? boolean - bool? :)
Marek
On Tue, Jul 21, 2015 at 2:20 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
v2: Change return type of the new function from int to bool
Reviewed-by: Marek Olšák marek.ol...@amd.com
Signed-off-by: Boyan Ding boyan.j.d...@gmail.com
---
src/egl/drivers/dri2/egl_dri2.c | 90 -
1 file changed, 54 insertions(+), 36 deletions(-)
diff
Signed-off-by: Boyan Ding boyan.j.d...@gmail.com
---
configure.ac | 6 +
src/egl/drivers/dri2/Makefile.am | 5 +
src/egl/drivers/dri2/egl_dri2.c | 66 +++-
src/egl/drivers/dri2/egl_dri2.h | 14 +-
src/egl/drivers/dri2/platform_x11.c
dri3 for EGL will use different struct other than dri2_egl_surface for
an EGL surface, the common code only uses __DRIdrawable from that
struct, so instead of converting _EGLSurface to dri2_egl_surface, let
the platform code return the __DRIdrawable by its own (although the
current platforms use
This is the second version of my effort to bring dri3 to EGL on X. This
time I took Emil's advice and moved common logic of GLX and EGL into
loader/loader_dri3_helper.[ch]. With this, the dri3 code in libEGL is
only ~650 lines, with a bunch of trivial code, and glx/dri3 code also
shrinks a lot.
I
v2: Change return type of the new function from int to bool
Signed-off-by: Boyan Ding boyan.j.d...@gmail.com
---
src/egl/drivers/dri2/egl_dri2.c | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c
This requires swrast version = 3. Also EGL_EXT_create_context_robostness
is supported if __DRI2_ROBUSTNESS extension is found.
Reference: https://bugs.freedesktop.org/show_bug.cgi?id=80821
Signed-off-by: Boyan Ding boyan.j.d...@gmail.com
---
src/egl/drivers/dri2/egl_dri2.c | 3 ++-
1 file
On 18 July 2015 at 08:13, Jose Fonseca jfons...@vmware.com wrote:
On 18/07/15 01:38, Eric Anholt wrote:
Emil Velikov emil.l.veli...@gmail.com writes:
On 14/07/15 19:45, Eric Anholt wrote:
These are really useful hints to the compiler in the absence of
link-time
optimization, and I'm going
Acked-by: Marek Olšák marek.ol...@amd.com
What's next? boolean - bool? :)
Marek
On Tue, Jul 21, 2015 at 2:20 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Generated by running:
git grep -l INLINE src/gallium/ | xargs sed -i 's/\bINLINE\b/inline/g'
git grep -l INLINE src/mesa/state_tracker/ |
On 20 July 2015 at 19:36, Ian Romanick i...@freedesktop.org wrote:
On 07/09/2015 01:12 PM, Emil Velikov wrote:
On 9 July 2015 at 18:50, Ian Romanick i...@freedesktop.org wrote:
On 07/08/2015 10:07 AM, Emil Velikov wrote:
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
Implement helper functions that can be used to construct and send
untyped and typed surface read, write and atomic messages to the
shared dataport unit easily.
v2: Drop VEC4 suport.
v3: Reimplement in terms of logical send opcodes.
---
src/mesa/drivers/dri/i965/Makefile.sources | 2 +
Define some utility functions to query the bitfield layout of a given
image format and whether it satisfies a number of more or less
hardware-specific properties.
v2: Drop VEC4 suport.
v3: Add SKL support.
---
src/mesa/drivers/dri/i965/brw_fs_surface_builder.h | 148 +
1 file
This will be handy to avoid some ugly ternary operators in the next
patch, like:
fs_reg reg = (size == 0 ? null_reg_ud() : vgrf(..., size));
Because a zero-size register allocation is guaranteed not to ever be
read or written we can just return the null register. Another
possibility would be to
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1062ded..a996676 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@
Another resend of the i965 compiler-related changes for
ARB_shader_image_load_store, reworked to make use of the SIMD lowering
infrastructure introduced in a previous series [1]. For a
self-contained branch in testable form see [2].
[1]
If a non-const sample number is given to interpolateAtSample it will
now generate an indirect send message with the sample ID similar to
how non-const sampler array indexing works. Previously non-const
values were ignored and instead it ended up using a constant 0 value.
Note that unlike sampler
2015-07-21 14:12 GMT+02:00 Emil Velikov emil.l.veli...@gmail.com:
On 20/07/15 21:25, Chad Versace wrote:
On Fri 17 Jul 2015, Emil Velikov wrote:
On 17 July 2015 at 19:11, Ilia Mirkin imir...@alum.mit.edu wrote:
On Fri, Jul 17, 2015 at 2:11 PM, Eric Anholt e...@anholt.net wrote:
Matt Turner
Used to support EGL_KHR_image_pixmap.
Signed-off-by: Boyan Ding boyan.j.d...@gmail.com
---
src/loader/loader_dri3_helper.c | 82 -
src/loader/loader_dri3_helper.h | 9 +
2 files changed, 58 insertions(+), 33 deletions(-)
diff --git
Without this this extension basically can't work in indirect contexts,
TexImage2D will compute the image size as 0 and we'll send no image data
to the server.
v2: Add EXT_texture_integer to the client extension list too (Ian)
Signed-off-by: Adam Jackson a...@redhat.com
---
src/glx/compsize.c
v2: use HAVE_LIBDRM macro.
Cc: Ian Romanick ian.d.roman...@intel.com
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
include/GL/internal/dri_interface.h | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/include/GL/internal/dri_interface.h
This cleans up fs_inst::regs_read() slightly by disentangling the
calculation of components from the handling of message payload
arguments. This will also simplify the SIMD lowering and logical send
message lowering passes, because it will avoid expressions like
'regs_read * REG_SIZE /
gcc says:
sb/sb_sched.cpp: In member function 'bool
r600_sb::alu_group_tracker::try_reserve(r600_sb::alu_node*)':
sb/sb_sched.cpp:492:7: warning: suggest parentheses around operand of '!'
or change '' to '' or '!' to '~' [-Wparentheses]
if (!trans fbs)
It happens to be harmless;
From: Connor Abbott cwabbo...@gmail.com
v2: use nir_cf_node_remove_after().
v2: use foreach_list_typed() instead of hardcoding a list walk.
v3: update to new control flow modification helpers.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_opt_dead_cf.c | 123
From: Connor Abbott cwabbo...@gmail.com
v2: use nir_cf_node_remove_after() instead of our own broken thing.
v3: use the new control flow modification helpers.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/Makefile.sources | 1 +
src/glsl/nir/nir.h | 2 +
From: Connor Abbott cwabbo...@gmail.com
Doesn't do anything on the public shader-db.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_nir.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
From: Connor Abbott cwabbo...@gmail.com
We were already doing this internally for iterating over a function
implementation, so just expose it directly.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir.c | 7 +++
src/glsl/nir/nir.h | 2 ++
2 files changed, 9
This is another spin of my dead control flow elimination series, this
time based on the control flow modification series I sent out earlier.
It's much shorter, since it now uses the much-more-reusable modification
API, rather than a few ad-hoc functions to do what it needs to do. The
changes
From: Connor Abbott cwabbo...@gmail.com
This helps with testing the NIR dead cf pass.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/glsl_parser_extras.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/glsl/glsl_parser_extras.cpp
From: Connor Abbott cwabbo...@gmail.com
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir.c | 16
src/glsl/nir/nir.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/src/glsl/nir/nir.c b/src/glsl/nir/nir.c
index e9af1a7..f2b60d4 100644
---
From: Connor Abbott cwabbo...@gmail.com
v2: fix detecting if the loop has any phi nodes after it.
v2: use nir_foreach_ssa_def() instead of nir_foreach_dest() when
checking for values live after the loop to catch const_load
instructions.
v2: fix handling return instructions
v2: add some
On Friday, June 19, 2015 03:46:51 AM Kenneth Graunke wrote:
I made some comments, but assuming those are taken care of,
patches 1-22 are:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
I plan on reviewing the rest, but probably not tonight.
Thanks for picking this up!
The whole
Signed-off-by: Boyan Ding boyan.j.d...@gmail.com
---
configure.ac|4 -
src/glx/dri3_glx.c | 1446 ++-
src/glx/dri3_priv.h | 96 +---
3 files changed, 171 insertions(+), 1375 deletions(-)
diff --git a/configure.ac b/configure.ac
index
Signed-off-by: Boyan Ding boyan.j.d...@gmail.com
---
configure.ac|8 +-
src/loader/Makefile.am |9 +
src/loader/loader_dri3_helper.c | 1397 +++
src/loader/loader_dri3_helper.h | 226 +++
4 files changed, 1639
Signed-off-by: Boyan Ding boyan.j.d...@gmail.com
---
src/egl/drivers/dri2/platform_x11.c | 1 +
src/egl/drivers/dri2/platform_x11_dri3.c | 77 +++-
2 files changed, 77 insertions(+), 1 deletion(-)
diff --git a/src/egl/drivers/dri2/platform_x11.c
I don't think resource_copy_region is a good match for all possible
cases that can occur with ARB_copy_image and I extensively explained
this to Ilia on IRC. The format swizzling is the problem.
Assume you have a copy from RGBA8 to R32F. This is equivalent to
copying RGBA8 to RGBA8, because it's
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 76297b7..9a1fb4b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 149 +++
1 file changed, 149 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 31024b7..76297b7 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++
These utility functions check whether an image access is valid.
According to the spec an invalid image access should have no effect on
the image and yield well-defined results. Typically the hardware
implements correct bounds and surface checking by itself, but in some
cases (typed atomics on IVB
Reviewed-by: Paul Berry stereotype...@gmail.com
---
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 6b3bd12..5a5e308 100644
---
v2: Drop VEC4 suport.
v3: Rebase.
---
.../drivers/dri/i965/brw_fs_surface_builder.cpp| 216 +
src/mesa/drivers/dri/i965/brw_fs_surface_builder.h | 17 ++
2 files changed, 233 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
Rewrite the NIR atomic counter intrinsics translation code making use
of the recently introduced surface builder. This will allow the
removal of some of the functionality duplicated between the visitor
and surface builder.
v2: Drop VEC4 suport.
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 49
Each logical variant is largely equivalent to the original opcode but
instead of taking a single payload source it expects its arguments
separately as individual sources, like:
typed_surface_write_logical null, coordinates, source, surface,
num_coordinates,
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 0b0c5e1..0d97474 100644
---
v2: Move the image_params array back to brw_stage_prog_data.
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 50 +++-
2 files changed, 43 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
---
src/mesa/drivers/dri/i965/brw_fs.h | 7 --
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 13 ++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 112 ---
3 files changed, 5 insertions(+), 127 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
Define bitfield packing, unpacking and type conversion operations in
terms of which the image format conversion code will be implemented.
These don't directly know about image formats: The packing and
unpacking functions take a 4-tuple of bit shifts and a 4-tuple of bit
widths as arguments,
Images take up zero uniform slots in the nir_shader::num_uniforms
calculation, but nir_setup_uniforms needs to be executed even if the
program has no non-image uniforms so the driver-specific image
parameters are uploaded. nir_setup_uniforms is a no-op if there are
really no uniforms, so checking
v2: Move the image_params array back to brw_stage_prog_data.
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 31 +++
src/mesa/drivers/dri/i965/brw_shader.h | 1 +
2 files changed, 32 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
Define a function to calculate the memory address of the image
location given by a vector of coordinates. This is required in cases
where we need to fall back to untyped surface access, which take a raw
memory offset and know nothing about surface coordinates, type
conversion or memory tiling and
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 63 +++-
1 file changed, 55 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index a996676..0b0c5e1 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
Image variables need to allocate additional uniform slots over
nir_shader::num_uniforms. nir_setup_uniforms() overwrites the values
imported from the SIMD8 visitor and then exits early before entering
the nir_shader::uniforms loop, so image uniforms are never re-created.
Instead leave the
On Tue, Jul 21, 2015 at 12:12 PM, Adam Jackson a...@redhat.com wrote:
gcc says:
sb/sb_sched.cpp: In member function 'bool
r600_sb::alu_group_tracker::try_reserve(r600_sb::alu_node*)':
sb/sb_sched.cpp:492:7: warning: suggest parentheses around operand of '!'
or change '' to '' or
On Tue, Jul 21, 2015 at 12:50 AM, Iago Toral ito...@igalia.com wrote:
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/common/meta.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git
Read-only and write-only image arguments are recognized and
distinguished.
Attributes of the image arguments are passed to the kernel as implicit
arguments.
---
src/gallium/state_trackers/clover/core/kernel.cpp | 46 ++-
src/gallium/state_trackers/clover/core/kernel.hpp | 13 +-
From: Dave Airlie airl...@redhat.com
This is required as part of ARB_gpu_shader5.
no backend changes are required for this, or if
any are, it's the same ones as for samplers.
Signed-off-by: Dave Airlie airl...@redhat.com
---
docs/GL3.txt | 2 +-
From: Dave Airlie airl...@redhat.com
This adds the frontend support, however the llvm
backend produces the wrong pattern, however
we can conditionalise enabling ARB_gpu_shader5
on whatever version of llvm we fix this in.
Signed-off-by: Dave Airlie airl...@redhat.com
---
docs/GL3.txt
These two are needs for ARB_gpu_shader5 support,
the only remaining piece is geometry streams, and
I have them implemented, but they are a bit conflicty
with tess.
This also needs an llvm change for sampler indirect
to work, but we should land the frontend pieces.
Dave.
radeon_fbo.c: In function 'radeon_map_renderbuffer_s8z24':
radeon_fbo.c:162:9: warning: variable 'ret' set but not used
[-Wunused-but-set-variable]
int ret;
^
radeon_fbo.c: In function 'radeon_map_renderbuffer_z16':
radeon_fbo.c:200:9: warning: variable 'ret' set but not used
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_control_flow.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/src/glsl/nir/nir_control_flow.c b/src/glsl/nir/nir_control_flow.c
index bb94652..bf25813 100644
--- a/src/glsl/nir/nir_control_flow.c
Before, the process of removing a jump and wiring up the remaining block
correctly was atomic, but with the new control flow modification it's
split into two parts: first, we extract the jump, which creates a new
block with re-wired successors as well as a free-floating jump, and then
we delete
We should be checking almost everything now.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_validate.c | 95 +++--
1 file changed, 84 insertions(+), 11 deletions(-)
diff --git a/src/glsl/nir/nir_validate.c
We want to start reworking and expanding this code, but it'll be a lot
easier to do once we disentangle it from the rest of the stuff in nir.c.
Unfortunately, there are a few unavoidable dependencies in nir.c on
methods we'd rather not expose publicly, since if not used in very
specific situations
For now, it allows us to refactor the control flow insertion API's so
that there's a single entrypoint (with some wrappers). More importantly,
it will allow us to reduce the combinatorial explosion in the extract
function. There, we need to specify two points to extract, which may be
at the
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_control_flow.c | 197 ++--
src/glsl/nir/nir_control_flow.h | 27 +-
2 files changed, 49 insertions(+), 175 deletions(-)
diff --git a/src/glsl/nir/nir_control_flow.c
These will help us do a number of things, including:
- Early return elimination.
- Dead control flow elimination.
- Various optimizations, such as replacing:
if (foo) {
...
}
if (!foo) {
...
}
with:
if (foo) {
...
} else {
...
}
Signed-off-by: Connor Abbott
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_control_flow.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/src/glsl/nir/nir_control_flow.c b/src/glsl/nir/nir_control_flow.c
index 9ae113f..fcdabc7 100644
--- a/src/glsl/nir/nir_control_flow.c
This gives us some testing of it. Also, the old nir_cf_node_remove()
wasn't handling phi nodes correctly and was calling cleanup_cf_node()
too late.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_control_flow.c | 31 ---
Before, we would only split a block with a jump at the end if we were
inserting something after a block with a jump, which never happened in
practice. But now, we want to use this to extract control flow lists
which may end in a jump, in which case we really need to do the correct
patching up. As
It was being used to initialize function impls and loops, even though
it's really a control flow modification helper. It's pretty trivial, so
just inline it to avoid the dependency.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir.c | 5 ++---
1 file changed, 2
This is a helper that will be shared between the new control flow
insertion and modification code.
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_control_flow.c | 48 +
1 file changed, 48 insertions(+)
diff --git
When we insert a single basic block A into another basic block B, we
will split B into C and D, insert A in the middle, and then splice
together C, A, and D. When we splice together C and A, we need to move
the successors of A into C -- except A has no successors, since it
hasn't been inserted
In particular, handle the case where the earlier block ends in a jump
and the later block is empty. In that case, we want to preserve the jump
and remove any traces of the later block. Before, we would only hit this
case when removing a control flow node after a jump, which wasn't a
common
Back when I was getting NIR up and running, I created a bunch of
functions that dealt with modifying control flow; they allowed you to
remove control flow nodes (if's, loops, and basic blocks) as well as
insert newly-created control flow nodes at certain points. The insertion
API's worked well
Unlike calling nir_instr_remove(), calling nir_cf_node_remove() (and
later in the series, the nir_cf_list_delete()) implies that you're
removing instructions that may still have uses, except those
instructions are never executed so any uses will be undefined. When
cleaning up a CF node for
We may delete a control flow node which contains structured jumps to
other parts of the program. We need to remove the jump as a predecessor,
as well as remove any phi node sources which reference it. Right now,
the same problem exists for blocks that don't end in a jump instruction,
but with the
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_control_flow.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/src/glsl/nir/nir_control_flow.c b/src/glsl/nir/nir_control_flow.c
index 8d146c4..bb94652 100644
---
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_control_flow.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/src/glsl/nir/nir_control_flow.c b/src/glsl/nir/nir_control_flow.c
index 205b608..b416a58 100644
--- a/src/glsl/nir/nir_control_flow.c
+++
cleanup_cf_node() is part of the control flow modification code, which
we're going to split into its own file, but remove_defs_uses() is an
internal function used by nir_instr_remove(). Break the dependency by
making cleanup_cf_node() use nir_instr_remove() instead, which simply
calls
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 2029dc9..e9f1363 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -1101,6 +1101,8 @@ typedef struct {
Signed-off-by: Connor Abbott connor.w.abb...@intel.com
---
src/glsl/nir/nir_control_flow.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/glsl/nir/nir_control_flow.c b/src/glsl/nir/nir_control_flow.c
index b416a58..b99bf89 100644
--- a/src/glsl/nir/nir_control_flow.c
+++
On Tue, Jul 21, 2015 at 9:53 PM, Connor Abbott cwabbo...@gmail.com wrote:
This is another spin of my dead control flow elimination series, this
time based on the control flow modification series I sent out earlier.
It's much shorter, since it now uses the much-more-reusable modification
API,
This fixes the following piglit test:
ext_transform_feedback-immediate-reuse-uniform-buffer
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/nouveau/nv50/nv50_shader_state.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
How about
nv50: force cache flush when binding a new ubo
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
On Tue, Jul 21, 2015 at 3:37 PM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
This fixes the following piglit test:
ext_transform_feedback-immediate-reuse-uniform-buffer
Just FYI:
http://lists.freedesktop.org/archives/mesa-dev/2015-June/085869.html
Am Dienstag, 21. Juli 2015, 12:12:33 schrieb Adam Jackson:
gcc says:
sb/sb_sched.cpp: In member function 'bool
r600_sb::alu_group_tracker::try_reserve(r600_sb::alu_node*)':
sb/sb_sched.cpp:492:7:
A few comments below. Mostly just asking for explanation.
1-3 are
Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com
Obviously, don't merge 4/4 until it actually has users.
--Jason
On Thu, Jul 16, 2015 at 8:35 AM, Francisco Jerez curroje...@riseup.net wrote:
This lowering pass implements
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
I'm unconvinced that this is strictly necessary, but it seems to fix
the test so... wtvr. UBO's don't get rebound too often without also
doing other things that would incur a similar barrier/flush.
On Tue, Jul 21, 2015 at 3:59 PM, Samuel Pitoiset
This fixes the following piglit test:
ext_transform_feedback-immediate-reuse-uniform-buffer
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
On Sat, Jul 18, 2015 at 7:34 AM, Francisco Jerez curroje...@riseup.net wrote:
So that it's left uninitialized by LOAD_PAYLOAD, we only need to
reserve space for it in the message since it will be initialized
implicitly by the generator.
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7
Adam Jackson a...@redhat.com writes:
Without this this extension basically can't work in indirect contexts,
TexImage2D will compute the image size as 0 and we'll send no image data
to the server.
v2: Add EXT_texture_integer to the client extension list too (Ian)
Reviewed-by: Eric Anholt
Could mention this is actually a gl spec bug in the commit message, but
either way:
Reviewed-by: Roland Scheidegger srol...@vmware.com
Am 21.07.2015 um 22:55 schrieb Brian Paul:
Since s3tc works for cube maps and 2D arrays, it should also work for
cube arrays. NVIDIA's driver supports this
FYI, I will push tessellation after Dave lands shader subroutines.
Marek
On Thu, Jul 16, 2015 at 10:27 PM, Marek Olšák mar...@gmail.com wrote:
Thanks for the reviewing.
The patches that are missing Rbs are:
23-24, 26-43, 45-46.
The patches have been on the mailing list for one month. It
I just realized that there's actually another difference if you'd use
the util_is_format_compatible to see whether resource_copy_region may be
used: d3d style, this would exclude things like rg16 being compatible
with r32 completely, swizzled or not (this is how d3d10 typeless groups
work).
On Thu, Jul 16, 2015 at 8:41 AM, Francisco Jerez curroje...@riseup.net wrote:
The only non-trivial thing it still has to do is figure out where to
take the src/dst depth values from and predicate the instruction if
discard is in use. The manual SIMD unrolling logic in the dual-source
case
Since s3tc works for cube maps and 2D arrays, it should also work for
cube arrays. NVIDIA's driver supports this too. This is a minor follow-on
fix for the commit mesa: fix up some texture error checks.
---
src/mesa/main/teximage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Fixes 'make check' on FreeBSD.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/mapi/es1api/ABI-check | 2 +-
src/mapi/es2api/ABI-check | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mapi/es1api/ABI-check b/src/mapi/es1api/ABI-check
index 44654cd..819568f 100755
---
src/mesa/main/fbobject.c | 4 ++--
src/mesa/main/shaderapi.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index f46554b..cc342c2 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -3304,7
https://bugs.freedesktop.org/show_bug.cgi?id=90264
--- Comment #37 from Antoine Labour pi...@chromium.org ---
(In reply to Heiko from comment #35)
Just some more input
Debuggable with smth like
`/usr/lib/chromium-browser/chrome --user-data-dir=/tmp/fake --no-sandbox
--enable-gpu-debugging
I *think* this is sane. I compared it against the current SIMD16 and
SIMD8 code and it looks like it does the right thing. However, it's
not a direct translation and I don't know the gen4 texturing code, so
I can't really call it reviewed.
Acked-by: Jason Ekstrand jason.ekstr...@intel.com
Ken,
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
On 07/21/2015 09:07 AM, Emil Velikov wrote:
v2: use HAVE_LIBDRM macro.
Cc: Ian Romanick ian.d.roman...@intel.com
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
include/GL/internal/dri_interface.h | 9 +
1 file changed,
Cool, I was under that impression too, but having it confirmed is great.
Since these do matter and I don't have push access, could you make sure
this lands?
On Jul 21, 2015 15:33, Emil Velikov emil.l.veli...@gmail.com wrote:
It seems that I was under the wrong impression on the hole thing.
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