Re: [Mesa-dev] [PATCH 30/32] i965: Use partial resolves for CCS buffers being scanned out

On Mon, Jan 02, 2017 at 06:37:21PM -0800, Ben Widawsky wrote: > On Gen9 hardware, the display engine is able to scanout a compressed > framebuffer by providing an offset to auxiliary compression information. > Unfortunately, the hardware is incapable of doing the same thing for the > fast clear

Re: [Mesa-dev] [PATCH 24/32] i965/miptree: Allocate mt earlier in update winsys

On Wed, Jan 04, 2017 at 10:26:50AM +0200, Pohjolainen, Topi wrote: > On Mon, Jan 02, 2017 at 06:37:15PM -0800, Ben Widawsky wrote: > > Allows us to continue utilizing common miptree creation using __DRIimage > > without creating a new DRIimage (for the intel_process_dri2_buffer() > > case). > > >

Re: [Mesa-dev] [PATCH v2 23/25] spirv: enable SpvCapabilityFloat64 only to supported platforms

On Tue, 2017-01-03 at 08:59 -0800, Jason Ekstrand wrote: > Dave recently added a spirv-specific structure for this sort of > feature enabling.  I think it would be better to use that rather than > nir_options. > Great! This change also avoids me to modify nir_options so I can remove some

[Mesa-dev] [PATCH v2 0/4] Enable OpenGL 4.0 on Haswell

Changes from v1: - Use Chris's patch to check if we can do pipelined register writes instead of trying to reuse the infrastructure from intel_batchbuffer - Add a kernel_features bitfield to the intel screen that we can check to see if specific features are available. Drop

[Mesa-dev] [PATCH v2 4/4] i965: add a kernel_features bitfield to intel screen

We can use this to track various features that may or may not be supported by the hw / kernel. Currently, we usually do this by checking the generation and supported command parser versions in various places thoughtout the driver code. With this patch, we centralize all these checks in just once

[Mesa-dev] [PATCH v2 3/4] i965/gen7: Enable OpenGL 4.0 in Haswell when supported

--- src/mesa/drivers/dri/i965/intel_extensions.c | 2 ++ src/mesa/drivers/dri/i965/intel_screen.c | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 8e67b57..aa89380 100644

[Mesa-dev] [PATCH v2 1/4] i965: Move the pipelined test for SO register access to the screen

From: Chris Wilson Moving the test to the screen places it alongside the other global HW feature tests that want to be shared between contexts. Also, we need to know if we support pipelined register writes at screen creation time so that we can tell if we can expose

[Mesa-dev] [PATCH v2 2/4] i965: get rid of brw->can_do_pipelined_register_writes

Instead, check the screen field directly. --- src/mesa/drivers/dri/i965/brw_context.c | 2 -- src/mesa/drivers/dri/i965/brw_context.h | 5 - src/mesa/drivers/dri/i965/gen7_l3_state.c| 5 +++-- src/mesa/drivers/dri/i965/intel_extensions.c | 2 +-

Re: [Mesa-dev] [PATCH 3/3] radeonsi: add a workaround for the Witcher 2 black transitions

Here's my theory about the Witcher 2 issue: The problematic shader contains KILL. Reloading inputs after KILL is unsafe, because KILL breaks the WQM mode, thus the inputs are not loaded for the whole quad. Control flow statements have a similar issue. These are the cases when inputs can be

Re: [Mesa-dev] [PATCH 1/2] vdpau: call texture_get_handle while the mutex is being held

Am 04.01.2017 um 11:47 schrieb Marek Olšák: From: Marek Olšák The context may be used by texture_get_handle. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99158 Ah, yes of course. Did you added the context to resource_get_handle recently? If not CC stable

Re: [Mesa-dev] [PATCH v2 22/25] nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributes

On Tue, 2017-01-03 at 14:41 -0800, Jason Ekstrand wrote: > I made a few pretty trivial comments.  With those addressed, > > Reviewed-by: Jason Ekstrand > > On Dec 16, 2016 8:55 AM, "Juan A. Suarez Romero" > wrote: > So far, input_reads was a bitmap

Re: [Mesa-dev] [PATCH 1/3] radeonsi: cleanly communicate whether si_shader_dump should check R600_DEBUG

This series is, Acked-by: Edward O'Callaghan On 01/04/2017 06:17 AM, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/drivers/radeonsi/si_compute.c | 2 +- > src/gallium/drivers/radeonsi/si_debug.c | 2 +- >

Re: [Mesa-dev] [PATCH 3/7] gallium: add FBFETCH opcode to retrieve the current sample value

Ah, right. Thanks for the explanation! On Jan 4, 2017 14:02, "Ilia Mirkin" wrote: > On Wed, Jan 4, 2017 at 4:24 AM, Erik Faye-Lund > wrote: > > On Jan 2, 2017 06:03, "Ilia Mirkin" wrote: > > > > Signed-off-by: Ilia Mirkin

Re: [Mesa-dev] [PATCH v2 17/25] spirv: add support for doubles to OpSpecConstant

On Jan 4, 2017 4:54 AM, "Erik Faye-Lund" wrote: On Jan 3, 2017 16:34, "Jason Ekstrand" wrote: On Fri, Dec 16, 2016 at 6:49 AM, Juan A. Suarez Romero wrote: > From: Samuel Iglesias Gonsálvez > >

Re: [Mesa-dev] [PATCH 3/7] gallium: add FBFETCH opcode to retrieve the current sample value

On Wed, Jan 4, 2017 at 4:24 AM, Erik Faye-Lund wrote: > On Jan 2, 2017 06:03, "Ilia Mirkin" wrote: > > Signed-off-by: Ilia Mirkin > --- > src/gallium/auxiliary/tgsi/tgsi_info.c | 2 +- > src/gallium/docs/source/tgsi.rst

Re: [Mesa-dev] [PATCH v2 22/25] nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributes

On Jan 4, 2017 5:46 AM, "Juan A. Suarez Romero" wrote: On Tue, 2017-01-03 at 14:41 -0800, Jason Ekstrand wrote: I made a few pretty trivial comments. With those addressed, Reviewed-by: Jason Ekstrand On Dec 16, 2016 8:55 AM, "Juan A. Suarez Romero"

Re: [Mesa-dev] [PATCH 0/8] i965: gl_TessLevel rescrambling in NIR

Hi, On 04.01.2017 13:07, Kenneth Graunke wrote: This series reworks i965's handling of gl_TessLevelInner/Outer[] arrays. Instead of using lower_tess_levels to turn them into vec4/vec2s, we pass them through to NIR and make them compact arrays (where array indexing translates to enhanced layouts

[Mesa-dev] Seeking advice on implementing KHR_no_error

Hello > Last time I looked at this extension I think there was at least one of > the mainstream emulators using it. Can't recall which one ... pcsx2 > maybe. I tried to use it on PCSX2. Unfortunately the X / GLX / (EGL?) / Mesa implementation of context creation doesn't allow extra (AKA

Re: [Mesa-dev] [PATCH] nir: fix loop iteration count calculation for floats

On Jan 4, 2017 4:39 AM, "Eero Tamminen" wrote: Hi, Tested-by: Eero Tamminen May also impact other programs having float indexed loops: - Invisible Inc - Talos Principle I think I saw most Talos loops get unrolled. There was one or two

[Mesa-dev] [PATCH] i965: Print VS output VUE map in Vulkan too.

We need to move this to the shared layer. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 5 + src/mesa/drivers/dri/i965/brw_vs.c | 3 --- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git

Re: [Mesa-dev] [PATCH] nir: fix loop iteration count calculation for floats

On Wed, 2017-01-04 at 06:50 -0800, Jason Ekstrand wrote: > On Jan 4, 2017 4:39 AM, "Eero Tamminen" > wrote: > Hi, > > Tested-by: Eero Tamminen > > May also impact other programs having float indexed loops: > - Invisible Inc > - Talos

Re: [Mesa-dev] [PATCH 1/6] nir/dead_variables: Remove shader-local variables that are only written

On Mon, 2016-12-12 at 19:39 -0800, Jason Ekstrand wrote: > --- >  src/compiler/nir/nir_remove_dead_variables.c | 66 > >  1 file changed, 58 insertions(+), 8 deletions(-) > > diff --git a/src/compiler/nir/nir_remove_dead_variables.c >

Re: [Mesa-dev] [PATCH] i965: Delete pending CCS and HiZ ops in intel_miptree_make_shareable()

On 17-01-04 12:33:56, Chad Versace wrote: Fixes crash in piglit `egl_khr_gl_renderbuffer_image-clear-shared-image GL_DEPTH_COMPONENT24` on Skylake. The crash happened because blorp attempted to execute a pending hiz clear after the hiz buffer was deleted. Deleting the pending hiz ops when the

[Mesa-dev] [Bug 98604] [VDPAU, DRI3] Fullscreen flash video fails when hardware acceleration is enabled.

https://bugs.freedesktop.org/show_bug.cgi?id=98604 --- Comment #11 from Michel Dänzer --- Can you get a backtrace of a crash with gdb? -- You are receiving this mail because: You are on the CC list for the bug.___ mesa-dev mailing

Re: [Mesa-dev] [PATCH 19/32] i965/miptree: Allocate mcs_buf for an image's CCS_E

On 17-01-04 10:34:17, Topi Pohjolainen Topi Pohjolainen wrote: On Wed, Jan 04, 2017 at 09:40:51AM +0200, Pohjolainen, Topi wrote: On Mon, Jan 02, 2017 at 06:37:10PM -0800, Ben Widawsky wrote: > This code will disable actually creating these buffers for the scanout, > but it puts the allocation

Re: [Mesa-dev] [PATCH 22/32] i965: Create correctly sized mcs for an image

On 17-01-04 09:51:20, Topi Pohjolainen Topi Pohjolainen wrote: On Mon, Jan 02, 2017 at 06:37:13PM -0800, Ben Widawsky wrote: v2: Leave "image+mod" (Topi) Signed-off-by: Ben Widawsky Acked-by: Daniel Stone --- src/mesa/drivers/dri/i965/intel_screen.c

Re: [Mesa-dev] [PATCH 2/6] nir/builder: Add a load_deref_var helper

Looks fine. Reviewed-by: Timothy Arceri On Mon, 2016-12-12 at 19:39 -0800, Jason Ekstrand wrote: > --- >  src/compiler/nir/nir_builder.h | 16 >  1 file changed, 16 insertions(+) > > diff --git a/src/compiler/nir/nir_builder.h >

[Mesa-dev] [PATCH] llvmpipe: separate logicop / mask / color mask from blending

From: Roland Scheidegger Doing these operations with blend format means that we have to convert the destination into blend format, which is entirely pointless if we don't do blending. For instance, we'd convert half floats to floats, or 10/10/10/2 to unorm16, just to apply

Re: [Mesa-dev] [PATCH 27/32] i965: Change resolve flags to enum

On 17-01-04 10:00:59, Topi Pohjolainen Topi Pohjolainen wrote: On Mon, Jan 02, 2017 at 06:37:18PM -0800, Ben Widawsky wrote: In the foreseeable future it doesn't seem to make sense to have multiple resolve flags. What does make sense is to have the caller give an indication to the lower layers

Re: [Mesa-dev] [PATCH 24/32] i965/miptree: Allocate mt earlier in update winsys

On 17-01-04 10:57:40, Topi Pohjolainen Topi Pohjolainen wrote: On Wed, Jan 04, 2017 at 10:26:50AM +0200, Pohjolainen, Topi wrote: On Mon, Jan 02, 2017 at 06:37:15PM -0800, Ben Widawsky wrote: > Allows us to continue utilizing common miptree creation using __DRIimage > without creating a new

Re: [Mesa-dev] [PATCH 30/32] i965: Use partial resolves for CCS buffers being scanned out

On 17-01-04 10:29:45, Topi Pohjolainen Topi Pohjolainen wrote: On Mon, Jan 02, 2017 at 06:37:21PM -0800, Ben Widawsky wrote: On Gen9 hardware, the display engine is able to scanout a compressed framebuffer by providing an offset to auxiliary compression information. Unfortunately, the hardware

Re: [Mesa-dev] [PATCH 3/6] nir/builder: Add a helper for getting the most recently added instruction

Reviewed-by: Timothy Arceri On Mon, 2016-12-12 at 19:39 -0800, Jason Ekstrand wrote: > --- >  src/compiler/nir/nir_builder.h | 7 +++ >  1 file changed, 7 insertions(+) > > diff --git a/src/compiler/nir/nir_builder.h > b/src/compiler/nir/nir_builder.h > index

Re: [Mesa-dev] [PATCH 8/8] i965: Rework gl_TessLevel*[] handling to use NIR compact arrays.

Ok, given what you said below, I think everything is sane. Reviewed-by: Jason Ekstrand Note that I didn't actually verify that all of the code you deleted is going to work once we switch over to NIR handling it with varyings. On Wed, Jan 4, 2017 at 2:12 PM, Kenneth

Re: [Mesa-dev] [PATCH 0/8] i965: gl_TessLevel rescrambling in NIR

Eero Tamminen writes: > Hi, > > On 04.01.2017 13:07, Kenneth Graunke wrote: >> This series reworks i965's handling of gl_TessLevelInner/Outer[] arrays. >> Instead of using lower_tess_levels to turn them into vec4/vec2s, we pass >> them through to NIR and make them

Re: [Mesa-dev] [PATCH] i965: Prevent creation of aux surface after intel_miptree_make_shareable()

On 17-01-04 12:21:36, Chad Versace wrote: Pre-patch, if the user created an EGLImage from an intel_mipmap_tree before the miptree's first use, then intel_miptree_make_shareable() failed to prevent later creation of the miptree's auxilliary surface. This results in the original, exported miptree

Re: [Mesa-dev] [PATCH 31/32] i965: Remove scanout restriction from lossless compression

On 17-01-04 10:41:58, Topi Pohjolainen Topi Pohjolainen wrote: On Mon, Jan 02, 2017 at 06:37:22PM -0800, Ben Widawsky wrote: v2: Try to keep the assert as recommended by Topi. This requires modifying the num_samples check to be <= 1 because internally created buffers set num_samples = 0. Cc:

Re: [Mesa-dev] [PATCH 0/8] i965: gl_TessLevel rescrambling in NIR

On Wednesday, January 4, 2017 3:16:41 PM PST Eero Tamminen wrote: > Hi, > > On 04.01.2017 13:07, Kenneth Graunke wrote: > > This series reworks i965's handling of gl_TessLevelInner/Outer[] arrays. > > Instead of using lower_tess_levels to turn them into vec4/vec2s, we pass > > them through to NIR

Re: [Mesa-dev] [PATCH] dri: allow 16bit R/GR images to be exported via drm buffers

I resubmitted the kernel patch to lkml and cc'ed Daniel. On Mon, Jan 2, 2017 at 10:32 AM, Daniel Vetter wrote: > On Thu, Dec 29, 2016 at 04:43:34PM -0800, Ben Widawsky wrote: > > On 16-12-16 21:27:51, Rainer Hochecker wrote: > > > From: Rainer Hochecker

Re: [Mesa-dev] [PATCH 3/3] imx: gallium driver for imx-drm scanout driver

On Mon, Dec 19, 2016 at 10:19 PM, Thierry Reding wrote: > On Mon, Dec 19, 2016 at 04:04:34PM +, Emil Velikov wrote: >> On Monday, 19 December 2016, Thierry Reding >> wrote: >> >> > On Wed, Nov 30, 2016 at 02:44:36PM +0100, Christian Gmeiner

Re: [Mesa-dev] [PATCH] radeonsi: Bugfix needed for hashcat

On 12/22/2016 05:07 PM, Nicolai Hähnle wrote: > On 19.12.2016 23:26, Christian Inci wrote: >> Hashcat needs MAX_GLOBAL_BUFFERS to be 21 or even 22 for some modes. It'll >> crash otherwise. >> I'm adding an assert to see if programs need it to be even higher. >> >> Signed-off-by: Christian Inci

[Mesa-dev] [PATCH 05/32] [v2] gbm: Export a getter for per plane handles

v2: Make the error return be -1 instead of 0 because I think 0 is actually valid. Cc: Daniel Stone Signed-off-by: Ben Widawsky --- src/gbm/backends/dri/gbm_dri.c | 28 src/gbm/gbm-symbols-check | 1 +

[Mesa-dev] [PATCH] i965: Fix last slot calculations

If the VUE map has slots at the end which the shader does not write, then we'd "flush" (constructing an URB write) on the last output it actually wrote. Then, we'd construct another SEND with EOT, but with no actual payload data. That's not legal. For example, SSO programs have clip distance

Re: [Mesa-dev] [PATCH v2 17/25] spirv: add support for doubles to OpSpecConstant

On Wed, 2017-01-04 at 16:17 +0100, Erik Faye-Lund wrote: > > > On Jan 4, 2017 14:45, "Jason Ekstrand" wrote: > On Jan 4, 2017 4:54 AM, "Erik Faye-Lund" wrote: > On Jan 3, 2017 16:34, "Jason Ekstrand" wrote: > On Fri, Dec 16,

Re: [Mesa-dev] [PATCH v2 4/4] i965: add a kernel_features bitfield to intel screen

On Wed, 2017-01-04 at 15:35 -0800, Kenneth Graunke wrote: > On Wednesday, January 4, 2017 1:26:23 PM PST Iago Toral Quiroga > wrote: > > > > We can use this to track various features that may or may not be > > supported > > by the hw / kernel. Currently, we usually do this by checking the > >

Re: [Mesa-dev] [PATCH v2 1/4] i965: Move the pipelined test for SO register access to the screen

On Wed, 2017-01-04 at 15:34 -0800, Kenneth Graunke wrote: > On Wednesday, January 4, 2017 1:26:20 PM PST Iago Toral Quiroga > wrote: > > > > From: Chris Wilson > [snip] > > > > +   /* And afterwards clear the register */ > > +   if (reset) { > > +  *batch++ =

[Mesa-dev] [PATCH] docs: add GL_ARB_gpu_shader_fp64 and OpenGL 4.0 support for Intel Haswell.

--- docs/relnotes/13.1.0.html | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/relnotes/13.1.0.html b/docs/relnotes/13.1.0.html index 4dce843..124da93 100644 --- a/docs/relnotes/13.1.0.html +++ b/docs/relnotes/13.1.0.html @@ -47,6 +47,8 @@ Note: some of the new features are only

Re: [Mesa-dev] [PATCH 4/6] nir: Add a local variable-based copy propagation pass

There was a bit to take in here but it seems ok to me. I've made a bunch of trivial suggestions/comments below otherwise: Reviewed-by: Timothy Arceri On Mon, 2016-12-12 at 19:39 -0800, Jason Ekstrand wrote: > --- >  src/compiler/Makefile.sources |   1

Re: [Mesa-dev] [PATCH 46/70] st/mesa: get Version from gl_program rather than gl_shader_program

On 20/12/16 07:37 PM, Timothy Arceri wrote: > Reviewed-by: Nicolai Hähnle > --- > src/mesa/state_tracker/st_atom_texture.c | 5 + > 1 file changed, 1 insertion(+), 4 deletions(-) > > diff --git a/src/mesa/state_tracker/st_atom_texture.c >

Re: [Mesa-dev] [PATCH 7/8] i965: Inline store_output helper in quads workaround code.

On Jan 4, 2017 05:08, "Kenneth Graunke" wrote: It's only used in one place, it ignores the offset parameter currently, and I want to add more parameters...at which point, passing in a bunch of integers seems less obvious than writing it out. Signed-off-by: Kenneth Graunke

Re: [Mesa-dev] [PATCH 4/4] gallivm: implement aos unpack (to unorm8) for small unorm formats

On 21/12/16 04:01, srol...@vmware.com wrote: From: Roland Scheidegger Using bit replication. This path now resembles something which might make sense. (The logic was mostly copied from llvmpipe fs backend.) I am not convinced though it is actually faster than SoA sampling

Re: [Mesa-dev] [PATCH 1/4] llvmpipe: (trivial) minimally simplify mask construction

On 21/12/16 04:01, srol...@vmware.com wrote: From: Roland Scheidegger simd instruction sets usually have comparisons for equal, not unequal. So use a different comparison against the mask itself - which also means we don't need a all-zero as well as a all-one (for the pxor)

Re: [Mesa-dev] [PATCH v2 17/25] spirv: add support for doubles to OpSpecConstant

On Jan 4, 2017 14:45, "Jason Ekstrand" wrote: On Jan 4, 2017 4:54 AM, "Erik Faye-Lund" wrote: On Jan 3, 2017 16:34, "Jason Ekstrand" wrote: On Fri, Dec 16, 2016 at 6:49 AM, Juan A. Suarez Romero wrote: >

Re: [Mesa-dev] [PATCH 3/4] gallivm: optimize lp_build_unpack_arith_rgba_aos slightly

On 21/12/16 04:01, srol...@vmware.com wrote: From: Roland Scheidegger This code uses a vector shift which has to be emulated on x86 unless there's AVX2. Luckily in some cases we can actually avoid the shift altogether, so do that. Also make sure we hit the fast

Re: [Mesa-dev] [PATCH 2/4] gallivm: use 2 srcs for 32->16bit conversions in lp_bld_conv_auto

On 21/12/16 04:01, srol...@vmware.com wrote: From: Roland Scheidegger If we only feed one source vector at a time, we cannot use pack intrinsics (as we only have a 64bit destination dst vector). lp_bld_conv_auto is specifically designed to alter the length and number of

Re: [Mesa-dev] [PATCH 4/4] llvmpipe: do transpose/untwiddle after conversion for 8bit formats

On 22/12/16 03:39, srol...@vmware.com wrote: From: Roland Scheidegger Generally we should do tranpose after conversion, if the format has less than 32 bits per channel (if it has 32 bits, conversion is going to be a no-op anyway...). This is obviously because there's less

Re: [Mesa-dev] [PATCH 27/32] i965: Change resolve flags to enum

On Mon, Jan 02, 2017 at 06:37:18PM -0800, Ben Widawsky wrote: > In the foreseeable future it doesn't seem to make sense to have multiple > resolve flags. What does make sense is to have the caller give an > indication to the lower layers what it things should be done for > resolve. The enum change

Re: [Mesa-dev] [PATCH v2 4/4] i965: add a kernel_features bitfield to intel screen

On Wednesday, January 4, 2017 1:26:23 PM PST Iago Toral Quiroga wrote: > We can use this to track various features that may or may not be supported > by the hw / kernel. Currently, we usually do this by checking the generation > and supported command parser versions in various places thoughtout

Re: [Mesa-dev] [PATCH v2 1/4] i965: Move the pipelined test for SO register access to the screen

On Wednesday, January 4, 2017 1:26:20 PM PST Iago Toral Quiroga wrote: > From: Chris Wilson [snip] > + /* And afterwards clear the register */ > + if (reset) { > + *batch++ = MI_LOAD_REGISTER_IMM | (3 - 2); > + *batch++ = reg; > + *batch++ = 0; > + }

Re: [Mesa-dev] [PATCH v2 00/14] implement EGL_EXT_image_dma_buf_import_modifiers v2

On 17-01-04 22:55:17, Varad Gautam wrote: Hi Ben, On Wed, Jan 4, 2017 at 3:25 AM, Ben Widawsky wrote: On 16-11-24 20:50:37, Varad Gautam wrote: This is the second revision to the EGL_EXT_image_dma_buf_import_modifiers [1] series at [2], addressing the comments received.

Re: [Mesa-dev] [PATCH 19/32] i965/miptree: Allocate mcs_buf for an image's CCS_E

On Wed, Jan 04, 2017 at 09:40:51AM +0200, Pohjolainen, Topi wrote: > On Mon, Jan 02, 2017 at 06:37:10PM -0800, Ben Widawsky wrote: > > This code will disable actually creating these buffers for the scanout, > > but it puts the allocation in place. > > > > Primarily this patch is split out for

Re: [Mesa-dev] [PATCH 31/32] i965: Remove scanout restriction from lossless compression

On Mon, Jan 02, 2017 at 06:37:22PM -0800, Ben Widawsky wrote: > v2: Try to keep the assert as recommended by Topi. This requires > modifying the num_samples check to be <= 1 because internally created > buffers set num_samples = 0. > > Cc: Topi Pohjolainen >

Re: [Mesa-dev] [PATCH v2 22/25] nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributes

On Tue, 2017-01-03 at 14:41 -0800, Jason Ekstrand wrote: > I made a few pretty trivial comments.  With those addressed, > > Reviewed-by: Jason Ekstrand > > On Dec 16, 2016 8:55 AM, "Juan A. Suarez Romero" > wrote: > So far, input_reads was a bitmap

Re: [Mesa-dev] [PATCH 24/32] i965/miptree: Allocate mt earlier in update winsys

On Mon, Jan 02, 2017 at 06:37:15PM -0800, Ben Widawsky wrote: > Allows us to continue utilizing common miptree creation using __DRIimage > without creating a new DRIimage (for the intel_process_dri2_buffer() > case). > > This is a bit ugly, but I think it's the best one can do. > >

Re: [Mesa-dev] [PATCH v2 3/3] imx: gallium driver for imx-drm scanout driver

On Fri, Dec 23, 2016 at 11:04:51PM +0100, Christian Gmeiner wrote: [...] > +struct pipe_screen *imx_drm_screen_create(int fd) > +{ > + struct renderonly ro = { > + .create_for_resource = renderonly_create_kms_dumb_buffer_for_resource, > + .kms_fd = fd, > + .gpu_fd =

Re: [Mesa-dev] [PATCH 29/32] i965: Add new resolve hints full and partial

On Mon, Jan 02, 2017 at 06:37:20PM -0800, Ben Widawsky wrote: > Upper layers of the code will have the need to specify full or partial > resolves (more on this in the next patch). This code simply adds the new > enums and plumbs it in as minimally as necessary. > > Signed-off-by: Ben Widawsky

Re: [Mesa-dev] [PATCH 3/7] gallium: add FBFETCH opcode to retrieve the current sample value

On Jan 2, 2017 06:03, "Ilia Mirkin" wrote: Signed-off-by: Ilia Mirkin --- src/gallium/auxiliary/tgsi/tgsi_info.c | 2 +- src/gallium/docs/source/tgsi.rst | 11 +++ src/gallium/include/pipe/p_shader_tokens.h | 2 +- 3 files

Re: [Mesa-dev] [PATCH v2] spirv: compute push constant access offset & range

On Jan 4, 2017 12:46, "Lionel Landwerlin" wrote: On 04/01/17 18:16, Jason Ekstrand wrote: On Jan 4, 2017 12:02, "Lionel Landwerlin" wrote: v2: Move relative push constant relative offset computation down to

Re: [Mesa-dev] [PATCH] EGL: Implement the libglvnd interface for EGL.

I've got an updated patch out. Note that the Python scripts were largely unmodified from the ones in the libglvnd tree. I don't know if divergence between the two is something anyone is likely to care about, though, and I'd expect the EGL-specific changes to libglvnd's version to be pretty

[Mesa-dev] [PATCH] configure: Fix another bashism.

--- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 799f5ebda029..d1ffb57f57e3 100644 --- a/configure.ac +++ b/configure.ac @@ -2382,7 +2382,7 @@ dnl dnl Gallium helper functions dnl gallium_require_llvm() { -if test

Re: [Mesa-dev] [PATCH v2] spirv: compute push constant access offset & range

On 04/01/17 18:16, Jason Ekstrand wrote: On Jan 4, 2017 12:02, "Lionel Landwerlin" > wrote: v2: Move relative push constant relative offset computation down to _vtn_load_store_tail() (Jason) Hm... I may not

Re: [Mesa-dev] [PATCH] configure: Fix another bashism.

Reviewed-by: Matt Turner signature.asc Description: Digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 7/8] i965: Inline store_output helper in quads workaround code.

I need to read 8 for real but the rest seems sensible. 1-7 are Reviewed-by: Jason Ekstrand On Jan 4, 2017 10:49, "Jason Ekstrand" wrote: > On Jan 4, 2017 05:08, "Kenneth Graunke" wrote: > > It's only used in one place, it

[Mesa-dev] [PATCH 2/3] st/vdpau: use dri3 to direclty send the buffer to X(v1.1)

this avoids an extra copy which occurs in case of dri2 v1.1: fallback to dri2 if dri3 fails to initialize Suggested-by: Christian König Signed-off-by: Nayan Deshmukh --- src/gallium/state_trackers/vdpau/presentation.c | 58

[Mesa-dev] [PATCH 1/3] vl/dri3: use external texture as back buffers(v4)

dri3 allows us to send handle of a texture directly to X so this patch allows a state tracker to directly send its texture to X to be used as back buffer and avoids extra copying v2: use clip width/height to display a portion of the surface v3: remove redundant variables, fix wrapping, rename

[Mesa-dev] [PATCH 3/3] st/vdpau: remove the delayed rendering hack(v1.1)

the hack was introduced to avoid an extra copying but now with dri3 we don't need it anymore v1.1: rebasing Signed-off-by: Nayan Deshmukh --- src/gallium/state_trackers/vdpau/bitmap.c| 2 - src/gallium/state_trackers/vdpau/device.c| 50 -

Re: [Mesa-dev] [PATCH 4/6] nir: Add a local variable-based copy propagation pass

Ping? On Dec 12, 2016 21:39, "Jason Ekstrand" wrote: > --- > src/compiler/Makefile.sources | 1 + > src/compiler/nir/nir.h| 2 + > src/compiler/nir/nir_opt_copy_prop_vars.c | 799 > ++ > 3 files changed, 802

Re: [Mesa-dev] [PATCH 2/2] va: call texture_get_handle while the mutex is being held

On Wed, Jan 4, 2017 at 6:40 PM, Alex Deucher wrote: > On Wed, Jan 4, 2017 at 5:47 AM, Marek Olšák wrote: >> From: Marek Olšák >> >> The context may be used by texture_get_handle. > > The the omx state tracker need this as well? The

Re: [Mesa-dev] [PATCH] swr: fix windows build break

The header file should, instead, have an extern "C" in it. Header files should be safe to include in C++ code, most have extern "C" guards, but some get missed. Cheers, -ilia On Wed, Jan 4, 2017 at 12:41 PM, George Kyriazis wrote: > Explicitly declare

Re: [Mesa-dev] [PATCH 2/2] va: call texture_get_handle while the mutex is being held

On Wed, Jan 4, 2017 at 5:47 AM, Marek Olšák wrote: > From: Marek Olšák > > The context may be used by texture_get_handle. The the omx state tracker need this as well? Alex > --- > src/gallium/state_trackers/va/buffer.c | 7 +-- > 1 file changed, 5

Re: [Mesa-dev] [PATCH v2] spirv: compute push constant access offset & range

On Jan 4, 2017 12:02, "Lionel Landwerlin" wrote: v2: Move relative push constant relative offset computation down to _vtn_load_store_tail() (Jason) Hm... I may not have been particularly clear. I meant, more or less, to have get_io_offset (is that what its

Re: [Mesa-dev] [PATCH 7/7] st/mesa: enable GLSLOptimizeConservatively for drivers that want it

Marek Olšák writes: > From: Marek Olšák > > GLSL compilation now takes 24% less time with the Gallium noop driver. > I used my shader-db for the measurement. The difference for the whole > radeonsi driver can be ~10%. > > The generated TGSI is mostly the

Re: [Mesa-dev] [PATCH 2/2] spirv: compute push constant access offset & range

Thanks for doing this! On Dec 17, 2016 17:44, "Lionel Landwerlin" wrote: Signed-off-by: Lionel Landwerlin --- src/compiler/spirv/vtn_variables.c | 85 +++--

Re: [Mesa-dev] [PATCH v2 00/14] implement EGL_EXT_image_dma_buf_import_modifiers v2

Hi Ben, On Wed, Jan 4, 2017 at 3:25 AM, Ben Widawsky wrote: > On 16-11-24 20:50:37, Varad Gautam wrote: >> >> This is the second revision to the EGL_EXT_image_dma_buf_import_modifiers >> [1] >> series at [2], addressing the comments received. This diverges from v1 due >> to >>

Re: [Mesa-dev] [PATCH 1/2] vec4: use DIM instruction when loading DF immediates in HSW

On Wed, Jan 4, 2017 at 6:36 AM, Samuel Iglesias Gonsálvez wrote: > On Tue, 2017-01-03 at 12:14 -0500, Matt Turner wrote: >> On Tue, Jan 3, 2017 at 7:27 AM, Samuel Iglesias Gonsálvez >> wrote: >> > Signed-off-by: Samuel Iglesias Gonsálvez

[Mesa-dev] [PATCH v2] spirv: compute push constant access offset & range

v2: Move relative push constant relative offset computation down to _vtn_load_store_tail() (Jason) Signed-off-by: Lionel Landwerlin --- src/compiler/spirv/vtn_variables.c | 78 -

[Mesa-dev] [PATCH] swr: fix windows build break

Explicitly declare lp_native_vector_width inside an extern "C", since we cannot include the correct header file inside extern "C". --- src/gallium/drivers/swr/swr_screen.cpp | 16 +--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git

Re: [Mesa-dev] [PATCH] nir: fix loop iteration count calculation for floats

Hi, Tested-by: Eero Tamminen May also impact other programs having float indexed loops: - Invisible Inc - Talos Principle - Steam Big Picture - Serious Sam 3 - Eero On 04.01.2017 02:59, Timothy Arceri wrote: Fixes performance regression in SynMark PSPom

[Mesa-dev] [PATCH 0/8] i965: gl_TessLevel rescrambling in NIR

Hello, This series reworks i965's handling of gl_TessLevelInner/Outer[] arrays. Instead of using lower_tess_levels to turn them into vec4/vec2s, we pass them through to NIR and make them compact arrays (where array indexing translates to enhanced layouts components). This has some nice benefits.

Re: [Mesa-dev] [PATCH v2 19/25] isl: fix VA64 support for double and dvecN vertex attributes

On Tue, 2017-01-03 at 08:57 -0800, Jason Ekstrand wrote: > > > On Dec 16, 2016 8:55 AM, "Juan A. Suarez Romero" > wrote: > From: Samuel Iglesias Gonsálvez > > We use *64*_PASSTHRU formats to upload vertex attributes of 64 bits > to avoid

[Mesa-dev] [Bug 98833] [REGRESSION, bisected] Wayland revert commit breaks fullscreen frame updates

https://bugs.freedesktop.org/show_bug.cgi?id=98833 --- Comment #10 from Eero Tamminen --- Ping... Were you able to reproduce the issue with patched weston-simple-egl? -- You are receiving this mail because: You are the QA Contact for the

Re: [Mesa-dev] [PATCH 1/2] vec4: use DIM instruction when loading DF immediates in HSW

On Wed, 2017-01-04 at 12:36 +0100, Samuel Iglesias Gonsálvez wrote: > On Tue, 2017-01-03 at 12:14 -0500, Matt Turner wrote: > > On Tue, Jan 3, 2017 at 7:27 AM, Samuel Iglesias Gonsálvez > > wrote: > > > Signed-off-by: Samuel Iglesias Gonsálvez > > >

[Mesa-dev] [PATCH 2/2] va: call texture_get_handle while the mutex is being held

From: Marek Olšák The context may be used by texture_get_handle. --- src/gallium/state_trackers/va/buffer.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/gallium/state_trackers/va/buffer.c b/src/gallium/state_trackers/va/buffer.c index

[Mesa-dev] [PATCH 1/2] vdpau: call texture_get_handle while the mutex is being held

From: Marek Olšák The context may be used by texture_get_handle. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99158 --- src/gallium/state_trackers/vdpau/output.c | 7 +-- src/gallium/state_trackers/vdpau/surface.c | 12 2 files changed, 13

[Mesa-dev] [PATCH 6/8] nir: Make glsl_to_nir compact scalar TessLevel arrays.

Signed-off-by: Kenneth Graunke --- src/compiler/glsl/glsl_to_nir.cpp | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index 4e0a33a9e74..8b1aec1b3b4 100644 ---

[Mesa-dev] [PATCH 7/8] i965: Inline store_output helper in quads workaround code.

It's only used in one place, it ignores the offset parameter currently, and I want to add more parameters...at which point, passing in a bunch of integers seems less obvious than writing it out. Signed-off-by: Kenneth Graunke ---

[Mesa-dev] [PATCH 1/8] glsl: Create and use a new ir_variable::count_attribute_slots() wrapper.

This wraps glsl_type::count_attribute_slots(), but will soon contain a couple of overrides for a couple of GLSL built-ins variables. Signed-off-by: Kenneth Graunke --- src/compiler/glsl/ir.cpp| 7 +++ src/compiler/glsl/ir.h | 2

[Mesa-dev] [PATCH 8/8] i965: Rework gl_TessLevel*[] handling to use NIR compact arrays.

Treating everything as scalar arrays allows us to drop a bunch of special case input/output munging all throughout the backend. Instead, we just need to remap the TessLevel components to the appropriate patch URB header locations in remap_patch_urb_offsets(). We also switch to treating the TES

[Mesa-dev] [PATCH 4/8] glsl: Support gl_TessLevelInner/Outer[] as TES input variables.

Upcoming reworks in i965 are going to make it easy to handle this like any other input. Having it as a system value will just require additional code for no benefit. Signed-off-by: Kenneth Graunke --- src/compiler/glsl/builtin_variables.cpp | 15 +++

[Mesa-dev] [PATCH 2/8] glsl: Override the # of varying slots for ClipDistance and TessLevel*.

Right now, this shouldn't have any effect, as all drivers use LowerClipDist and LowerTessFactors to turn the float[] arrays into vectors. However, it should help make it possible for drivers to avoid that lowering. Signed-off-by: Kenneth Graunke ---

[Mesa-dev] [PATCH 3/8] glsl: Mark whole variable used for ClipDistance and TessLevel*.

There's no point in trying to mark partial array access for gl_ClipDistance, gl_TessLevelOuter, or gl_TessLevelInner - they're special built-in variables that control fixed function hardware, and will likely be used in an all-or-nothing fashion. Since these arrays only occupy 1-2 varying slots,

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