[Mesa-dev] [PATCH 2/2] [swr] fix index buffers with non-zero indices

Fix issue with index buffers that do not contain a 0 index. 0 index can be a non-valid index if the (copied) vertex buffers are a subset of the user's (which happens because we only copy the range between min & max). Core will use an index passed in from the driver to replace invalid indices.

[Mesa-dev] [PATCH 1/2] [swr] Add fetch shader cache

For now, the cache key is all of FETCH_COMPILE_STATE. Use new/delete for swr_vertex_element_state, since we have to call the constructors/destructors of the struct elements. --- src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h | 2 +- src/gallium/drivers/swr/swr_draw.cpp |

[Mesa-dev] [PATCH v2 1/2] vulkan/util: Add generator for enum_to_str functions

This adds a python generator to produce enum_to_str functions for Vulkan from the vk.xml API description. It supports extensions as well as core API features, and the generator works with both python2 and python3. Signed-off-by: Dylan Baker v2: - Fix automake comments

[Mesa-dev] [PATCH v2 2/2] vulkan: Combine wsi and util makefiles

cc: Matt Turner Signed-off-by: Dylan Baker v2: - add this patch --- configure.ac | 3 +-- src/Makefile.am| 2 +- src/intel/vulkan/Makefile.am | 4 ++-- src/vulkan/{wsi => }/Makefile.am | 16

Re: [Mesa-dev] [PATCH v2 2/2] vulkan: Combine wsi and util makefiles

Nice, thanks. Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/5] freedreno: add support for user index buffers

On Fri, Feb 17, 2017 at 2:14 PM, Rob Clark wrote: > Haven't had a chance to try this yet, but looks reasonable. But how > common would it be that a single indexbuf gets re-used for multiple > draws? I wonder if it would be better to just do the upload in >

[Mesa-dev] Mesa 13.0.5 release candidate

Hello list, The candidate for the Mesa 13.0.5 is now available. Currently we have: - 70 queued - 5 nominated (outstanding) - and 0 rejected patch(es) With this series we have: On the GLX/EGL front we have a GLVND fix for "The Binding of Isaac: Rebirth" and other games, EGL Wayland buffer

[Mesa-dev] [Bug 99849] Dashed lines (drawn via GLAMOR) are not rendered correctly

https://bugs.freedesktop.org/show_bug.cgi?id=99849 Bug ID: 99849 Summary: Dashed lines (drawn via GLAMOR) are not rendered correctly Product: Mesa Version: unspecified Hardware: x86-64 (AMD64) OS: Linux

[Mesa-dev] [Bug 99849] Dashed lines (drawn via GLAMOR) are not rendered correctly

https://bugs.freedesktop.org/show_bug.cgi?id=99849 Max Staudt changed: What|Removed |Added See Also|

[Mesa-dev] [PATCH mesa] egl/dri3: implement query surface hook

From: Brendan King This is a DRI3 version of a change made for DRI2 (4d6d4f939e0af4252e0b, "egl/dri2: implement query surface hook"), that fixed failures in dEQP-EGL.functional.resize.surface_size.grow and dEQP-EGL.functional.resize.surface_size.shrink. Cc: Tapani Pälli

[Mesa-dev] [Bug 99849] Dashed lines (drawn via GLAMOR) are not rendered correctly

https://bugs.freedesktop.org/show_bug.cgi?id=99849 Max Staudt changed: What|Removed |Added See Also|

[Mesa-dev] [Bug 99849] Dashed lines (drawn via GLAMOR) are not rendered correctly

https://bugs.freedesktop.org/show_bug.cgi?id=99849 Max Staudt changed: What|Removed |Added CC||mse00...@gmail.com,

Re: [Mesa-dev] [PATCH 0/3] i965: INTEL_performance_query for pipeline stats

Looks good to me. This series is : Reviewed-by: Lionel Landwerlin On 15/02/17 21:37, Robert Bragg wrote: To hopefully make progress towards landing support for OA unit metrics exposed via INTEL_performance_query the idea here is to first just tackle upstreaming

[Mesa-dev] [PATCH] vulkan/util: Add generator for enum_to_str functions

This adds a python generator to produce enum_to_str functions for Vulkan from the vk.xml API description. It supports extensions as well as core API features, and the generator works with both python2 and python3. CC: Jason Ekstrand Signed-off-by: Dylan Baker

[Mesa-dev] [PATCH 01/16] i965/miptree: Tell if anything got resolved

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 ++-- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 2 +- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

Re: [Mesa-dev] [PATCH] vulkan/util: Add generator for enum_to_str functions

On Fri, Feb 17, 2017 at 10:49 AM, Dylan Baker wrote: > This adds a python generator to produce enum_to_str functions for > Vulkan from the vk.xml API description. It supports extensions as well > as core API features, and the generator works with both python2 and > python3. >

Re: [Mesa-dev] [Mesa-stable] Mesa 13.0.5 release candidate

On 17 February 2017 at 17:14, Andreas Boll wrote: > 2017-02-17 16:15 GMT+01:00 Emil Velikov : >> Hello list, >> >> The candidate for the Mesa 13.0.5 is now available. Currently we have: >> - 70 queued >> - 5 nominated (outstanding) >> - and

[Mesa-dev] [PATCH 15/16] i965: Check if fast color clear state transition needs sync

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.c | 49 + 1 file changed, 49 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 52f8c17..28ed8d1

[Mesa-dev] [PATCH 12/16] i965/blorp/blit: Refactor hiz/ccs prep for blits

They are explicitly considered for blits from now on. Currently they are part of common surface preparation which is used by all blorp ops. However, color/hiz/depth/stencil clears and resolves use hiz/ccs without the tweaks. Signed-off-by: Topi Pohjolainen ---

[Mesa-dev] [PATCH 16/16] i965/blorp: Drop unnecessary flushes after clear/resolve

Now that there is proper end-of-pipe synchronization the additional delay needed before has become redundant. On SKL helps: OglDrvRes: 1.65304% +/- 0.0816077% by making blorp blits/copies more competitive. Signed-off-by: Topi Pohjolainen ---

[Mesa-dev] [PATCH 11/16] i965/blorp: Do more fine grained flushing/syncing

Color clears and resolves now consider end-of-pipe-sync similarly as normal render path. Blits remain functionally the same as before. Same as hiz/depth/stencil clears - they do not have src or dst enabled and therefore current logic was already no-op. Later patches will enable blorp blits for

Re: [Mesa-dev] [PATCH] vulkan/util: Add generator for enum_to_str functions

I'll send out a v2 soon. Quoting Matt Turner (2017-02-17 11:38:17) > On Fri, Feb 17, 2017 at 10:49 AM, Dylan Baker wrote: > > This adds a python generator to produce enum_to_str functions for > > Vulkan from the vk.xml API description. It supports extensions as well > > as

[Mesa-dev] i965: On-demand render target flushing

Currently: 1) Blorp color clears and resolves emit unconditional render target flush + command stream after every clear/resolve (including regular non-fast clears). 2) Blorp color clears, resolves and blits emit texture and constant cache resolves even in case only destination is dirty.

[Mesa-dev] [PATCH 03/16] i965: Hook end-of-pipe-sync after texture resolves

There are three functional changes in this patch: 1) Currently the iteration over textures would flush after each resolve: brw_render_cache_set_check_flush() would fire every time as the resolved surface would be found in the render cache. Now the iteration records is flush is needed and

[Mesa-dev] [PATCH 06/16] i965: Consider layered rt resolves along with other

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.c | 15 +++ src/mesa/drivers/dri/i965/brw_draw.c| 34 - 2 files changed, 15 insertions(+), 34 deletions(-) diff --git

[Mesa-dev] [PATCH 07/16] i965: Add color resolve end-of-pipe-sync before switch to blit ring

This ensures that all rendering is finished and gpu caches are flushed out. These are paths trying to switch to blit engine. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 16

[Mesa-dev] [PATCH 05/16] i965: Hook end-of-pipe-sync after framebuffer resolves

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.c | 101 1 file changed, 51 insertions(+), 50 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index

[Mesa-dev] [PATCH 09/16] i965/miptree: Add color resolve end-of-pipe-sync before sharing

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index

[Mesa-dev] [PATCH 08/16] i965/dri2: Add end-of-pipe-sync after color resolves

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index bb84102..75d4920 100644 ---

[Mesa-dev] [PATCH 14/16] i965: Consider surface resolves and sync after blorp ops

Note that on 3D render path gen >= 6 check is needed even though one considers BLORP driver state bit (although blorp itsels is effective only on gen6+). This is because driver state flags are all set unconditionally in initialization. Compute in turn does not need the check as it is not available

[Mesa-dev] [PATCH 02/16] i965/gen6+: Implement end-of-pipe sync

Implementation for gen < 6 is taken as copy-paste from brw_emit_mi_flush() in order to preserve the behavior in later patches. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/brw_pipe_control.c | 91

[Mesa-dev] [PATCH 04/16] i965: Hook end-of-pipe-sync after image resolves

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.c | 80 +++-- 1 file changed, 47 insertions(+), 33 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index

[Mesa-dev] [PATCH 10/16] i965: Add end-of-pipe sync before non-gpu read of color resolves

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 src/mesa/drivers/dri/i965/intel_tex_image.c| 10 -- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 11 +-- 3 files changed, 21 insertions(+), 8

[Mesa-dev] [PATCH 13/16] i965/blorp: Use conditional end-of-pipe-sync

instead of unconditional render cache flush. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 23 --- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c

Re: [Mesa-dev] [Mesa-stable] Mesa 13.0.5 release candidate

On Fri, Feb 17, 2017 at 7:24 PM, Emil Velikov wrote: > On 17 February 2017 at 17:14, Andreas Boll wrote: >> 2017-02-17 16:15 GMT+01:00 Emil Velikov : >>> Hello list, >>> >>> The candidate for the Mesa 13.0.5 is now

[Mesa-dev] mesa3d.org is now synced to docs/

Hey all, I (finally) set up the git hook, which means that the website [1] is now automagically updated whenever a change in docs/* on master is pushed. There might be bugs, and I'll be doing some other git hook related changes later on; if you see anything weird when pushing or if the website's

[Mesa-dev] [PATCH 1/2] isl: Return surface creation success from aux helpers

The isl_surf_init call that each of these helpers make can, in theory, fail. We should propagate that up to the caller rather than just silently ignoring it. --- src/intel/isl/isl.c | 72 +--- src/intel/isl/isl.h | 4 +--

[Mesa-dev] [PATCH 2/2] anv: Enable MSAA compression

This just enables basic MSAA compression (no fast clears) for all multisampled surfaces. This improves the framerate of the Sascha "multisampling" demo by 76% on my Sky Lake laptop. Running Talos on medium settings with 8x MSAA, this improves the framerate in the benchmark by 80%. ---

[Mesa-dev] [PATCH 1/2] isl: Return surface creation success from aux helpers

The isl_surf_init call that each of these helpers make can, in theory, fail. We should propagate that up to the caller rather than just silently ignoring it. --- src/intel/isl/isl.c | 72 +--- src/intel/isl/isl.h | 4 +--

[Mesa-dev] [Bug 99319] godot engine poor performance

https://bugs.freedesktop.org/show_bug.cgi?id=99319 Bronson changed: What|Removed |Added Version|13.0|17.0 -- You are

[Mesa-dev] [Bug 99319] godot engine poor performance

https://bugs.freedesktop.org/show_bug.cgi?id=99319 --- Comment #5 from Bronson --- Ive also thrown up a demo showing the situation with some stuff from my current project. There is a build here: https://drive.google.com/open?id=0B_nQZvJoqbFmRUtYT3pnUm14Szg It will load

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Fri, Feb 17, 2017 at 08:30:17AM -0800, Matt Turner wrote: > On Fri, Feb 17, 2017 at 5:39 AM, Emil Velikov > wrote: > > On 17 February 2017 at 01:10, Jonathan Gray wrote: > >> On Thu, Feb 16, 2017 at 04:25:02PM +, Emil Velikov wrote: > >>> On 16

Re: [Mesa-dev] mesa3d.org is now synced to docs/

On Fri, Feb 17, 2017 at 4:59 PM, Eric Engestrom wrote: > Hey all, > > I (finally) set up the git hook, which means that the website [1] is now > automagically updated whenever a change in docs/* on master is pushed. > > There might be bugs, and I'll be doing some other git hook

[Mesa-dev] [PATCH] util/build-id: define ElfW and NT_GNU_BUILD_ID if needed

Define ElfW() and NT_GNU_BUILD_ID if needed as these defines are not present on at least OpenBSD and FreeBSD. Fixes the build on OpenBSD. Signed-off-by: Jonathan Gray --- src/util/build_id.c | 8 1 file changed, 8 insertions(+) diff --git a/src/util/build_id.c

Re: [Mesa-dev] [PATCH 1/2] i965: Add an OUT_BATCH64() macro.

On Tue, Feb 14, 2017 at 1:45 PM, Kenneth Graunke wrote: > diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h > b/src/mesa/drivers/dri/i965/intel_batchbuffer.h > index bf7cadfc4d6..da8f7e561f4 100644 > --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h > +++

Re: [Mesa-dev] [PATCH shader-db 4/4] add special script to run on intel hardware

On Thu, Feb 16, 2017 at 4:29 AM, Lionel Landwerlin wrote: > Intel produces fairly beefy Xeon servers on which it would be nice to be > able to run shader-db to get some results pretty fast. Unfortunately those > don't ship with any intel graphics IP (only ancient

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Fri, Feb 17, 2017 at 5:39 AM, Emil Velikov wrote: > On 17 February 2017 at 01:10, Jonathan Gray wrote: >> On Thu, Feb 16, 2017 at 04:25:02PM +, Emil Velikov wrote: >>> On 16 February 2017 at 14:23, Jonathan Gray wrote: >>> > On

Re: [Mesa-dev] [PATCH 7/7] i965: Enable ARB_transform_feedback2 on Sandybridge.

On Fri, Feb 17, 2017 at 1:56 AM, Kenneth Graunke wrote: > The only feature over and above ES 3.0 is DrawTransformFeedback(). > > We already have to do the whole SOL_NUM_PRIMS_WRITTEN counter dance in > order to compute the SVBI value for ResumeTransformFeedback(), at which

Re: [Mesa-dev] Mesa 13.0.5 release candidate

2017-02-17 16:15 GMT+01:00 Emil Velikov : > Hello list, > > The candidate for the Mesa 13.0.5 is now available. Currently we have: > - 70 queued > - 5 nominated (outstanding) > - and 0 rejected patch(es) > > > Testing reports/general approval >

[Mesa-dev] [PATCH 5/5] gallium: remove PIPE_CAP_USER_INDEX_BUFFERS

From: Marek Olšák all drivers support it --- src/gallium/docs/source/screen.rst | 4 src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 - src/gallium/drivers/freedreno/freedreno_screen.c | 1 - src/gallium/drivers/i915/i915_screen.c | 1 -

[Mesa-dev] [PATCH 4/5] st/mesa: assume all drivers support user index buffers

From: Marek Olšák --- src/mesa/state_tracker/st_context.c | 2 -- src/mesa/state_tracker/st_context.h | 1 - src/mesa/state_tracker/st_draw.c| 50 ++--- 3 files changed, 13 insertions(+), 40 deletions(-) diff --git

[Mesa-dev] [PATCH 3/5] svga: implement user index buffers

From: Marek Olšák --- src/gallium/drivers/svga/svga_pipe_draw.c | 13 - src/gallium/drivers/svga/svga_screen.c| 2 +- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/svga/svga_pipe_draw.c

[Mesa-dev] [PATCH 1/5] etnaviv: add support for user index buffers

From: Marek Olšák --- src/gallium/auxiliary/util/u_helpers.c| 29 +++ src/gallium/auxiliary/util/u_helpers.h| 5 + src/gallium/drivers/etnaviv/etnaviv_context.c | 12 +++ src/gallium/drivers/etnaviv/etnaviv_screen.c | 2

[Mesa-dev] [PATCH 2/5] freedreno: add support for user index buffers

From: Marek Olšák --- src/gallium/drivers/freedreno/freedreno_draw.c | 13 + src/gallium/drivers/freedreno/freedreno_screen.c | 2 +- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/freedreno/freedreno_draw.c

Re: [Mesa-dev] [PATCH 1/2] radv: Never try to create more than max_sets descriptor sets.

On 16.02.2017 21:26, Bas Nieuwenhuizen wrote: We only use the freed ones after all free space has been used. If the app only allocates small descriptor sets, we might go over max_sets before the memory is full. Signed-off-by: Bas Nieuwenhuizen CC:

[Mesa-dev] [PATCH 1/7] i965: Drop dead Gen8+ code from Gen7/sometimes-HSW driver hooks.

These driver hooks are not used when MI_MATH and MI_LOAD_REGISTER_REG are supported, which Gen8+ can always do. So this code is dead. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen7_sol_state.c | 50 ++ 1 file changed, 24

[Mesa-dev] [PATCH 7/7] i965: Enable ARB_transform_feedback2 on Sandybridge.

The only feature over and above ES 3.0 is DrawTransformFeedback(). We already have to do the whole SOL_NUM_PRIMS_WRITTEN counter dance in order to compute the SVBI value for ResumeTransformFeedback(), at which point our existing GetTransformFeedbackVertexCount() implementation will do the trick

[Mesa-dev] [PATCH 3/7] i965: Use ctx->Const.MaxVertexStreams rather than BRW_XFB_MAX_STREAMS.

This way on Sandybridge we'll only do 1 stream worth of math, since we only have one SO_NUM_PRIMS_WRITTEN counter. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen6_sol.c | 25 - 1 file changed, 16 insertions(+), 9 deletions(-)

[Mesa-dev] [PATCH 4/7] i965: Update brw_save_primitives_written_counters for pre-Gen7.

Sandybridge and earlier only have a single counter. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen6_sol.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c

[Mesa-dev] [PATCH 6/7] i965: Properly reset SVBI counters on ResumeTransformFeedback().

This fixes Piglit's ARB_transform_feedback2/change-objects-while-paused GLES 3.0 test. When resuming the transform feedback object, we need to reset the SVBI counters so we continue writing at the correct point in the buffer. Instead of SO_WRITE_OFFSET counters (with a DWord offset), we have the

[Mesa-dev] [PATCH 2/7] i965: Move some code from gen7_sol_state.c to gen6_sol.c.

I plan to use these functions on Sandybridge soon. I changed the prefix on a couple of functions to "brw" instead of "gen7" as in theory they should be usable all the way back to G45. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.h| 6 ++

[Mesa-dev] [PATCH 5/7] i965: Save max_index in brw_transform_feedback_object.

I'm going to need this in a new Resume hook shortly. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.h | 6 ++ src/mesa/drivers/dri/i965/gen6_sol.c| 6 -- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git

Re: [Mesa-dev] [PATCH] glsl: binding qualifier must match with opaque-uniforms only

Dropping this patch due to the discussion I opened at: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=16238 The layout qualification among Uniform and Shader Storage Blocks across a linked program must match. Br. On Sun, 2017-02-05 at 20:53 +0200, Andres Gomez wrote: > The binding point is a

[Mesa-dev] Remaining work for the i965 on disk shader cache

Hi guys, I've rebased and updated the i965 cache on master which now contains most of the GLSL IR cache pieces. There are 4 extra GLSL IR patches required by i965 as it needs to fallback to compiling GLSL IR if there is a cache miss at draw time (radeonsi will always have tgsi so doesn't

Re: [Mesa-dev] [RFC] spec: MESA_program_binary

On 17.02.2017 09:31, Ernst Sjöstrand wrote: Also, what if the user switches between say AMDGPU-PRO and RadeonSI? I'd expect radeonsi to use the single Mesa enum, while AMDGPU-PRO obviously uses an AMD-assigned enum. Cheers, Nicolai Regards //Ernst 2017-02-17 1:33 GMT+01:00 Timothy

Re: [Mesa-dev] [PATCH] configure.ac: Drop LLVM compiler flags more radically

On 17/02/17 06:01 PM, Eero Tamminen wrote: > Hi, > > On 10.02.2017 02:59, Michel Dänzer wrote: >> On 09/02/17 10:50 PM, Emil Velikov wrote: >>> On 9 February 2017 at 08:07, Michel Dänzer wrote: From: Michel Dänzer Drop all -m*, -W*,

Re: [Mesa-dev] [PATCH 09/13] gallium: do not #include foo.h within extern C {}

On 16.02.2017 16:16, Emil Velikov wrote: From: Emil Velikov Analogous to previous commit. Signed-off-by: Emil Velikov Patches 2-7 & 9: Reviewed-by: Nicolai Hähnle ---

Re: [Mesa-dev] V2 GLSL IR & TGSI on-disk shader cache

On 17/02/17 19:26, Nicolai Hähnle wrote: On 16.02.2017 23:55, Timothy Arceri wrote: On 17/02/17 01:27, Nicolai Hähnle wrote: Hi Timothy, thank you for the update. I had a look at all the patches now, and especially the glsl parts looks basically ready to go. There are only minor comments

Re: [Mesa-dev] [PATCH 1/5] st/mesa: stop using TGSI_OPCODE_CLAMP

With Roland's comment on #5 addressed, the series is: Reviewed-by: Nicolai Hähnle On 16.02.2017 23:00, Marek Olšák wrote: From: Marek Olšák --- src/mesa/state_tracker/st_atifs_to_tgsi.c | 14 -- 1 file changed, 4 insertions(+), 10

Re: [Mesa-dev] [RFC] spec: MESA_program_binary

Also, what if the user switches between say AMDGPU-PRO and RadeonSI? Regards //Ernst 2017-02-17 1:33 GMT+01:00 Timothy Arceri : > > > On 17/02/17 10:44, Ian Romanick wrote: > >> On 02/15/2017 11:58 PM, Timothy Arceri wrote: >> >>> >>> >>> On 16/02/17 17:55, Tapani Pälli

Re: [Mesa-dev] [PATCH] mesa/formatquery: use consistent local function names

Gentle ping for a really trivial patch. On 11/02/17 17:21, Alejandro Piñeiro wrote: > --- > src/mesa/main/formatquery.c | 18 +- > 1 file changed, 9 insertions(+), 9 deletions(-) > > diff --git a/src/mesa/main/formatquery.c b/src/mesa/main/formatquery.c > index 29df958..598d34d

Re: [Mesa-dev] [PATCH 09/18] radeonsi: fix UNSIGNED_BYTE index buffer fallback with non-zero start

On 16.02.2017 23:06, Marek Olšák wrote: On Thu, Feb 16, 2017 at 4:10 PM, Nicolai Hähnle wrote: On 16.02.2017 13:53, Marek Olšák wrote: From: Marek Olšák start can only be non-zero with MultiDrawElements, which is unlikely to occur with UNSIGNED_BYTE

Re: [Mesa-dev] [PATCH 12/18] radeonsi: use a clever alignment for descriptor uploads

On 16.02.2017 23:16, Marek Olšák wrote: On Thu, Feb 16, 2017 at 4:17 PM, Nicolai Hähnle wrote: On 16.02.2017 13:53, Marek Olšák wrote: From: Marek Olšák Non-VBO descriptors won't be smaller than the cache line, so simply use the cache line size.

Re: [Mesa-dev] [PATCH 15/18] radeonsi: upload constants into VRAM instead of GTT

On 16.02.2017 23:36, Marek Olšák wrote: On Thu, Feb 16, 2017 at 4:21 PM, Nicolai Hähnle wrote: On 16.02.2017 13:53, Marek Olšák wrote: From: Marek Olšák This lowers lgkm wait cycles by 30% on VI and normal conditions. The might be a measurable

Re: [Mesa-dev] V2 GLSL IR & TGSI on-disk shader cache

On 16.02.2017 23:55, Timothy Arceri wrote: On 17/02/17 01:27, Nicolai Hähnle wrote: Hi Timothy, thank you for the update. I had a look at all the patches now, and especially the glsl parts looks basically ready to go. There are only minor comments for which I don't need a full resend of the

Re: [Mesa-dev] [PATCH] configure.ac: Drop LLVM compiler flags more radically

Hi, On 10.02.2017 02:59, Michel Dänzer wrote: On 09/02/17 10:50 PM, Emil Velikov wrote: On 9 February 2017 at 08:07, Michel Dänzer wrote: From: Michel Dänzer Drop all -m*, -W*, -O*, -g* and -f* flags, with the exception of -fno-rtti, which must

Re: [Mesa-dev] [PATCH] mesa: Clamp GetUniformuiv values to be >= 0.

On 16.02.2017 20:24, Antía Puentes wrote: On lun, 2016-12-12 at 10:43 +0100, Nicolai Hähnle wrote: On 12.12.2016 00:25, Kenneth Graunke wrote: Section 2.2.2 (Data Conversions For State Query Commands) of the OpenGL 4.5 October 24th 2016 specification says: "If a command returning unsigned

Re: [Mesa-dev] [PATCH] mesa/formatquery: use consistent local function names

Reviewed-by: Samuel Iglesias Gonsálvez On Sat, 2017-02-11 at 17:21 +0100, Alejandro Piñeiro wrote: > --- >  src/mesa/main/formatquery.c | 18 +- >  1 file changed, 9 insertions(+), 9 deletions(-) > > diff --git a/src/mesa/main/formatquery.c >

Re: [Mesa-dev] [PATCH] glsl: link error if unsized array not-last in ssbo

Reviewed-by: Iago Toral Quiroga You can also add the new piglit tests that this fixes to the commit log. Iago  On Wed, 2017-02-15 at 15:12 +0100, Jose Maria Casanova Crespo wrote: > If an unsized declared array is not the last in an SSBO > and an implicit size can not be

[Mesa-dev] [PATCH 1/2] radeonsi: fix UNSIGNED_BYTE index buffer fallback with non-zero start (v2)

From: Marek Olšák start can only be non-zero with MultiDrawElements, which is unlikely to occur with UNSIGNED_BYTE indices. v2: Also fix the util_shorten_ubyte_elts_to_userptr call. Tested with the new piglit. Cc: mesa-sta...@lists.freedesktop.org ---

[Mesa-dev] [PATCH 2/2] gallium/u_index_modify: don't add PIPE_TRANSFER_UNSYNCHRONIZED unconditionally

From: Marek Olšák It's OK for r300g (because r300g can't write to buffers via the GPU), but not later hardware. This issue was spotted randomly. Cc: mesa-sta...@lists.freedesktop.org --- src/gallium/auxiliary/util/u_index_modify.c | 9 ++---

Re: [Mesa-dev] [PATCH 1/7] i965: Drop dead Gen8+ code from Gen7/sometimes-HSW driver hooks.

Patches 1-5 are: Reviewed-by: Iago Toral Quiroga On Fri, 2017-02-17 at 01:56 -0800, Kenneth Graunke wrote: > These driver hooks are not used when MI_MATH and MI_LOAD_REGISTER_REG > are supported, which Gen8+ can always do.  So this code is dead. > > Signed-off-by: Kenneth

Re: [Mesa-dev] [PATCH 2/5] freedreno: add support for user index buffers

On Fri, Feb 17, 2017 at 11:27 AM, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/drivers/freedreno/freedreno_draw.c | 13 + > src/gallium/drivers/freedreno/freedreno_screen.c | 2 +- > 2 files changed, 14 insertions(+), 1

Re: [Mesa-dev] [PATCH 1/5] etnaviv: add support for user index buffers

On Fri, Feb 17, 2017 at 11:27 AM, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/auxiliary/util/u_helpers.c| 29 > +++ > src/gallium/auxiliary/util/u_helpers.h| 5 + >

Re: [Mesa-dev] [PATCH shader-db 3/4] run: set INTEL_NO_HW together with INTEL_DEVID_OVERRIDE

On 16/02/17 20:02, Kenneth Graunke wrote: On Thursday, February 16, 2017 4:29:50 AM PST Lionel Landwerlin wrote: Since we're already asking the driver to generate code for a different hardware than what we're running on, better not even bother with emitting any batch. Signed-off-by: Lionel

[Mesa-dev] [PATCH v2] run: add -j option to select number of threads

v2: Also drop the '-1' in favor of '-j1' (Matt) Signed-off-by: Lionel Landwerlin --- run.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/run.c b/run.c index 2654bff..0e77926 100644 --- a/run.c +++ b/run.c @@ -307,9 +307,7 @@ const

Re: [Mesa-dev] [PATCH 1/7] i965: Drop dead Gen8+ code from Gen7/sometimes-HSW driver hooks.

And patches 6-7 are also: Reviewed-by: Iago Toral Quiroga On Fri, 2017-02-17 at 13:21 +0100, Iago Toral wrote: > Patches 1-5 are: > > Reviewed-by: Iago Toral Quiroga > > On Fri, 2017-02-17 at 01:56 -0800, Kenneth Graunke wrote: > > > > These driver

Re: [Mesa-dev] [PATCH 2/5] freedreno: add support for user index buffers

Haven't had a chance to try this yet, but looks reasonable. But how common would it be that a single indexbuf gets re-used for multiple draws? I wonder if it would be better to just do the upload in set_index_buffer() instead? Also, I might have missed some discussion (have been buried in

[Mesa-dev] [PATCH] ac/llvm: fix various findMSB bugs

From: Marek Olšák sffbh needs to be suffixed with ".i32" --- src/amd/common/ac_llvm_build.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 5398f07..2f25b14 100644 ---

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On 17 February 2017 at 01:10, Jonathan Gray wrote: > On Thu, Feb 16, 2017 at 04:25:02PM +, Emil Velikov wrote: >> On 16 February 2017 at 14:23, Jonathan Gray wrote: >> > On Wed, Feb 15, 2017 at 11:11:50AM -0800, Matt Turner wrote: >> >> Provides the ability to