https://bugs.freedesktop.org/show_bug.cgi?id=103323
Petru Mihancea changed:
What|Removed |Added
Severity|normal |trivial
Fix build error.
CC vulkan/vulkan_libvulkan_common_la-anv_device.lo
In file included from vulkan/anv_device.c:33:0:
vulkan/anv_device.c: In function ‘anv_AllocateMemory’:
vulkan/anv_device.c:1562:37: error: ‘struct anv_device’ has no member named
‘instace’; did you mean ‘instance’?
On 10/16/2017 10:06 PM, Gert Wollny wrote:
It is possible that the optimizer ends up in an infinite loop in
post_scheduler::schedule_alu(), because post_scheduler::prepare_alu_group()
does not find a proper scheduling. This can be deducted from
pending.count() being larger than zero and not
Quoting Chris Wilson (2017-10-18 09:53:27)
> We only want to scare the user away from causing a GPU stall for mapping
> a busy bo. The time taken to instantiate the set of pages for a buffer
> and their mmapping is unavoidable and flagging idle bo as being busy is
> "crying wolf".
>
>
On 17.10.2017 21:53, Ville Syrjälä wrote:
On Tue, Oct 17, 2017 at 09:00:56PM +0200, Nicolai Hähnle wrote:
On 17.10.2017 16:09, Ville Syrjälä wrote:
On Tue, Oct 17, 2017 at 03:46:24PM +0200, Michel Dänzer wrote:
On 17/10/17 02:22 PM, Daniel Vetter wrote:
On Tue, Oct 17, 2017 at 12:28:17PM
https://bugs.freedesktop.org/show_bug.cgi?id=103323
Bug ID: 103323
Summary: Possible unintended error message in file pixel.c line
286
Product: Mesa
Version: git
Hardware: Other
OS: All
Status:
On 17 October 2017 at 21:49, Gurchetan Singh
wrote:
> Can you wrap color_buffers around:
>
> #if defined(HAVE_WAYLAND_PLATFORM) || defined(HAVE_DRM_PLATFORM) ||
> defined(HAVE_ANDROID_PLATFORM)
>
> flags? This is because platform_surfaceless has no native surfaces
On Wednesday, 2017-10-18 06:06:45 +, Harish Krupo wrote:
> Hi Eric,
>
> Eric Engestrom writes:
> > I might need to double check the spec, but I thought "no damage hint"
> > meant "no way to reduce the update, redraw the whole screen"?
> >
> > If that's the case, then
Use the core unpacking functions to convert the gl_pixelstore_attrib
into the real pixel address required for copying; thereby removing the
restrictions that the tiled-memcpy could only handle exactly matching
image transfers.
Cc: Matt Turner
Cc: Kenneth Graunke
A big limitation of the current direct memcpy routine is that it only
recognises a couple of (admittedly) common colour types, and cannot do
any inline conversion. If we pass the mesa_format down to memcpy and
tell it the direction of the transfer, we can start accepting a few
mixed transfers and
Iterate the tiled_memcpy for each face so that we can quickly do
synchronous uploads into cube maps etc.
Cc: Matt Turner
Cc: Kenneth Graunke
---
src/mesa/drivers/dri/i965/intel_tex_image.c | 60 +
1 file changed, 36
I noticed when enabling "accelerated readback" with userptr enabling
writes directly into client memory was that we often missed the
tiled-memcpy fastpaths; in particular it did not handle subimages. Since
I was relying on the tiled-memcpy fastpath to avoid using the GPU for
readback where
Linking libvulkan_intel.so can fail, due to unresolved references to
libexpat.so.
EXPAT_CFLAGS should be moved as well.
Signed-off-by: Hongxu Jia
---
src/intel/Makefile.common.am | 3 ++-
src/intel/Makefile.tools.am | 4
2 files changed, 2 insertions(+), 5
https://bugs.freedesktop.org/show_bug.cgi?id=103332
--- Comment #1 from Laurent Renard ---
I have tested with modified version of the tutorial found here :
http://www.opengl-tutorial.org/beginners-tutorials/tutorial-5-a-textured-cube/
Modifying the command
// Draw the
On 18.10.2017 10:10, Daniel Vetter wrote:
On Tue, Oct 17, 2017 at 09:01:52PM +0200, Nicolai Hähnle wrote:
On 17.10.2017 19:16, Daniel Vetter wrote:
On Tue, Oct 17, 2017 at 5:40 PM, Michel Dänzer wrote:
On 17/10/17 05:04 PM, Daniel Vetter wrote:
On Tue, Oct 17, 2017 at
r-b
On Wed, Oct 18, 2017 at 5:02 AM, Timothy Arceri wrote:
> Fixes: d1c9f30d7ff7 "radv: add radv_create_shaders() helper"
> ---
> src/amd/vulkan/radv_pipeline.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_pipeline.c
On 17 October 2017 at 21:38, Gurchetan Singh
wrote:
> The naming is verbose and somewhat inconsistent. We have:
>
> dri2_init_surface
> dri2_fini_surface
> dri2_egl_surface_alloc_local_buffer
> dri2_egl_surface_free_local_buffers
>
> I suggest you implement the
On Tuesday, 2017-10-17 19:21:10 +, Dylan Baker wrote:
> Signed-off-by: Dylan Baker
> ---
>
> I'm sending this out now so that others can look at it, review it, and
> reference
> it, but this should not end up in the 17.3 release, as the meson build for
> mesa
>
On 17 October 2017 at 20:21, Dylan Baker wrote:
> Signed-off-by: Dylan Baker
> ---
>
> I'm sending this out now so that others can look at it, review it, and
> reference
> it, but this should not end up in the 17.3 release, as the meson build for
Thanks again!
Reviewed-by: Lionel Landwerlin
On 18/10/17 08:54, Samuel Iglesias Gonsálvez wrote:
v2:
- Use helper to add a new source to the texture instruction.
Signed-off-by: Samuel Iglesias Gonsálvez
---
Suggested-by: Lionel Landwerlin
Signed-off-by: Eric Engestrom
---
src/intel/common/meson.build | 2 +-
src/intel/tools/meson.build | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/common/meson.build
On Tue, Oct 17, 2017 at 09:01:52PM +0200, Nicolai Hähnle wrote:
> On 17.10.2017 19:16, Daniel Vetter wrote:
> > On Tue, Oct 17, 2017 at 5:40 PM, Michel Dänzer wrote:
> > > On 17/10/17 05:04 PM, Daniel Vetter wrote:
> > > > On Tue, Oct 17, 2017 at 03:46:24PM +0200, Michel
https://bugs.freedesktop.org/show_bug.cgi?id=103332
Bug ID: 103332
Summary: glDrawArrays does not take the "first" argument into
account
Product: Mesa
Version: 17.2
Hardware: Other
OS: Linux (All)
https://bugs.freedesktop.org/show_bug.cgi?id=103332
Laurent Renard changed:
What|Removed |Added
CC|
It is already done in NIR.
Signed-off-by: Samuel Iglesias Gonsálvez
Reviewed-by: Lionel Landwerlin
---
src/intel/compiler/brw_vec4_nir.cpp | 9 -
src/intel/compiler/brw_vec4_visitor.cpp | 12
2 files changed, 21
It is already done in NIR.
Signed-off-by: Samuel Iglesias Gonsálvez
Reviewed-by: Lionel Landwerlin
---
src/intel/compiler/brw_fs_nir.cpp | 9 -
1 file changed, 9 deletions(-)
diff --git a/src/intel/compiler/brw_fs_nir.cpp
v2:
- Use helper to add a new source to the texture instruction.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/nir/nir_lower_tex.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/src/compiler/nir/nir_lower_tex.c
Fixes:
dEQP-VK.spirv_assembly.instruction.*.image_sampler.*
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_cfg.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/compiler/spirv/vtn_cfg.c b/src/compiler/spirv/vtn_cfg.c
index
On 18/10/17 10:10 AM, Daniel Vetter wrote:
> On Tue, Oct 17, 2017 at 09:01:52PM +0200, Nicolai Hähnle wrote:
>> On 17.10.2017 19:16, Daniel Vetter wrote:
>>> On Tue, Oct 17, 2017 at 5:40 PM, Michel Dänzer wrote:
On 17/10/17 05:04 PM, Daniel Vetter wrote:
> On Tue, Oct
On 11 October 2017 at 07:13, Guttula, Suresh
> wrote:
> HI,
>
>>- why do we need "surfaceless" support
>ChromeOS supports surfacelsess and we need this va enablement for
> surfaceless in chromium.
Ack, that should have been part of the
We only want to scare the user away from causing a GPU stall for mapping
a busy bo. The time taken to instantiate the set of pages for a buffer
and their mmapping is unavoidable and flagging idle bo as being busy is
"crying wolf".
Reported-by: Tvrtko Ursulin
Cc: Kenneth
Hi Eric,
Eric Engestrom writes:
> On Wednesday, 2017-10-18 06:06:45 +, Harish Krupo wrote:
>> Hi Eric,
>>
>> Eric Engestrom writes:
>> > I might need to double check the spec, but I thought "no damage hint"
>> > meant "no way to reduce the
On Wednesday, 2017-10-18 08:12:27 +, Vinson Lee wrote:
> Fix build error.
>
> CC vulkan/vulkan_libvulkan_common_la-anv_device.lo
> In file included from vulkan/anv_device.c:33:0:
> vulkan/anv_device.c: In function ‘anv_AllocateMemory’:
> vulkan/anv_device.c:1562:37: error: ‘struct
If you feel like it, you could also fix the meson build :)
Otherwise, this is :
Reviewed-by: Lionel Landwerlin
On 18/10/17 02:47, Hongxu Jia wrote:
Linking libvulkan_intel.so can fail, due to unresolved references to
libexpat.so.
EXPAT_CFLAGS should be moved as
Now that intel_miptree_prepare_texture takes levels and layers, there's
not much use in this anymore.
---
src/mesa/drivers/dri/i965/brw_draw.c | 6 --
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 --
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 +
3 files
This should avoid unnecessary resolves when working with texture views.
---
src/mesa/drivers/dri/i965/brw_draw.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index
Meta's GenerateMipmap implementation binds the same image for both
sampling and rendering - but it samples from one miplevel while
rendering the next. This is a false self-dependency, and there's
no need to disable auxiliary buffers in this case. In fact, we really
want to leave it enabled so
This effectively exports intel_miptree_prepare_texture_slices() as
intel_miptree_prepare_texture(). The hope is to avoid resolves for
when using texture views that access a subset of the levels/layers.
For now, we pass the same arguments to separate the mechanical change
from the one that
Quoting Eric Engestrom (2017-10-18 15:27:39)
> On Wednesday, 2017-10-18 18:09:22 +, Dylan Baker wrote:
> > v2: - Add information about CC, CXX, CFLAGS, and CXXFLAGS (Nicolai)
> > - Add message at top that meson for mesa is still a work in progress
> > - Add trailing "/" to directories
Signed-off-by: Dylan Baker
---
src/egl/meson.build | 46 --
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/src/egl/meson.build b/src/egl/meson.build
index ade6810bf91..8ea8a5bbb69 100644
---
This is based heavily on Daniel Stone's work for the same, rebased on
master and with a number of TODO's fixed.
This does not implement glvnd (which is coming in a later patch)
Meson builds egl slightly differently than autotools, namely it doesn't
build an intermediate shared library. It
Previously this failed to change with_glx to disabled from auto if
platform_x11 was unset or if no opengl apis were being built.
Signed-off-by: Dylan Baker
---
meson.build | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/meson.build
This small series adds support to the meson build system for building EGL in
both the glvnd and traditional configurations. I have tested it against the i965
using piglit and didn't see any regressions in the egl tests.
This work is based on work that Daniel Stone started, although I rewrote the
These files are needed by both vulkan wayland-wsi and by egl
wayland-wsi, since the XML file is in src/egl/wayland/wayland-drm and we
can include this directory in such a way that it will be loaded before
egl and vulkan this allows us to avoid multiple calls to the same
generator.
Signed-off-by:
On Wednesday, 2017-10-18 23:56:05 +, Dylan Baker wrote:
> Previously this failed to change with_glx to disabled from auto if
> platform_x11 was unset or if no opengl apis were being built.
>
> Signed-off-by: Dylan Baker
> ---
> meson.build | 8 ++--
> 1 file
typo in subject "is_barier" -> "is_barrier"
Quoting Kenneth Graunke (2017-10-18 16:59:12)
> Commit a73116ecc60414ade89802150b tried to make add_barrier_deps()
> walk to the next barrier, and stop. To accomplish that, it added an
> is_barrier flag. Unfortunately, this only works half of the
Signed-off-by: Jordan Justen
---
src/compiler/glsl/builtin_variables.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/glsl/builtin_variables.cpp
b/src/compiler/glsl/builtin_variables.cpp
index ea2d897cc8..d3cf12475b 100644
---
Signed-off-by: Jordan Justen
---
src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c
b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c
index f9322654e7..d27727624c
From: Jason Ekstrand
It's redundant with nir_shader::info::stage.
---
src/amd/common/ac_nir_to_llvm.c| 30 ++---
src/amd/common/ac_shader_info.c| 2 +-
src/amd/vulkan/radv_shader.c | 4 +-
git://people.freedesktop.org/~jljusten/mesa i965-shader-cache-v2
The series adds support for a disk shader cache for i965, but it does
not enable it by default. To enable the i965 shader cache you need to
set the environment variable MESA_GLSL_CACHE_DISABLE=0.
v2:
* Fallback now uses Connor &
From: Timothy Arceri
This enables the cache on vertex and fragment shaders only.
v2:
* Use MAYBE_UNUSED. (Matt)
[jordan.l.jus...@intel.com: reword subject]
[jordan.l.jus...@intel.com: *_cached_program => brw_disk_cache_*_program]
Signed-off-by: Jordan Justen
From: Connor Abbott
Not sure if this is the best place to put it, but we're going to need
this for NIR too.
---
src/compiler/glsl/shader_cache.cpp | 171 -
src/compiler/glsl_types.cpp| 171 +
No OC_LDS_EN for HS, and the included LS vgpr_comp_cnt is at
a different offset.
---
src/amd/vulkan/radv_shader.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index a7836543998..a86ba2a01c0
---
src/amd/common/ac_nir_to_llvm.c | 133 +---
1 file changed, 83 insertions(+), 50 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 67945a353e8..cb011bd88bb 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
---
src/amd/vulkan/radv_cmd_buffer.c | 14 +++---
src/amd/vulkan/radv_pipeline.c | 2 +-
src/amd/vulkan/radv_shader.c | 19 +++
src/amd/vulkan/radv_shader.h | 4 ++--
4 files changed, 25 insertions(+), 14 deletions(-)
diff --git
---
src/amd/common/ac_nir_to_llvm.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index cb011bd88bb..242675654d2 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@
---
src/amd/vulkan/radv_cmd_buffer.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 3e31fbafd34..a746777ca40 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++
---
src/amd/vulkan/radv_cmd_buffer.c | 19 ++-
src/amd/vulkan/radv_pipeline.c | 14 --
src/amd/vulkan/radv_private.h| 2 ++
3 files changed, 28 insertions(+), 7 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index
We need different regs to end up in s0/s1.
---
src/amd/vulkan/radv_device.c | 36
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index fd705fe726d..125498809ec 100644
---
Needed for GFX9 merged shaders.
---
src/amd/common/ac_nir_to_llvm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3ba3ebf051e..1df97b59a2e 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
From: Jason Ekstrand
---
src/compiler/nir/nir.h | 17 +
src/compiler/nir/nir_serialize.c | 19 +++
2 files changed, 36 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index dd833cf183..87c725625d
From: Connor Abbott
v2 (Jason Ekstrand):
- Various whitespace cleanups
- Add helpers for reading/writing objects
- Rework derefs
- [de]serialize nir_shader::num_*
- Fix uses of blob_reserve_bytes
- Use a bitfield struct for packing tex_instr data
v3:
- Zero
If the i965 gen program cannot be loaded from the cache, then we
fallback to using a serialized nir program.
This is based on "i965: add cache fallback support" by Timothy Arceri
. Tim's version was written to fallback
to compiling from source, and therefore had to
From: Carl Worth
This will be used by the on disk shader cache.
v2:
* Set in brw_compile_* rather than brw_codegen_*. (Jason)
Signed-off-by: Timothy Arceri
[jordan.l.jus...@intel.com: Only add to brw_stage_prog_data]
Signed-off-by: Jordan
Signed-off-by: Jordan Justen
---
src/compiler/nir/nir.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index fe48451694..cbba9c8749 100644
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -481,6 +481,7 @@
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_context.c | 4
src/mesa/drivers/dri/i965/brw_context.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index
When a program is restored from the shader cache, prog->nir will be
NULL, but prog->info will be restored.
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_wm.c | 4 ++--
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 ++--
Signed-off-by: Jordan Justen
---
src/compiler/glsl/shader_cache.cpp | 16
1 file changed, 16 insertions(+)
diff --git a/src/compiler/glsl/shader_cache.cpp
b/src/compiler/glsl/shader_cache.cpp
index ca90cfde35..f43bd6b17e 100644
---
Signed-off-by: Jordan Justen
---
src/compiler/glsl/glsl_to_nir.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
index 63694fd41f..1d1085ffbc 100644
---
From: Timothy Arceri
This uses the recently-added disk_cache.c to write out the final
linked binary for vertex and fragment shader programs.
This is based off the initial implementation done by Carl Worth.
v2:
* Squash 'i965: add image param shader cache support'
From: Timothy Arceri
v2:
* Use MAYBE_UNUSED. (Matt)
[jordan.l.jus...@intel.com: *_cached_program => brw_disk_cache_*_program]
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_disk_cache.c | 49
Cc: Dylan Baker
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/Makefile.am | 1 +
src/mesa/drivers/dri/meson.build | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/Makefile.am
Signed-off-by: Jordan Justen
---
src/compiler/nir/nir_lower_system_values.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/nir/nir_lower_system_values.c
b/src/compiler/nir/nir_lower_system_values.c
index ba20d3083f..39b1a260bd 100644
---
If the shader cache is enabled, after linking the program, we
serialize the program to nir. This will be saved out by the glsl
shader cache support.
Later, if the same program is found in the cache, we can use the nir
for a fallback in the unlikely case that the gen binary program is not
found in
Signed-off-by: Jordan Justen
---
src/compiler/glsl/glsl_to_nir.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
index 1d1085ffbc..c659a25ca7 100644
---
These fields can be used to optionally save off a nir serialized form
of the program.
Signed-off-by: Jordan Justen
---
src/mesa/main/mtypes.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index
On Wed, Oct 18, 2017 at 4:59 PM, Kenneth Graunke wrote:
> Commit a73116ecc60414ade89802150b tried to make add_barrier_deps()
> walk to the next barrier, and stop. To accomplish that, it added an
> is_barrier flag. Unfortunately, this only works half of the time.
>
> The
---
src/amd/common/ac_nir_to_llvm.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 38f47b34e10..f01ca8799b9 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
To prevent VS/TCS collisions in merged shaders.
---
src/amd/common/ac_nir_to_llvm.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 66d539dec47..360d613d58d 100644
---
---
src/amd/common/ac_nir_to_llvm.c | 82 ++---
src/amd/common/ac_nir_to_llvm.h | 3 +-
src/amd/vulkan/radv_shader.c| 2 +-
3 files changed, 48 insertions(+), 39 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
---
src/amd/common/ac_binary.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/amd/common/ac_binary.c b/src/amd/common/ac_binary.c
index 1bf52c78328..cf0125c415f 100644
--- a/src/amd/common/ac_binary.c
+++ b/src/amd/common/ac_binary.c
@@ -252,6 +252,7 @@ void
---
src/amd/common/ac_nir_to_llvm.c | 254
1 file changed, 178 insertions(+), 76 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index f01ca8799b9..c6c56f30b81 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
---
src/amd/common/ac_nir_to_llvm.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index c6c56f30b81..67945a353e8 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
---
src/amd/common/ac_nir_to_llvm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 8a1e64ce7e1..66d539dec47 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -154,7
---
src/amd/common/ac_nir_to_llvm.h | 1 +
src/amd/vulkan/radv_pipeline.c | 29 +
src/amd/vulkan/radv_shader.c| 17 ++---
src/amd/vulkan/radv_shader.h| 5 +++--
4 files changed, 39 insertions(+), 13 deletions(-)
diff --git
From: Dave Airlie
Looking at shader traces I noticed some registers were missing,
one of them was being eaten by the wrong clear state length.
Fixes: 4f42ea4dc (radv: use CLEAR_STATE for initializing some registers)
Signed-off-by: Dave Airlie
---
On Fri, Sep 29, 2017 at 2:25 PM, Jason Ekstrand wrote:
> diff --git a/src/mesa/drivers/dri/i965/gen6_constant_state.c
> b/src/mesa/drivers/dri/i965/gen6_constant_state.c
> index b2e357f..93a12c7 100644
> --- a/src/mesa/drivers/dri/i965/gen6_constant_state.c
> +++
On Wed, Oct 18, 2017 at 03:20:57PM -0400, Harry Wentland wrote:
> On 2017-10-18 04:10 AM, Daniel Vetter wrote:
> > On Tue, Oct 17, 2017 at 09:01:52PM +0200, Nicolai Hähnle wrote:
> >> On 17.10.2017 19:16, Daniel Vetter wrote:
> >>> On Tue, Oct 17, 2017 at 5:40 PM, Michel Dänzer
I pushed the series, thanks!
Marek
On Mon, Oct 16, 2017 at 12:22 AM, Darren Salt wrote:
> ---
> src/util/drirc | 27 +--
> 1 file changed, 21 insertions(+), 6 deletions(-)
>
> diff --git a/src/util/drirc b/src/util/drirc
> index
Quoting Eric Engestrom (2017-10-18 17:25:05)
> On Wednesday, 2017-10-18 23:56:00 +, Dylan Baker wrote:
> > This is based heavily on Daniel Stone's work for the same, rebased on
> > master and with a number of TODO's fixed.
> >
> > This does not implement glvnd (which is coming in a later
On Wednesday, 2017-10-18 23:56:00 +, Dylan Baker wrote:
> This is based heavily on Daniel Stone's work for the same, rebased on
> master and with a number of TODO's fixed.
>
> This does not implement glvnd (which is coming in a later patch)
>
> Meson builds egl slightly differently than
From: Jason Ekstrand
---
src/compiler/glsl_types.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/compiler/glsl_types.cpp b/src/compiler/glsl_types.cpp
index a7fc7ff7f6..704b63c5cf 100644
--- a/src/compiler/glsl_types.cpp
+++ b/src/compiler/glsl_types.cpp
From: Timothy Arceri
This will be used to disable the shader cache when xfb is enabled
via the api as we don't currently allow for it when generating the
sha for the shader.
---
src/compiler/glsl/link_varyings.cpp | 5 -
src/mesa/main/mtypes.h | 3
Double negative FTW!
For now, the shader cache is disabled by default on i965 to allow us
to verify its stability.
In other words, to enable the shader cache on i965, set
MESA_GLSL_CACHE_DISABLE to false or 0. If the variable is unset, then
the shader cache will be disabled.
We use the build-id
Signed-off-by: Jordan Justen
Cc: Timothy Arceri
---
src/mesa/drivers/dri/i965/brw_link.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp
b/src/mesa/drivers/dri/i965/brw_link.cpp
index
This would cause the read of the metadata content to fail, which would
prevent the linking from being skipped.
Seen on Rocket League with i965 shader cache.
Cc: Timothy Arceri
Signed-off-by: Jordan Justen
---
src/util/disk_cache.c | 2 +-
1
Fixes many GL 4.5 CTS blend tests, such as:
* GL45-CTS.blend_equation_advanced.extension_directive_enable
* GL45-CTS.blend_equation_advanced.extension_directive_warn
* GL45-CTS.blend_equation_advanced.blend_all.GL_MULTIPLY_KHR_all_qualifier
*
From: Timothy Arceri
For now this disables the shader cache when transform feedback is
enabled via the GL API as we don't currently allow for it when
generating the sha for the shader.
---
src/mesa/drivers/dri/i965/brw_disk_cache.c | 8
1 file changed, 8
v2:
* Use MAYBE_UNUSED. (Matt)
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_cs.c | 24 ---
src/mesa/drivers/dri/i965/brw_cs.h | 3 +++
src/mesa/drivers/dri/i965/brw_disk_cache.c | 36
From: Jason Ekstrand
Cc: mesa-sta...@lists.freedesktop.org
---
src/compiler/nir/nir_intrinsics.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_intrinsics.h
b/src/compiler/nir/nir_intrinsics.h
index 0de7080bfa..cefd18be90
1 - 100 of 207 matches
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