Hi Marek,
actually I was on the verge to remove the 32bit VM support in libdrm
because it clashes with HMM and SVM in general.
Is it possible to set the upper 32bit of the 64bit address to some fixed
value instead?
Regards,
Christian.
Am 06.01.2018 um 12:12 schrieb Marek Olšák:
Hi,
This
Both are
Reviewed-by: Jason Ekstrand
There is a part of me that has been tempted for some time to try and make
some sort of generic batch buffer structure and share it between GL and
Vulkan. Getting this stuff right is hard and a good set of unified helpers
may help.
On Sat, Jan 6, 2018 at 1:34 AM, Kenneth Graunke wrote:
> On Thursday, January 4, 2018 11:56:44 AM PST Jason Ekstrand wrote:
>> On January 4, 2018 12:51:15 Karol Herbst wrote:
>>
>> > On Thu, Jan 4, 2018 at 7:06 PM, Ilia Mirkin
Series:
Reviewed-by: Alejandro Piñeiro
On 06/01/18 06:40, Ian Romanick wrote:
> From: Ian Romanick
>
> In file included from src/compiler/nir/nir_opt_algebraic.c:4:0:
> src/compiler/nir/nir_search_helpers.h: In function ‘is_not_const’:
>
https://bugs.freedesktop.org/show_bug.cgi?id=104381
Laurent carlier changed:
What|Removed |Added
Status|NEW |RESOLVED
On 6 January 2018 at 01:03, Jason Ekstrand wrote:
> On Tue, Nov 7, 2017 at 3:08 AM, Alex Smith
> wrote:
>
>> Thanks Jason. Can someone push this?
>>
>
> Did you never get push access?
>
I did - this is commit
From: Marek Olšák
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 63 ---
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 9 ++--
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h | 11 ++--
3 files changed, 47 insertions(+), 36 deletions(-)
From: Marek Olšák
---
src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c | 2 +-
src/gallium/auxiliary/pipebuffer/pb_cache.c| 20
src/gallium/auxiliary/pipebuffer/pb_cache.h| 6 --
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
From: Marek Olšák
---
src/gallium/drivers/radeon/radeon_winsys.h | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h
b/src/gallium/drivers/radeon/radeon_winsys.h
index d1c761f..49ef83b
From: Marek Olšák
---
src/gallium/auxiliary/pipebuffer/pb_cache.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/gallium/auxiliary/pipebuffer/pb_cache.c
b/src/gallium/auxiliary/pipebuffer/pb_cache.c
index b67e54b..dd479ae 100644
---
From: Marek Olšák
---
src/gallium/drivers/radeon/radeon_winsys.h | 51 --
1 file changed, 48 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h
b/src/gallium/drivers/radeon/radeon_winsys.h
index
Hi,
This series:
- increases the number of buckets in pb_cache
- adds 32-bit heaps: GTT WC, VRAM, and read-only versions of those
- adds a 32-bit VM allocator into winsys/radeon and enables 32-bit VM
allocations in both winsyses
- moves all const_uploader allocations to 32-bit address space
-
From: Marek Olšák
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index 5d565ff..8ce131c 100644
---
From: Marek Olšák
shader-db doesn't show any regression and 32-bit pointers with byval
are declared as VGPRs for some reason.
---
src/amd/common/ac_llvm_helper.cpp | 3 +--
src/amd/common/ac_llvm_util.c | 2 --
src/amd/common/ac_llvm_util.h
From: Marek Olšák
---
src/amd/common/ac_llvm_build.h | 1 +
src/amd/common/ac_nir_to_llvm.c | 9 +++--
src/gallium/drivers/radeonsi/si_shader.c | 11 +++
3 files changed, 7 insertions(+), 14 deletions(-)
diff --git
From: Marek Olšák
---
src/gallium/drivers/radeon/radeon_winsys.h| 24
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 27 +--
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 2 +-
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 164f310..ed00d20 100644
--- a/src/amd/common/ac_llvm_build.c
+++
From: Marek Olšák
SGPRS: 2170102 -> 2158430 (-0.54 %)
VGPRS: 1645656 -> 1641516 (-0.25 %)
Spilled SGPRs: 9078 -> 8810 (-2.95 %)
Spilled VGPRs: 130 -> 114 (-12.31 %)
Scratch size: 1508 -> 1492 (-1.06 %) dwords per thread
Code Size: 52094872 -> 52692540 (1.15 %) bytes
---
From: Marek Olšák
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 42 +++
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 28 ++-
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h | 2 ++
3 files changed, 64 insertions(+), 8
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c| 6 ++
src/amd/common/ac_llvm_build.h| 3 +++
src/amd/common/ac_nir_to_llvm.c | 20 +++-
src/gallium/drivers/radeonsi/si_shader.c |
From: Marek Olšák
State trackers must use a user buffer or const_uploader,
or set pipe_resource::flags same as const_uploader->flags.
---
src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_buffer_common.c | 3 +++
src/gallium/drivers/radeon/r600_pipe_common.c | 5 +++--
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git
Signed-off-by: Karol Herbst
Reviewed-by: Kenneth Graunke
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
On Saturday, January 6, 2018 9:07:44 PM PST Jason Ekstrand wrote:
> On Sat, Jan 6, 2018 at 5:12 PM, Kenneth Graunke
> wrote:
>
> > On Wednesday, November 15, 2017 11:53:08 PM PST Iago Toral Quiroga wrote:
> > > We currently handle this by lowering it to a uniform for gen8+
On Sat, Jan 6, 2018 at 5:12 PM, Kenneth Graunke
wrote:
> On Wednesday, November 15, 2017 11:53:08 PM PST Iago Toral Quiroga wrote:
> > We currently handle this by lowering it to a uniform for gen8+ but
> > the SPIR-V path generates this as a system value, so handle that
>
On Wednesday, November 15, 2017 11:53:08 PM PST Iago Toral Quiroga wrote:
> We currently handle this by lowering it to a uniform for gen8+ but
> the SPIR-V path generates this as a system value, so handle that
> case as well.
> ---
> src/mesa/drivers/dri/i965/brw_tcs.c | 9 -
> 1 file
Thanks.
Reviewed-by: Timothy Arceri
On 06/01/18 20:01, Karol Herbst wrote:
Signed-off-by: Karol Herbst
Reviewed-by: Kenneth Graunke
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 8 ++--
1 file changed, 6
On Fri, 2018-01-05 at 15:26 -0800, Dylan Baker wrote:
> Quoting Jan Vesely (2018-01-05 14:16:41)
> > Hi,
> >
> >
> > sorry for the delay. I was mostly traveling during the holidays.
>
> No worries, I was also away over the holidays and didn't look at this until
> today.
>
> >
> > On Fri,
Quoting Jan Vesely (2018-01-06 15:18:54)
> On Fri, 2018-01-05 at 15:26 -0800, Dylan Baker wrote:
> > Quoting Jan Vesely (2018-01-05 14:16:41)
> > > Hi,
> > >
> > >
> > > sorry for the delay. I was mostly traveling during the holidays.
> >
> > No worries, I was also away over the holidays and
On Sat, Jan 6, 2018 at 5:51 PM, Christian König
wrote:
> Hi Marek,
>
> actually I was on the verge to remove the 32bit VM support in libdrm because
> it clashes with HMM and SVM in general.
>
> Is it possible to set the upper 32bit of the 64bit address to some
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