Re: [Mesa-dev] [PATCH 07/16] radv: Implement VK_KHR_maintenance3.

[Bas Nieuwenhuizen]

On Wed, Mar 7, 2018 at 7:19 PM, Samuel Pitoiset
 wrote:
>
>
> On 03/07/2018 03:47 PM, Bas Nieuwenhuizen wrote:
>>
>> Reviewed-by: Dave Airlie 
>> ---
>>   src/amd/vulkan/radv_descriptor_set.c | 82
>> ++--
>>   src/amd/vulkan/radv_device.c | 10 +
>>   src/amd/vulkan/radv_extensions.py|  1 +
>>   3 files changed, 89 insertions(+), 4 deletions(-)
>>
>> diff --git a/src/amd/vulkan/radv_descriptor_set.c
>> b/src/amd/vulkan/radv_descriptor_set.c
>> index 38b8dc78e1..265028df2b 100644
>> --- a/src/amd/vulkan/radv_descriptor_set.c
>> +++ b/src/amd/vulkan/radv_descriptor_set.c
>> @@ -31,6 +31,20 @@
>>   #include "radv_private.h"
>>   #include "sid.h"
>>   +
>> +static bool has_equal_immutable_samplers(const VkSampler *samplers,
>> uint32_t count)
>> +{
>> +   if (!samplers)
>> +   return false;
>> +   for(uint32_t i = 1; i < count; ++i) {
>> +   if (memcmp(radv_sampler_from_handle(samplers[0])->state,
>> +  radv_sampler_from_handle(samplers[i])->state,
>> 16)) {
>> +   return false;
>> +   }
>> +   }
>> +   return true;
>> +}
>> +
>>   VkResult radv_CreateDescriptorSetLayout(
>> VkDevice_device,
>> const VkDescriptorSetLayoutCreateInfo*  pCreateInfo,
>> @@ -132,15 +146,13 @@ VkResult radv_CreateDescriptorSetLayout(
>> if (binding->pImmutableSamplers) {
>> set_layout->binding[b].immutable_samplers_offset =
>> samplers_offset;
>> -   set_layout->binding[b].immutable_samplers_equal =
>> true;
>> +   set_layout->binding[b].immutable_samplers_equal =
>> +
>> has_equal_immutable_samplers(binding->pImmutableSamplers,
>> binding->descriptorCount);
>> set_layout->has_immutable_samplers = true;
>> for (uint32_t i = 0; i < binding->descriptorCount;
>> i++)
>> memcpy(samplers + 4 * i,
>> _sampler_from_handle(binding->pImmutableSamplers[i])->state, 16);
>> -   for (uint32_t i = 1; i < binding->descriptorCount;
>> i++)
>> -   if (memcmp(samplers + 4 * i, samplers, 16)
>> != 0)
>> -
>> set_layout->binding[b].immutable_samplers_equal = false;
>> /* Don't reserve space for the samplers if they're
>> not accessed. */
>> if
>> (set_layout->binding[b].immutable_samplers_equal) {
>> @@ -182,6 +194,68 @@ void radv_DestroyDescriptorSetLayout(
>> vk_free2(>alloc, pAllocator, set_layout);
>>   }
>>   +void radv_GetDescriptorSetLayoutSupport(VkDevice device,
>> +const
>> VkDescriptorSetLayoutCreateInfo* pCreateInfo,
>> +VkDescriptorSetLayoutSupport*
>> pSupport)
>> +{
>> +   bool supported = true;
>> +   uint64_t size = 0;
>> +   for (uint32_t i = 0; i < pCreateInfo->bindingCount; i++) {
>> +   const VkDescriptorSetLayoutBinding *binding =
>> >pBindings[i];
>> +
>> +   if (binding->descriptorCount == 0)
>> +   continue;
>> +
>> +   uint64_t descriptor_size = 0;
>> +   uint64_t descriptor_alignment = 1;
>> +   switch (binding->descriptorType) {
>> +   case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
>> +   case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
>> +   break;
>> +   case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
>> +   case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
>> +   case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
>> +   case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
>> +   descriptor_size = 16;
>> +   descriptor_alignment = 16;
>> +   break;
>> +   case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
>> +   case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
>> +   case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
>> +   descriptor_size = 64;
>> +   descriptor_alignment = 32;
>> +   break;
>> +   case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
>> +   if
>> (!has_equal_immutable_samplers(binding->pImmutableSamplers,
>> binding->descriptorCount)) {
>> +   descriptor_size = 64;
>> +   } else {
>> +   descriptor_size = 96;
>> +   }
>> +   descriptor_alignment = 32;
>
>
> Missing break?

So much for the tests ...

Fixed locally.

>
>
>> +   case VK_DESCRIPTOR_TYPE_SAMPLER:
>> +   if
>> (!has_equal_immutable_samplers(binding->pImmutableSamplers,
>> binding->descriptorCount)) {
>> +   

Re: [Mesa-dev] [PATCH 1/5] i965: Hard code scratch_ids_per_subslice for Cherryview

[Jordan Justen]

On 2018-03-07 07:41:04, Eero Tamminen wrote:
> Hi,
> 
> Tested SynMark CSDof and GfxBench Aztec Ruins GL & GLES / normal & high 
> versions, which were earlier GPU hanging.  With this patch hangs are gone.
> 
> Tested-by: Eero Tamminen 

Thanks!

> On 07.03.2018 10:16, Jordan Justen wrote:
> > Ken suggested that we might be underallocating scratch space on HD
> > 400. Allocating scratch space as though there was actually 8 EUs
> 
> s/8/18/?
> 

I think you meant 16 rather than 18? I guess we have either 6 EU *per
subslice* (HD 400) or 8 EU per subslice (HD 405). With 2 subslices,
that'd be either 12 or 16 EU.

In my comments and commit message I should add 'per subslice' by the
6/8 EU numbers to make it clearer.

-Jordan

> 
> > seems to help with a GPU hang seen on synmark CSDof.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104636
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105290
> > Cc: Kenneth Graunke 
> > Cc: Eero Tamminen 
> > Cc: 
> > Signed-off-by: Jordan Justen 
> > ---
> >   src/mesa/drivers/dri/i965/brw_program.c | 44 
> > -
> >   1 file changed, 27 insertions(+), 17 deletions(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_program.c 
> > b/src/mesa/drivers/dri/i965/brw_program.c
> > index 527f003977b..c121136c439 100644
> > --- a/src/mesa/drivers/dri/i965/brw_program.c
> > +++ b/src/mesa/drivers/dri/i965/brw_program.c
> > @@ -402,23 +402,33 @@ brw_alloc_stage_scratch(struct brw_context *brw,
> > if (devinfo->gen >= 9)
> >subslices = 4 * brw->screen->devinfo.num_slices;
> >   
> > -  /* WaCSScratchSize:hsw
> > -   *
> > -   * Haswell's scratch space address calculation appears to be sparse
> > -   * rather than tightly packed.  The Thread ID has bits indicating
> > -   * which subslice, EU within a subslice, and thread within an EU
> > -   * it is.  There's a maximum of two slices and two subslices, so 
> > these
> > -   * can be stored with a single bit.  Even though there are only 10 
> > EUs
> > -   * per subslice, this is stored in 4 bits, so there's an effective
> > -   * maximum value of 16 EUs.  Similarly, although there are only 7
> > -   * threads per EU, this is stored in a 3 bit number, giving an 
> > effective
> > -   * maximum value of 8 threads per EU.
> > -   *
> > -   * This means that we need to use 16 * 8 instead of 10 * 7 for the
> > -   * number of threads per subslice.
> > -   */
> > -  const unsigned scratch_ids_per_subslice =
> > - devinfo->is_haswell ? 16 * 8 : devinfo->max_cs_threads;
> > +  unsigned scratch_ids_per_subslice;
> > +  if (devinfo->is_haswell) {
> > + /* WaCSScratchSize:hsw
> > +  *
> > +  * Haswell's scratch space address calculation appears to be 
> > sparse
> > +  * rather than tightly packed. The Thread ID has bits indicating
> > +  * which subslice, EU within a subslice, and thread within an EU 
> > it
> > +  * is. There's a maximum of two slices and two subslices, so these
> > +  * can be stored with a single bit. Even though there are only 10 
> > EUs
> > +  * per subslice, this is stored in 4 bits, so there's an effective
> > +  * maximum value of 16 EUs. Similarly, although there are only 7
> > +  * threads per EU, this is stored in a 3 bit number, giving an
> > +  * effective maximum value of 8 threads per EU.
> > +  *
> > +  * This means that we need to use 16 * 8 instead of 10 * 7 for the
> > +  * number of threads per subslice.
> > +  */
> > + scratch_ids_per_subslice = 16 * 8;
> > +  } else if (devinfo->is_cherryview) {
> > + /* For Cherryview, it appears that the scratch addresses for the 
> > 6 EU
> > +  * devices may still generate compute scratch addresses covering 
> > the
> > +  * same range as 8 EU.
> > +  */
> > + scratch_ids_per_subslice = 8 * 7;
> > +  } else {
> > + scratch_ids_per_subslice = devinfo->max_cs_threads;
> > +  }
> >   
> > thread_count = scratch_ids_per_subslice * subslices;
> > break;
> > 
> 
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Re: [Mesa-dev] [PATCH 07/16] radv: Implement VK_KHR_maintenance3.

[Emil Velikov]

On 7 March 2018 at 18:32, Bas Nieuwenhuizen  wrote:

>>
>> Missing break?
>
> So much for the tests ...
>
Speaking of tests, I hope they check that both KHR and non KHR
annotated functions (the ones changed in 04/16) are tested.
We don't want them to disappear for setups using a pre 1.1 loader.

Just a fly-by comment ;-)

-Emil
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Re: [Mesa-dev] [PATCH 07/16] radv: Implement VK_KHR_maintenance3.

[Gustaw Smolarczyk]

2018-03-07 15:47 GMT+01:00 Bas Nieuwenhuizen :

> Reviewed-by: Dave Airlie 
> ---
>  src/amd/vulkan/radv_descriptor_set.c | 82 ++
> --
>  src/amd/vulkan/radv_device.c | 10 +
>  src/amd/vulkan/radv_extensions.py|  1 +
>  3 files changed, 89 insertions(+), 4 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_descriptor_set.c b/src/amd/vulkan/radv_
> descriptor_set.c
> index 38b8dc78e1..265028df2b 100644
> --- a/src/amd/vulkan/radv_descriptor_set.c
> +++ b/src/amd/vulkan/radv_descriptor_set.c
> @@ -31,6 +31,20 @@
>  #include "radv_private.h"
>  #include "sid.h"
>
> +
> +static bool has_equal_immutable_samplers(const VkSampler *samplers,
> uint32_t count)
> +{
> +   if (!samplers)
> +   return false;
> +   for(uint32_t i = 1; i < count; ++i) {
> +   if (memcmp(radv_sampler_from_handle(samplers[0])->state,
> +  radv_sampler_from_handle(samplers[i])->state,
> 16)) {
> +   return false;
> +   }
> +   }
> +   return true;
> +}
> +
>  VkResult radv_CreateDescriptorSetLayout(
> VkDevice_device,
> const VkDescriptorSetLayoutCreateInfo*  pCreateInfo,
> @@ -132,15 +146,13 @@ VkResult radv_CreateDescriptorSetLayout(
>
> if (binding->pImmutableSamplers) {
> set_layout->binding[b].immutable_samplers_offset
> = samplers_offset;
> -   set_layout->binding[b].immutable_samplers_equal =
> true;
> +   set_layout->binding[b].immutable_samplers_equal =
> +   
> has_equal_immutable_samplers(binding->pImmutableSamplers,
> binding->descriptorCount);
> set_layout->has_immutable_samplers = true;
>
>
> for (uint32_t i = 0; i < binding->descriptorCount;
> i++)
> memcpy(samplers + 4 * i,
> _sampler_from_handle(binding->pImmutableSamplers[i])->state, 16);
> -   for (uint32_t i = 1; i < binding->descriptorCount;
> i++)
> -   if (memcmp(samplers + 4 * i, samplers, 16)
> != 0)
> -   
> set_layout->binding[b].immutable_samplers_equal
> = false;
>
> /* Don't reserve space for the samplers if they're
> not accessed. */
> if (set_layout->binding[b].immutable_samplers_equal)
> {
> @@ -182,6 +194,68 @@ void radv_DestroyDescriptorSetLayout(
> vk_free2(>alloc, pAllocator, set_layout);
>  }
>
> +void radv_GetDescriptorSetLayoutSupport(VkDevice device,
> +const
> VkDescriptorSetLayoutCreateInfo* pCreateInfo,
> +VkDescriptorSetLayoutSupport*
> pSupport)
> +{
> +   bool supported = true;
> +   uint64_t size = 0;
> +   for (uint32_t i = 0; i < pCreateInfo->bindingCount; i++) {
> +   const VkDescriptorSetLayoutBinding *binding =
> >pBindings[i];
> +
> +   if (binding->descriptorCount == 0)
> +   continue;
> +
> +   uint64_t descriptor_size = 0;
> +   uint64_t descriptor_alignment = 1;
> +   switch (binding->descriptorType) {
> +   case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
> +   case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
> +   break;
> +   case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
> +   case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
> +   case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
> +   case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
> +   descriptor_size = 16;
> +   descriptor_alignment = 16;
> +   break;
> +   case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
> +   case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
> +   case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
> +   descriptor_size = 64;
> +   descriptor_alignment = 32;
> +   break;
> +   case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
> +   if 
> (!has_equal_immutable_samplers(binding->pImmutableSamplers,
> binding->descriptorCount)) {
> +   descriptor_size = 64;
> +   } else {
> +   descriptor_size = 96;
> +   }
> +   descriptor_alignment = 32;
> +   case VK_DESCRIPTOR_TYPE_SAMPLER:
> +   if 
> (!has_equal_immutable_samplers(binding->pImmutableSamplers,
> binding->descriptorCount)) {
> +   descriptor_size = 16;
> +   descriptor_alignment = 16;
> +   }
> +   break;
> +

[Mesa-dev] [PATCH] st/dri: fix OpenGL-OpenCL interop for GL_TEXTURE_BUFFER

[Marek Olšák]

From: Marek Olšák 

Tested by our OpenCL team.

Fixes: 9c499e6759b26c5e "st/mesa: don't invoke st_finalize_texture & 
st_convert_sampler for TBOs"
---
 src/gallium/state_trackers/dri/dri2.c | 58 ---
 1 file changed, 34 insertions(+), 24 deletions(-)

diff --git a/src/gallium/state_trackers/dri/dri2.c 
b/src/gallium/state_trackers/dri/dri2.c
index 2a3a2a8..31d17d4 100644
--- a/src/gallium/state_trackers/dri/dri2.c
+++ b/src/gallium/state_trackers/dri/dri2.c
@@ -1870,53 +1870,63 @@ dri2_interop_export_object(__DRIcontext *_ctx,
*miplevel is zero or if the GL texture object is incomplete."
*/
   if (!obj ||
   obj->Target != target ||
   !obj->_BaseComplete ||
   (in->miplevel > 0 && !obj->_MipmapComplete)) {
  simple_mtx_unlock(>Shared->Mutex);
  return MESA_GLINTEROP_INVALID_OBJECT;
   }
 
-  /* From OpenCL 2.0 SDK, clCreateFromGLTexture:
-   *   "CL_INVALID_MIP_LEVEL if miplevel is less than the value of
-   *levelbase (for OpenGL implementations) or zero (for OpenGL ES
-   *implementations); or greater than the value of q (for both OpenGL
-   *and OpenGL ES). levelbase and q are defined for the texture in
-   *section 3.8.10 (Texture Completeness) of the OpenGL 2.1
-   *specification and section 3.7.10 of the OpenGL ES 2.0."
-   */
-  if (in->miplevel < obj->BaseLevel || in->miplevel > obj->_MaxLevel) {
- simple_mtx_unlock(>Shared->Mutex);
- return MESA_GLINTEROP_INVALID_MIP_LEVEL;
-  }
-
-  if (!st_finalize_texture(ctx, st->pipe, obj, 0)) {
- simple_mtx_unlock(>Shared->Mutex);
- return MESA_GLINTEROP_OUT_OF_RESOURCES;
-  }
+  if (target == GL_TEXTURE_BUFFER) {
+ struct st_buffer_object *stBuf =
+st_buffer_object(obj->BufferObject);
 
-  res = st_get_texobj_resource(obj);
-  if (!res) {
- /* Incomplete texture buffer object? This shouldn't really occur. */
- simple_mtx_unlock(>Shared->Mutex);
- return MESA_GLINTEROP_INVALID_OBJECT;
-  }
+ if (!stBuf || !stBuf->buffer) {
+/* this shouldn't happen */
+simple_mtx_unlock(>Shared->Mutex);
+return MESA_GLINTEROP_INVALID_OBJECT;
+ }
+ res = stBuf->buffer;
 
-  if (target == GL_TEXTURE_BUFFER) {
  out->internal_format = obj->BufferObjectFormat;
  out->buf_offset = obj->BufferOffset;
  out->buf_size = obj->BufferSize == -1 ? obj->BufferObject->Size :
  obj->BufferSize;
 
  obj->BufferObject->UsageHistory |= USAGE_DISABLE_MINMAX_CACHE;
   } else {
+ /* From OpenCL 2.0 SDK, clCreateFromGLTexture:
+  *   "CL_INVALID_MIP_LEVEL if miplevel is less than the value of
+  *levelbase (for OpenGL implementations) or zero (for OpenGL ES
+  *implementations); or greater than the value of q (for both 
OpenGL
+  *and OpenGL ES). levelbase and q are defined for the texture in
+  *section 3.8.10 (Texture Completeness) of the OpenGL 2.1
+  *specification and section 3.7.10 of the OpenGL ES 2.0."
+  */
+ if (in->miplevel < obj->BaseLevel || in->miplevel > obj->_MaxLevel) {
+simple_mtx_unlock(>Shared->Mutex);
+return MESA_GLINTEROP_INVALID_MIP_LEVEL;
+ }
+
+ if (!st_finalize_texture(ctx, st->pipe, obj, 0)) {
+simple_mtx_unlock(>Shared->Mutex);
+return MESA_GLINTEROP_OUT_OF_RESOURCES;
+ }
+
+ res = st_get_texobj_resource(obj);
+ if (!res) {
+/* Incomplete texture buffer object? This shouldn't really occur. 
*/
+simple_mtx_unlock(>Shared->Mutex);
+return MESA_GLINTEROP_INVALID_OBJECT;
+ }
+
  out->internal_format = obj->Image[0][0]->InternalFormat;
  out->view_minlevel = obj->MinLevel;
  out->view_numlevels = obj->NumLevels;
  out->view_minlayer = obj->MinLayer;
  out->view_numlayers = obj->NumLayers;
   }
}
 
/* Get the handle. */
switch (in->access) {
-- 
2.7.4

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[Mesa-dev] [PATCH 1/5] radeonsi: align command buffer starting address to fix some Raven hangs

[Marek Olšák]

From: Marek Olšák 

Cc: 17.3 18.0 
---
 src/amd/common/ac_gpu_info.c  | 21 -
 src/amd/common/ac_gpu_info.h  |  1 +
 src/gallium/drivers/radeonsi/si_pm4.c |  5 +++--
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c |  5 +++--
 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c |  1 +
 5 files changed, 28 insertions(+), 5 deletions(-)

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 146098b..7c13e5f 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -91,21 +91,23 @@ static bool has_syncobj(int fd)
return false;
return value ? true : false;
 }
 
 bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
   struct radeon_info *info,
   struct amdgpu_gpu_info *amdinfo)
 {
struct amdgpu_buffer_size_alignments alignment_info = {};
struct amdgpu_heap_info vram, vram_vis, gtt;
-   struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {}, uvd_enc 
= {}, vce = {}, vcn_dec = {}, vcn_enc = {};
+   struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {};
+   struct drm_amdgpu_info_hw_ip uvd_enc = {}, vce = {}, vcn_dec = {};
+   struct drm_amdgpu_info_hw_ip vcn_enc = {}, gfx = {};
uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature 
= 0;
int r, i, j;
drmDevicePtr devinfo;
 
/* Get PCI info. */
r = drmGetDevice2(fd, 0, );
if (r) {
fprintf(stderr, "amdgpu: drmGetDevice2 failed.\n");
return false;
}
@@ -147,20 +149,26 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
fprintf(stderr, "amdgpu: amdgpu_query_heap_info(gtt) 
failed.\n");
return false;
}
 
r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_DMA, 0, );
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(dma) 
failed.\n");
return false;
}
 
+   r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_GFX, 0, );
+   if (r) {
+   fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(gfx) 
failed.\n");
+   return false;
+   }
+
r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_COMPUTE, 0, );
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(compute) 
failed.\n");
return false;
}
 
r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_UVD, 0, );
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(uvd) 
failed.\n");
return false;
@@ -333,20 +341,31 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 
memcpy(info->cik_macrotile_mode_array, amdinfo->gb_macro_tile_mode,
sizeof(amdinfo->gb_macro_tile_mode));
 
info->pte_fragment_size = alignment_info.size_local;
info->gart_page_size = alignment_info.size_remote;
 
if (info->chip_class == SI)
info->gfx_ib_pad_with_type2 = TRUE;
 
+   unsigned ib_align = 0;
+   ib_align = MAX2(ib_align, gfx.ib_start_alignment);
+   ib_align = MAX2(ib_align, compute.ib_start_alignment);
+   ib_align = MAX2(ib_align, dma.ib_start_alignment);
+   ib_align = MAX2(ib_align, uvd.ib_start_alignment);
+   ib_align = MAX2(ib_align, uvd_enc.ib_start_alignment);
+   ib_align = MAX2(ib_align, vce.ib_start_alignment);
+   ib_align = MAX2(ib_align, vcn_dec.ib_start_alignment);
+   ib_align = MAX2(ib_align, vcn_enc.ib_start_alignment);
+   info->ib_start_alignment = ib_align;
+
return true;
 }
 
 void ac_compute_driver_uuid(char *uuid, size_t size)
 {
char amd_uuid[] = "AMD-MESA-DRV";
 
assert(size >= sizeof(amd_uuid));
 
memset(uuid, 0, size);
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 7c86dc1..0beba96 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -55,20 +55,21 @@ struct radeon_info {
uint64_tgart_size;
uint64_tvram_size;
uint64_tvram_vis_size;
uint64_tmax_alloc_size;
uint32_tmin_alloc_size;
uint32_taddress32_hi;
boolhas_dedicated_vram;
boolhas_virtual_memory;
boolgfx_ib_pad_with_type2;
boolhas_hw_decode;
+   unsignedib_start_alignment;
uint32_tnum_sdma_rings;
uint32_tnum_compute_rings;
uint32_tuvd_fw_version;
uint32_tvce_fw_version;
booluvd_enc_supported;

[Mesa-dev] [PATCH 3/5] winsys/amdgpu: pad compute rings

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c 
b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index d9a95c0..9cd3343 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -1531,20 +1531,24 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs,
   /* pad GFX ring to 8 DWs to meet CP fetch alignment requirements */
   if (ws->info.gfx_ib_pad_with_type2) {
  while (rcs->current.cdw & 7)
 radeon_emit(rcs, 0x8000); /* type2 nop packet */
   } else {
  while (rcs->current.cdw & 7)
 radeon_emit(rcs, 0x1000); /* type3 nop packet */
   }
   ws->gfx_ib_size_counter += (rcs->prev_dw + rcs->current.cdw) * 4;
   break;
+   case RING_COMPUTE:
+  while (rcs->current.cdw & 7)
+ radeon_emit(rcs, 0x1000); /* type3 nop packet */
+  break;
case RING_UVD:
case RING_UVD_ENC:
   while (rcs->current.cdw & 15)
  radeon_emit(rcs, 0x8000); /* type2 nop packet */
   break;
case RING_VCN_DEC:
   while (rcs->current.cdw & 15)
  radeon_emit(rcs, 0x81ff); /* nop packet */
   break;
default:
-- 
2.7.4

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Re: [Mesa-dev] [PATCH 3/5] intel/dev: Add devinfo cs_scratch_ids_per_subslice field

[Jordan Justen]

On 2018-03-07 00:47:12, Kenneth Graunke wrote:
> On Wednesday, March 7, 2018 12:16:28 AM PST Jordan Justen wrote:
> > Suggested-by: Kenneth Graunke 
> > Signed-off-by: Jordan Justen 
> > ---
> >  src/intel/dev/gen_device_info.c | 13 -
> >  src/intel/dev/gen_device_info.h |  8 
> >  2 files changed, 16 insertions(+), 5 deletions(-)
> > 
> > diff --git a/src/intel/dev/gen_device_info.c 
> > b/src/intel/dev/gen_device_info.c
> > index 1773009d33c..de018c6a692 100644
> > --- a/src/intel/dev/gen_device_info.c
> > +++ b/src/intel/dev/gen_device_info.c
> > @@ -284,11 +284,13 @@ static const struct gen_device_info 
> > gen_device_info_byt = {
> > },
> >  };
> >  
> > -#define HSW_FEATURES \
> > -   GEN7_FEATURES,\
> > -   .is_haswell = true,   \
> > -   .supports_simd16_3src = true, \
> > -   .has_resource_streamer = true
> > +#define HSW_FEATURES \
> > +   GEN7_FEATURES,\
> > +   .is_haswell = true,   \
> > +   .supports_simd16_3src = true, \
> > +   .has_resource_streamer = true,\
> > +   /* WaCSScratchSize:hsw */ \
> > +   .cs_scratch_ids_per_subslice = 16 * 8
> >  
> >  static const struct gen_device_info gen_device_info_hsw_gt1 = {
> > HSW_FEATURES, .gt = 1,
> > @@ -476,6 +478,7 @@ static const struct gen_device_info gen_device_info_chv 
> > = {
> > .max_gs_threads = 80,
> > .max_wm_threads = 128,
> > .max_cs_threads = 6 * 7,
> > +   .cs_scratch_ids_per_subslice = 8 * 7,
> > .urb = {
> >.size = 192,
> >.min_entries = {
> > diff --git a/src/intel/dev/gen_device_info.h 
> > b/src/intel/dev/gen_device_info.h
> > index b8044d00032..fa6b38f19ec 100644
> > --- a/src/intel/dev/gen_device_info.h
> > +++ b/src/intel/dev/gen_device_info.h
> > @@ -148,6 +148,14 @@ struct gen_device_info
> >  */
> > unsigned max_cs_threads;
> >  
> > +   /**
> > +* The range of scratch addresses may differ from the number of EUs
> > +* available for compute programs. This requires allocating a larger
> > +* scratch buffer. For affected hardware, this will be set. If this is 
> > not
> > +* set, then max_cs_threads should be used instead.
> > +*/
> > +   unsigned cs_scratch_ids_per_subslice;
> > +
> > struct {
> >/**
> > * Hardware default URB size.
> > 
> 
> This works, but it's not quite what I had in mind.  I was thinking you
> would add the new field, then add this hunk to gen_get_device_info():
> 
>if (devinfo->is_haswell) {
>   /* WaCSScratchSize:hsw
>*
>* Haswell's scratch space address calculation appears to be sparse
>* rather than tightly packed. The Thread ID has bits indicating
>* which subslice, EU within a subslice, and thread within an EU it
>* is. There's a maximum of two slices and two subslices, so these
>* can be stored with a single bit. Even though there are only 10 EUs
>* per subslice, this is stored in 4 bits, so there's an effective
>* maximum value of 16 EUs. Similarly, although there are only 7
>* threads per EU, this is stored in a 3 bit number, giving an
>* effective maximum value of 8 threads per EU.
>*
>* This means that we need to use 16 * 8 instead of 10 * 7 for the
>* number of threads per subslice.
>*/
>   devinfo->cs_scratch_ids_per_subslice = 16 * 8;
>} else if (devinfo->is_cherryview) {
>   /* For Cherryview, it appears that the scratch addresses for the 6 EU
>* devices may still generate compute scratch addresses covering the
>* same range as 8 EU.
>*/
>   devinfo->cs_scratch_ids_per_subslice = 8 * 7;
>} else {
>   devinfo->cs_scratch_ids_per_subslice = devinfo->max_cs_threads;
>}

Originally, I had initialized them in the structures, and then had:

   if (devinfo->cs_scratch_ids_per_subslice == 0)
  devinfo->cs_scratch_ids_per_subslice = devinfo->max_cs_threads;

I used it directly, like you mentioned below.

Then I got concerned about how the kernel params might update
max_cs_threads, and should that cause cs_scratch_ids_per_subslice to
be updated? So, I changed it to be treated as an override.

But, I could change the code that updates max_cs_threads to also
update cs_scratch_ids_per_subslice.

> This way, the field is always meaningful, and so in patches 4-5 you can
> just use devinfo->cs_scratch_ids_per_subslice directly rather than doing
> 
>   const unsigned scratch_ids_per_subslice =
>  devinfo->cs_scratch_ids_per_subslice ?
>  devinfo->cs_scratch_ids_per_subslice : devinfo->max_cs_threads;
> 
> This also has the side effect of preserving the comment, which I think
> is valuable.

Well, I guess I thought that the comment might be a bit overwrought.
:) I mean, it's good to know that there's a special 

Re: [Mesa-dev] [PATCH v3 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

[Lepton Wu]

Actually the reason why I need this CL:

In multi plane patch I'd like to only mmap once for different planes
of same buffer. So actually I need some way
to reuse same mmap for different planes. Then it's natural to have
this CL.  The fix to leak is a side effect of this CL.
dt_unmap still works with this CL,  if user call dt_map for single
plane buffer multiple times,  they will get same pointer, and if they
call dt_unmap
,  with this CL, it still get unmapped.

On Wed, Mar 7, 2018 at 7:14 AM, Emil Velikov  wrote:
> On 6 March 2018 at 22:43, Lepton Wu  wrote:
>> If user calls map twice for kms_sw_displaytarget, the first mapped
>> buffer could get leaked. Instead of calling mmap every time, just
>> reuse previous mapping. Since user could map same displaytarget with
>> different flags, we have to keep two different pointers, one for rw
>> mapping and one for ro mapping.
>>
>> Change-Id: I65308f0ff2640bd57b2577c6a3469540c9722859
>> Signed-off-by: Lepton Wu 
>> ---
>>  .../winsys/sw/kms-dri/kms_dri_sw_winsys.c | 26 ++-
>>  1 file changed, 19 insertions(+), 7 deletions(-)
>>
>> diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 
>> b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>> index 22e1c936ac5..30343222470 100644
>> --- a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>> +++ b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>> @@ -70,6 +70,7 @@ struct kms_sw_displaytarget
>>
>> uint32_t handle;
>> void *mapped;
>> +   void *ro_mapped;
>>
>> int ref_count;
>> struct list_head link;
>> @@ -170,6 +171,11 @@ kms_sw_displaytarget_destroy(struct sw_winsys *ws,
>> if (kms_sw_dt->ref_count > 0)
>>return;
>>
>> +   if (kms_sw_dt->ro_mapped)
>> +  munmap(kms_sw_dt->ro_mapped, kms_sw_dt->size);
>> +   if (kms_sw_dt->mapped)
>> +  munmap(kms_sw_dt->mapped, kms_sw_dt->size);
>> +
> I'm not 100% sure about this. There's a reason why dt_unmap exists.
>
> Skimming through the existing code [1] - there's a handful of cases
> that indicate the leaks you're hitting.
> I'd look into addressing those properly because as-is this looks alike
> a duck-taping the problem.
>
> With the hunk gone the patch is
> Reviewed-by: Emil Velikov 
>
> -Emil
>
> [1] $ git grep -20 -w displaytarget_[a-z]*map
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Re: [Mesa-dev] [PATCH 07/16] radv: Implement VK_KHR_maintenance3.

[Samuel Pitoiset]

On 03/07/2018 07:32 PM, Bas Nieuwenhuizen wrote:

On Wed, Mar 7, 2018 at 7:19 PM, Samuel Pitoiset
 wrote:



On 03/07/2018 03:47 PM, Bas Nieuwenhuizen wrote:


Reviewed-by: Dave Airlie 
---
   src/amd/vulkan/radv_descriptor_set.c | 82
++--
   src/amd/vulkan/radv_device.c | 10 +
   src/amd/vulkan/radv_extensions.py|  1 +
   3 files changed, 89 insertions(+), 4 deletions(-)

diff --git a/src/amd/vulkan/radv_descriptor_set.c
b/src/amd/vulkan/radv_descriptor_set.c
index 38b8dc78e1..265028df2b 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -31,6 +31,20 @@
   #include "radv_private.h"
   #include "sid.h"
   +
+static bool has_equal_immutable_samplers(const VkSampler *samplers,
uint32_t count)
+{
+   if (!samplers)
+   return false;
+   for(uint32_t i = 1; i < count; ++i) {
+   if (memcmp(radv_sampler_from_handle(samplers[0])->state,
+  radv_sampler_from_handle(samplers[i])->state,
16)) {
+   return false;
+   }
+   }
+   return true;
+}
+
   VkResult radv_CreateDescriptorSetLayout(
 VkDevice_device,
 const VkDescriptorSetLayoutCreateInfo*  pCreateInfo,
@@ -132,15 +146,13 @@ VkResult radv_CreateDescriptorSetLayout(
 if (binding->pImmutableSamplers) {
 set_layout->binding[b].immutable_samplers_offset =
samplers_offset;
-   set_layout->binding[b].immutable_samplers_equal =
true;
+   set_layout->binding[b].immutable_samplers_equal =
+
has_equal_immutable_samplers(binding->pImmutableSamplers,
binding->descriptorCount);
 set_layout->has_immutable_samplers = true;
 for (uint32_t i = 0; i < binding->descriptorCount;
i++)
 memcpy(samplers + 4 * i,
_sampler_from_handle(binding->pImmutableSamplers[i])->state, 16);
-   for (uint32_t i = 1; i < binding->descriptorCount;
i++)
-   if (memcmp(samplers + 4 * i, samplers, 16)
!= 0)
-
set_layout->binding[b].immutable_samplers_equal = false;
 /* Don't reserve space for the samplers if they're
not accessed. */
 if
(set_layout->binding[b].immutable_samplers_equal) {
@@ -182,6 +194,68 @@ void radv_DestroyDescriptorSetLayout(
 vk_free2(>alloc, pAllocator, set_layout);
   }
   +void radv_GetDescriptorSetLayoutSupport(VkDevice device,
+const
VkDescriptorSetLayoutCreateInfo* pCreateInfo,
+VkDescriptorSetLayoutSupport*
pSupport)
+{
+   bool supported = true;
+   uint64_t size = 0;
+   for (uint32_t i = 0; i < pCreateInfo->bindingCount; i++) {
+   const VkDescriptorSetLayoutBinding *binding =
>pBindings[i];
+
+   if (binding->descriptorCount == 0)
+   continue;
+
+   uint64_t descriptor_size = 0;
+   uint64_t descriptor_alignment = 1;
+   switch (binding->descriptorType) {
+   case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
+   case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
+   break;
+   case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
+   case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
+   case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
+   case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
+   descriptor_size = 16;
+   descriptor_alignment = 16;
+   break;
+   case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
+   case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
+   case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
+   descriptor_size = 64;
+   descriptor_alignment = 32;
+   break;
+   case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
+   if
(!has_equal_immutable_samplers(binding->pImmutableSamplers,
binding->descriptorCount)) {
+   descriptor_size = 64;
+   } else {
+   descriptor_size = 96;
+   }
+   descriptor_alignment = 32;



Missing break?


So much for the tests ...


Yes...

The rest looks good to me, nice work!



Fixed locally.





+   case VK_DESCRIPTOR_TYPE_SAMPLER:
+   if
(!has_equal_immutable_samplers(binding->pImmutableSamplers,
binding->descriptorCount)) {
+   descriptor_size = 16;
+   descriptor_alignment = 16;
+   }
+   break;
+   default:
+   

Re: [Mesa-dev] [PATCH 1/2] mesa: simplify MESA_GL_VERSION_OVERRIDE behavior of API override

[Marek Olšák]

On Wed, Mar 7, 2018 at 11:44 AM, Ian Romanick  wrote:
> On 03/06/2018 03:27 PM, Marek Olšák wrote:
>> From: Marek Olšák 
>>
>> ---
>>  docs/envvars.html   |  3 ++-
>>  src/mesa/main/version.c | 16 +---
>>  2 files changed, 7 insertions(+), 12 deletions(-)
>>
>> diff --git a/docs/envvars.html b/docs/envvars.html
>> index ea42a50..3ef3ab1 100644
>> --- a/docs/envvars.html
>> +++ b/docs/envvars.html
>> @@ -92,22 +92,23 @@ glGetString(GL_VERSION) and possibly the GL API type.
>>   FC is an optional suffix that indicates a forward compatible context.
>>  This is only valid for versions = 3.0.
>>   GL versions  3.0 are set to a compatibility (non-Core) profile
>>   GL versions = 3.0, see below
>>   GL versions  3.0 are set to a Core profile
>>   Examples: 2.1, 3.0, 3.0FC, 3.1, 3.1FC
>>  
>>   2.1 - select a compatibility (non-Core) profile with GL version 2.1
>>   3.0 - select a compatibility (non-Core) profile with GL version 3.0
>>   3.0FC - select a Core+Forward Compatible profile with GL version 3.0
>> - 3.1 - select a Core profile with GL version 3.1
>> + 3.1 - keep the same profile and set GL version 3.1
>>   3.1FC - select a Core+Forward Compatible profile with GL version 3.1
>> + 3.1COMPAT - select a compatibility (non-Core) profile with GL version 
>> 3.1
>
> I don't think we should mention profiles here.  Before OpenGL 3.2 there
> is no such thing as a profile.  It doesn't exist.  I think this is more
> accurate:
>
>  3.1 - Select OpenGL 3.1.  GL_ARB_compatibility will be enabled per the 
> driver default.
>  3.1FC - Select OpenGL 3.1 with forward compatibility enabled.  
> GL_ARB_compatibilty will not be enabled.
>  3.1COMPAT - Select OpenGL 3.1 with GL_ARB_compatibilty forced enabled.
>
>>  
>>   Mesa may not really implement all the features of the given version.
>>  (for developers only)
>>  
>>  MESA_GLES_VERSION_OVERRIDE - changes the value returned by
>>  glGetString(GL_VERSION) for OpenGL ES.
>>  
>>   The format should be MAJOR.MINOR
>>   Examples: 2.0, 3.0, 3.1
>>   Mesa may not really implement all the features of the given version.
>> diff --git a/src/mesa/main/version.c b/src/mesa/main/version.c
>> index a280690..9ad49db 100644
>> --- a/src/mesa/main/version.c
>> +++ b/src/mesa/main/version.c
>> @@ -133,48 +133,42 @@ create_version_string(struct gl_context *ctx, const 
>> char *prefix)
>> }
>>  }
>>
>>  /**
>>   * Override the context's version and/or API type if the
>>   * environment variable MESA_GL_VERSION_OVERRIDE is set.
>>   *
>>   * Example uses of MESA_GL_VERSION_OVERRIDE:
>>   *
>>   * 2.1: select a compatibility (non-Core) profile with GL version 2.1
>> - * 3.0: select a compatibility (non-Core) profile with GL version 3.0
>> - * 3.0FC: select a Core+Forward Compatible profile with GL version 3.0
>> - * 3.1: select a Core profile with GL version 3.1
>> - * 3.1FC: select a Core+Forward Compatible profile with GL version 3.1
>> + * X.Y: override GL version to X.Y without changing the profile
>> + * X.YFC: select a Core+Forward Compatible profile with GL version X.Y
>> + * X.YCOMPAT: select a Compatibility profile with GL version X.Y
>>   */
>>  bool
>>  _mesa_override_gl_version_contextless(struct gl_constants *consts,
>>gl_api *apiOut, GLuint *versionOut)
>>  {
>> int version;
>> bool fwd_context, compat_context;
>>
>> get_gl_override(*apiOut, , _context, _context);
>>
>> if (version > 0) {
>>*versionOut = version;
>>
>> -  /* If the API is a desktop API, adjust the context flags.  We may also
>> -   * need to modify the API depending on the version.  For example, Mesa
>> -   * does not support a GL 3.3 compatibility profile.
>> -   */
>> +  /* Modify the API and context flags as needed. */
>>if (*apiOut == API_OPENGL_CORE || *apiOut == API_OPENGL_COMPAT) {
>>   if (version >= 30 && fwd_context) {
>>  *apiOut = API_OPENGL_CORE;
>>  consts->ContextFlags |= GL_CONTEXT_FLAG_FORWARD_COMPATIBLE_BIT;
>> - } else if (version >= 31 && !compat_context) {
>> -*apiOut = API_OPENGL_CORE;
>> - } else {
>> + } else if (compat_context) {
>
> I seem to have missed what it is we're trying to fix.  Without this
> patch, if I run 'MESA_GL_VERSION_OVERRIDE=3.1 glxinfo | grep version' I
> get more or less the behavior that I expect:
>
> Max core profile version: 3.1
> Max compat profile version: 3.0
> OpenGL version string: 3.1 (Core Profile) Mesa 18.1.0-devel (git-877efedf4a)
> OpenGL shading language version string: 4.50
>
> I am wondering where the non-core profile version information is. :(
>
> With this patch, I get
>
> Max core profile version: 4.5
> Max compat profile version: 3.1
> OpenGL core profile version string: 3.1 (Core Profile) Mesa 18.1.0-devel 
> (git-cd435e0882)
> OpenGL core profile shading language version string: 4.50
> OpenGL version string: 

Re: [Mesa-dev] [PATCH 3/3] ac: make use of if/loop build helpers

[Marek Olšák]

For the series:

Reviewed-by: Marek Olšák 

Marek

On Tue, Mar 6, 2018 at 8:40 PM, Timothy Arceri  wrote:
> These helpers insert the basic block in the same order as they
> appear in NIR making it easier to follow LLVM IR dumps. The helpers
> also insert more useful labels onto the blocks.
>
> TGSI use the line number of the corresponding opcode in the TGSI
> dump as the label id, here we use the corresponding block index
> from NIR.
> ---
>  src/amd/common/ac_nir_to_llvm.c | 60 
> +
>  1 file changed, 18 insertions(+), 42 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index cda91fe8bf..dc463ed253 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -5237,17 +5237,15 @@ static void visit_ssa_undef(struct ac_nir_context 
> *ctx,
> _mesa_hash_table_insert(ctx->defs, >def, undef);
>  }
>
> -static void visit_jump(struct ac_nir_context *ctx,
> +static void visit_jump(struct ac_llvm_context *ctx,
>const nir_jump_instr *instr)
>  {
> switch (instr->type) {
> case nir_jump_break:
> -   LLVMBuildBr(ctx->ac.builder, ctx->break_block);
> -   LLVMClearInsertionPosition(ctx->ac.builder);
> +   ac_build_break(ctx);
> break;
> case nir_jump_continue:
> -   LLVMBuildBr(ctx->ac.builder, ctx->continue_block);
> -   LLVMClearInsertionPosition(ctx->ac.builder);
> +   ac_build_continue(ctx);
> break;
> default:
> fprintf(stderr, "Unknown NIR jump instr: ");
> @@ -5285,7 +5283,7 @@ static void visit_block(struct ac_nir_context *ctx, 
> nir_block *block)
> visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
> break;
> case nir_instr_type_jump:
> -   visit_jump(ctx, nir_instr_as_jump(instr));
> +   visit_jump(>ac, nir_instr_as_jump(instr));
> break;
> default:
> fprintf(stderr, "Unknown NIR instr type: ");
> @@ -5302,56 +5300,34 @@ static void visit_if(struct ac_nir_context *ctx, 
> nir_if *if_stmt)
>  {
> LLVMValueRef value = get_src(ctx, if_stmt->condition);
>
> -   LLVMValueRef fn = 
> LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx->ac.builder));
> -   LLVMBasicBlockRef merge_block =
> -   LLVMAppendBasicBlockInContext(ctx->ac.context, fn, "");
> -   LLVMBasicBlockRef if_block =
> -   LLVMAppendBasicBlockInContext(ctx->ac.context, fn, "");
> -   LLVMBasicBlockRef else_block = merge_block;
> -   if (!exec_list_is_empty(_stmt->else_list))
> -   else_block = LLVMAppendBasicBlockInContext(
> -   ctx->ac.context, fn, "");
> -
> -   LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, value,
> - ctx->ac.i32_0, "");
> -   LLVMBuildCondBr(ctx->ac.builder, cond, if_block, else_block);
> -
> -   LLVMPositionBuilderAtEnd(ctx->ac.builder, if_block);
> +   nir_block *then_block =
> +   (nir_block *) exec_list_get_head(_stmt->then_list);
> +
> +   ac_build_uif(>ac, value, then_block->index);
> +
> visit_cf_list(ctx, _stmt->then_list);
> -   if (LLVMGetInsertBlock(ctx->ac.builder))
> -   LLVMBuildBr(ctx->ac.builder, merge_block);
>
> if (!exec_list_is_empty(_stmt->else_list)) {
> -   LLVMPositionBuilderAtEnd(ctx->ac.builder, else_block);
> +   nir_block *else_block =
> +   (nir_block *) exec_list_get_head(_stmt->else_list);
> +
> +   ac_build_else(>ac, else_block->index);
> visit_cf_list(ctx, _stmt->else_list);
> -   if (LLVMGetInsertBlock(ctx->ac.builder))
> -   LLVMBuildBr(ctx->ac.builder, merge_block);
> }
>
> -   LLVMPositionBuilderAtEnd(ctx->ac.builder, merge_block);
> +   ac_build_endif(>ac, then_block->index);
>  }
>
>  static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
>  {
> -   LLVMValueRef fn = 
> LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx->ac.builder));
> -   LLVMBasicBlockRef continue_parent = ctx->continue_block;
> -   LLVMBasicBlockRef break_parent = ctx->break_block;
> +   nir_block *first_loop_block =
> +   (nir_block *) exec_list_get_head(>body);
>
> -   ctx->continue_block =
> -   LLVMAppendBasicBlockInContext(ctx->ac.context, fn, "");
> -   ctx->break_block =
> -   LLVMAppendBasicBlockInContext(ctx->ac.context, fn, "");
> +   ac_build_bgnloop(>ac, first_loop_block->index);
>
> -   LLVMBuildBr(ctx->ac.builder, ctx->continue_block);
> -   LLVMPositionBuilderAtEnd(ctx->ac.builder, ctx->continue_block);
> 

Re: [Mesa-dev] [PATCH 07/16] radv: Implement VK_KHR_maintenance3.

[Samuel Pitoiset]

On 03/07/2018 03:47 PM, Bas Nieuwenhuizen wrote:

Reviewed-by: Dave Airlie 
---
  src/amd/vulkan/radv_descriptor_set.c | 82 ++--
  src/amd/vulkan/radv_device.c | 10 +
  src/amd/vulkan/radv_extensions.py|  1 +
  3 files changed, 89 insertions(+), 4 deletions(-)

diff --git a/src/amd/vulkan/radv_descriptor_set.c 
b/src/amd/vulkan/radv_descriptor_set.c
index 38b8dc78e1..265028df2b 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -31,6 +31,20 @@
  #include "radv_private.h"
  #include "sid.h"
  
+

+static bool has_equal_immutable_samplers(const VkSampler *samplers, uint32_t 
count)
+{
+   if (!samplers)
+   return false;
+   for(uint32_t i = 1; i < count; ++i) {
+   if (memcmp(radv_sampler_from_handle(samplers[0])->state,
+  radv_sampler_from_handle(samplers[i])->state, 16)) {
+   return false;
+   }
+   }
+   return true;
+}
+
  VkResult radv_CreateDescriptorSetLayout(
VkDevice_device,
const VkDescriptorSetLayoutCreateInfo*  pCreateInfo,
@@ -132,15 +146,13 @@ VkResult radv_CreateDescriptorSetLayout(
  
  		if (binding->pImmutableSamplers) {

set_layout->binding[b].immutable_samplers_offset = 
samplers_offset;
-   set_layout->binding[b].immutable_samplers_equal = true;
+   set_layout->binding[b].immutable_samplers_equal =
+   
has_equal_immutable_samplers(binding->pImmutableSamplers, 
binding->descriptorCount);
set_layout->has_immutable_samplers = true;
  
  
  			for (uint32_t i = 0; i < binding->descriptorCount; i++)

memcpy(samplers + 4 * i, 
_sampler_from_handle(binding->pImmutableSamplers[i])->state, 16);
-   for (uint32_t i = 1; i < binding->descriptorCount; i++)
-   if (memcmp(samplers + 4 * i, samplers, 16) != 0)
-   
set_layout->binding[b].immutable_samplers_equal = false;
  
  			/* Don't reserve space for the samplers if they're not accessed. */

if (set_layout->binding[b].immutable_samplers_equal) {
@@ -182,6 +194,68 @@ void radv_DestroyDescriptorSetLayout(
vk_free2(>alloc, pAllocator, set_layout);
  }
  
+void radv_GetDescriptorSetLayoutSupport(VkDevice device,

+const VkDescriptorSetLayoutCreateInfo* 
pCreateInfo,
+VkDescriptorSetLayoutSupport* pSupport)
+{
+   bool supported = true;
+   uint64_t size = 0;
+   for (uint32_t i = 0; i < pCreateInfo->bindingCount; i++) {
+   const VkDescriptorSetLayoutBinding *binding = 
>pBindings[i];
+
+   if (binding->descriptorCount == 0)
+   continue;
+
+   uint64_t descriptor_size = 0;
+   uint64_t descriptor_alignment = 1;
+   switch (binding->descriptorType) {
+   case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
+   case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
+   break;
+   case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
+   case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
+   case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
+   case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
+   descriptor_size = 16;
+   descriptor_alignment = 16;
+   break;
+   case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
+   case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
+   case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
+   descriptor_size = 64;
+   descriptor_alignment = 32;
+   break;
+   case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
+   if 
(!has_equal_immutable_samplers(binding->pImmutableSamplers, 
binding->descriptorCount)) {
+   descriptor_size = 64;
+   } else {
+   descriptor_size = 96;
+   }
+   descriptor_alignment = 32;


Missing break?


+   case VK_DESCRIPTOR_TYPE_SAMPLER:
+   if 
(!has_equal_immutable_samplers(binding->pImmutableSamplers, 
binding->descriptorCount)) {
+   descriptor_size = 16;
+   descriptor_alignment = 16;
+   }
+   break;
+   default:
+   unreachable("unknown descriptor type\n");
+   break;
+   }
+
+   if (size && !align_u64(size, descriptor_alignment)) {
+   supported = false;
+  

Re: [Mesa-dev] [PATCH 01/21] vulkan: Add KHR_display extension using DRM

[Keith Packard]

Jason Ekstrand  writes:

Thanks a million for the intense review. I've pushed 15 tiny patches
that address individual questions in this message. If you want to look
at those separately, that would be great. When we're done, I'll merge
them back into the giant patch.

Sorry for the delay in answering; you asked a hard question about GEM
handles and reference counting which I think I've resolved by
eliminating the ability to share the same fd for modesetting and
rendering.

Let me know if I've deleted too much context from your answers.

> With the exception of NIR (which is a bit odd), we usually use ALL_CAPS for
> enum values.

Thanks, fixed.

> Yes, this does seem like the only reasonable mode for now.  I suppose you
> could check to see if the platform supports ASYNC_FLIP and advertise
> IMMEDIATE in that case.  I know intel doesn't advertise it but I thought
> amdgpu does.

Ok, we'll put that on the wish list, along with MAILBOX (which
applications actually want :-)

> vk_outarray, though I suppose you've probably already made that
> change.

Yup, vk_outarray everywhere now.

> I don't see use_prime_blit being set anywhere.  Perhaps that comes in a
> later patch?  The line is obviously correct, so I'm fine with leaving
> it.

You're right -- this was a cult-n-paste error. I don't support prime at
all, so I've removed this bit.

> This will have to be updated for modifiers.  I'm reasonably happy for it to
> be the no-op update for now though KHR_display supporting real modifiers
> would be nice. :-)

Yeah, "patches welcome", of course. I don't have a requirement for them
on Radeon at this point.

>> +   if (result != VK_SUCCESS)
>> +  return result;
>> +
>> +   ret = drmPrimeFDToHandle(wsi->master_fd, image->base.fd,
>> _handle);
>>
>
> This opens up some interesting questions.  GEM handles are not reference
> counted by the kernel.  If the driver that we're running on is using
> master_fd, then we shouldn't close our handle because that would close the
> handle for the driver as well.  If it's not using master_fd, we should
> close the handle to avoid leaking it.  The later is only a worry in the
> prime case but given that I saw a line above about use_prime_blit, you have
> me scared. :-)

Ok, as I mentioned in the header of this message, I've eliminated any
code which talks about potentially sharing master_fd and render_fd. I
removed render_fd from the wsi layer entirely as it is no longer used
anywhere.

In the drivers, when you request KHR_display, I attempt to open the
related primary node and if that succeeds, I pass that to the wsi layer
for use there. That fd is otherwise unused by the driver, and in fact
the driver doesn't need to close it as the wsi layer will.

Obviously having two FDs is "wasteful" at some level as we really don't
need that, but that's what the acquire_xlib extension will have to do
anyways.

> One solution to this connundrum would be to simply never use the master FD
> for the Vulkan driver itself and always open a render node.  If handed a
> master FD, you could check if it matches your render node and set
> use_prime_blit accordingly.  Then the driver and WSI would have separate
> handle domains and this problem would be solved.  You could also just open
> the master FD twice, once for WSI and once for the driver.

Yup, two FDs, one master, one render. That way, the kludge
seen in this patch where it opens the master when you request the
KHR_display extension works the same as the acquire_xlib code in the
later patch.

> You have the format in create_info.  We could add some generic VkFormat
> introspection or we can just handle the 2-4 cases we care about
> directly.

Given that this layer provides the list of valid surface formats which
that image could contain, I've added depth/bpp information to that list
and the image_init code walks over the list of possible formats to find
the associated depth/bpp values.

If the application provides an invalid format, I'm returning
VK_ERROR_DEVICE_LOST as that is a valid error return and I couldn't find
anything else that seemed like a better value. If we get here, the
application made a mistake anyways.

> What happens if we close the handle immediately after calling
> drmModeAddFB?  Does the FB become invalid?  If so, then we probably want to
> stash the handle so we can clean it up when we destroy the swapchain.
> Unless, of course, we're willing to make the assumption (as stated above)
> that the driver and WSI are always using the same FD.

It looks like the FB ends up with a reference to the object, so it would
should be safe to just close the handle at this point.  However, to make
it less dependent on the kernel behavior, I've changed the code to store
the buffer_object handle in the image and then added code to free both
the buffer object and the frame buffer in wsi_display_image_finish.

Thanks for finding the leak.

>> +/* call with wait_mutex held */
>>
>
> It might be worth a line in the 

Re: [Mesa-dev] [PATCH 01/21] vulkan: Add KHR_display extension using DRM

[Keith Packard]

Daniel Stone  writes:

> Or better, just use drmModeAddFB2 and pass the format directly. That
> landed back in 3.2 or so, and I don't think there's anyone trying to
> use Vulkan on a kernel from 2011.

Yeah, that's probably a better plan. I've pushed a patch that does this
on top of the long list of patches made in response to Jason's email.

Once he's replied to that, I'll go ahead and smash the new patches back
on top of the original series and re-publish that.

-- 
-keith


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Re: [Mesa-dev] [PATCH] ac/nir: don't put lod into args if it's zero.

[Marek Olšák]

Reviewed-by: Marek Olšák 

Marek

On Tue, Mar 6, 2018 at 10:26 PM, Dave Airlie  wrote:
> From: Dave Airlie 
>
> If it's zero but put it in args we still end up consuming a
> register for it.
>
> This fixes some spilling in the NIR paths in Dirt Rally that
> isn't seen with TGSI.
>
> Signed-off-by: Dave Airlie 
> ---
>  src/amd/common/ac_nir_to_llvm.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index f808dc89490..432b88a59b0 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -5094,8 +5094,7 @@ static void visit_tex(struct ac_nir_context *ctx, 
> nir_tex_instr *instr)
> }
>
> /* Pack LOD */
> -   if (lod && ((instr->op == nir_texop_txl && !lod_is_zero) ||
> -   instr->op == nir_texop_txf)) {
> +   if (lod && ((instr->op == nir_texop_txl || instr->op == 
> nir_texop_txf) && !lod_is_zero)) {
> address[count++] = lod;
> } else if (instr->op == nir_texop_txf_ms && sample_index) {
> address[count++] = sample_index;
> --
> 2.14.3
>
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Re: [Mesa-dev] [PATCH 3/5] winsys/amdgpu: pad compute rings

[Alex Deucher]

On Wed, Mar 7, 2018 at 3:34 PM, Marek Olšák  wrote:
> From: Marek Olšák 
>
> ---
>  src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c 
> b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
> index d9a95c0..9cd3343 100644
> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
> @@ -1531,20 +1531,24 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs 
> *rcs,
>/* pad GFX ring to 8 DWs to meet CP fetch alignment requirements */
>if (ws->info.gfx_ib_pad_with_type2) {
>   while (rcs->current.cdw & 7)
>  radeon_emit(rcs, 0x8000); /* type2 nop packet */
>} else {
>   while (rcs->current.cdw & 7)
>  radeon_emit(rcs, 0x1000); /* type3 nop packet */
>}
>ws->gfx_ib_size_counter += (rcs->prev_dw + rcs->current.cdw) * 4;
>break;
> +   case RING_COMPUTE:
> +  while (rcs->current.cdw & 7)
> + radeon_emit(rcs, 0x1000); /* type3 nop packet */
> +  break;

This only works on CIK I think.  SI might still require type2 packets.

Alex

> case RING_UVD:
> case RING_UVD_ENC:
>while (rcs->current.cdw & 15)
>   radeon_emit(rcs, 0x8000); /* type2 nop packet */
>break;
> case RING_VCN_DEC:
>while (rcs->current.cdw & 15)
>   radeon_emit(rcs, 0x81ff); /* nop packet */
>break;
> default:
> --
> 2.7.4
>
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Re: [Mesa-dev] [PATCH v4 0/6] NVIDIA Tegra support

[Dylan Baker]

For the meson bits:
Reviewed-by: Dylan Baker 

Quoting Thierry Reding (2018-03-07 07:53:20)
> From: Thierry Reding 
> 
> This series of patches implements initial support for Tegra. The first
> two patches import DRM UAPI from v4.16-rc1 that provides framebuffer
> modifiers that can be used to specify buffers shared between Nouveau
> and the Tegra DRM driver.
> 
> Patches 3 and 4 add support for framebuffer modifiers to Nouveau and
> patch 5 build on top of those to provide initial Tegra support in Mesa.
> The current patches allow running common use-cases such as Wayland,
> kmscube, etc.
> 
> Patch 6 adds the Tegra driver to the list of gallium drivers built
> during a `make distcheck'.
> 
> Some people have been using earlier versions of these patches to run a
> completely open-source graphics stack on various Tegra210 devices. I've
> Cc'ed some of them so that they can provide feedback.
> 
> This series is also available in a git repository here:
> 
> https://cgit.freedesktop.org/~tagr/mesa #tegra-v4
> 
> Thierry
> 
> Thierry Reding (6):
>   drm/fourcc: Fix fourcc_mod_code() definition
>   drm/tegra: Sanitize format modifiers
>   nouveau/nvc0: Extract common tile mode macro
>   nouveau: Add framebuffer modifier support
>   tegra: Initial support
>   autotools: Add tegra to AM_DISTCHECK_CONFIGURE_FLAGS
> 
>  Makefile.am|2 +-
>  configure.ac   |   12 +-
>  include/drm-uapi/drm_fourcc.h  |   38 +-
>  include/drm-uapi/tegra_drm.h   |  225 
>  meson.build|7 +-
>  src/gallium/Makefile.am|5 +
>  .../auxiliary/pipe-loader/pipe_loader_drm.c|7 +-
>  src/gallium/auxiliary/target-helpers/drm_helper.h  |   23 +
>  .../auxiliary/target-helpers/drm_helper_public.h   |3 +
>  src/gallium/drivers/nouveau/Android.mk |3 +
>  src/gallium/drivers/nouveau/Makefile.am|1 +
>  src/gallium/drivers/nouveau/meson.build|4 +-
>  src/gallium/drivers/nouveau/nouveau_screen.c   |4 +
>  src/gallium/drivers/nouveau/nv30/nv30_resource.c   |2 +
>  src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c|   81 +-
>  src/gallium/drivers/nouveau/nvc0/nvc0_resource.c   |   59 +-
>  src/gallium/drivers/nouveau/nvc0/nvc0_resource.h   |   18 +-
>  src/gallium/drivers/tegra/Automake.inc |   11 +
>  src/gallium/drivers/tegra/Makefile.am  |   14 +
>  src/gallium/drivers/tegra/Makefile.sources |6 +
>  src/gallium/drivers/tegra/meson.build  |   41 +
>  src/gallium/drivers/tegra/tegra_context.c  | 1384 
> 
>  src/gallium/drivers/tegra/tegra_context.h  |   81 ++
>  src/gallium/drivers/tegra/tegra_resource.h |   76 ++
>  src/gallium/drivers/tegra/tegra_screen.c   |  688 ++
>  src/gallium/drivers/tegra/tegra_screen.h   |   45 +
>  src/gallium/meson.build|6 +
>  src/gallium/targets/dri/Makefile.am|2 +
>  src/gallium/targets/dri/meson.build|4 +-
>  src/gallium/targets/dri/target.c   |4 +
>  src/gallium/targets/vdpau/Makefile.am  |2 +
>  src/gallium/winsys/tegra/drm/Makefile.am   |   13 +
>  src/gallium/winsys/tegra/drm/Makefile.sources  |2 +
>  src/gallium/winsys/tegra/drm/meson.build   |   33 +
>  src/gallium/winsys/tegra/drm/tegra_drm_public.h|   31 +
>  src/gallium/winsys/tegra/drm/tegra_drm_winsys.c|   49 +
>  36 files changed, 2952 insertions(+), 34 deletions(-)
>  create mode 100644 include/drm-uapi/tegra_drm.h
>  create mode 100644 src/gallium/drivers/tegra/Automake.inc
>  create mode 100644 src/gallium/drivers/tegra/Makefile.am
>  create mode 100644 src/gallium/drivers/tegra/Makefile.sources
>  create mode 100644 src/gallium/drivers/tegra/meson.build
>  create mode 100644 src/gallium/drivers/tegra/tegra_context.c
>  create mode 100644 src/gallium/drivers/tegra/tegra_context.h
>  create mode 100644 src/gallium/drivers/tegra/tegra_resource.h
>  create mode 100644 src/gallium/drivers/tegra/tegra_screen.c
>  create mode 100644 src/gallium/drivers/tegra/tegra_screen.h
>  create mode 100644 src/gallium/winsys/tegra/drm/Makefile.am
>  create mode 100644 src/gallium/winsys/tegra/drm/Makefile.sources
>  create mode 100644 src/gallium/winsys/tegra/drm/meson.build
>  create mode 100644 src/gallium/winsys/tegra/drm/tegra_drm_public.h
>  create mode 100644 src/gallium/winsys/tegra/drm/tegra_drm_winsys.c
> 
> -- 
> 2.16.2
> 


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[Mesa-dev] [Bug 55951] [regression] Torchlight exits with BadDrawable (invalid Pixmap or Window parameter)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=55951

Sven Arvidsson  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #4 from Sven Arvidsson  ---
The testcase bug was closed: #70621 and the game seems fine too using Mesa 17
on radeonsi.

Launched five times in a row without crashes or errors.

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[Mesa-dev] [PATCH 2/5] radeonsi: expand constbuf 0 address correctly to fix Vega10 hangs

[Marek Olšák]

From: Marek Olšák 

This is only required with the latest libdrm.

This fixes 32-bit support with high addresses.
(and possibly 64-bit support too because the high bits need to be masked out)
---
 src/gallium/drivers/radeonsi/si_shader.c | 21 +
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 343a5d5..e2da765 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2420,26 +2420,39 @@ static LLVMValueRef fetch_constant(
addr = LLVMBuildLShr(ctx->ac.builder, addr, 
LLVMConstInt(ctx->i32, 2, 0), "");
LLVMValueRef result = ac_build_load_invariant(>ac, 
ptr, addr);
return bitcast(bld_base, type, result);
}
 
/* Do the bounds checking with a descriptor, because
 * doing computation and manual bounds checking of 64-bit
 * addresses generates horrible VALU code with very high
 * VGPR usage and very low SIMD occupancy.
 */
-   ptr = LLVMBuildPtrToInt(ctx->ac.builder, ptr, ctx->i64, "");
-   ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->v2i32, "");
+   ptr = LLVMBuildPtrToInt(ctx->ac.builder, ptr, ctx->ac.intptr, 
"");
+
+   LLVMValueRef desc0, desc1;
+   if (HAVE_32BIT_POINTERS) {
+   desc0 = ptr;
+   desc1 = LLVMConstInt(ctx->i32,
+
S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi), 0);
+   } else {
+   ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, 
ctx->v2i32, "");
+   desc0 = LLVMBuildExtractElement(ctx->ac.builder, ptr, 
ctx->i32_0, "");
+   desc1 = LLVMBuildExtractElement(ctx->ac.builder, ptr, 
ctx->i32_1, "");
+   /* Mask out all bits except BASE_ADDRESS_HI. */
+   desc1 = LLVMBuildAnd(ctx->ac.builder, desc1,
+LLVMConstInt(ctx->i32, 
~C_008F04_BASE_ADDRESS_HI, 0), "");
+   }
 
LLVMValueRef desc_elems[] = {
-   LLVMBuildExtractElement(ctx->ac.builder, ptr, 
ctx->i32_0, ""),
-   LLVMBuildExtractElement(ctx->ac.builder, ptr, 
ctx->i32_1, ""),
+   desc0,
+   desc1,
LLVMConstInt(ctx->i32, (sel->info.const_file_max[0] + 
1) * 16, 0),
LLVMConstInt(ctx->i32,
S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |

S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |

S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32), 0)
};
LLVMValueRef desc = ac_build_gather_values(>ac, 
desc_elems, 4);
-- 
2.7.4

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[Mesa-dev] [PATCH 4/5] winsys/amdgpu: query GDS info

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_gpu_info.c | 11 +++
 src/amd/common/ac_gpu_info.h |  2 ++
 2 files changed, 13 insertions(+)

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 7c13e5f..29e2aa8 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -94,20 +94,21 @@ static bool has_syncobj(int fd)
 
 bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
   struct radeon_info *info,
   struct amdgpu_gpu_info *amdinfo)
 {
struct amdgpu_buffer_size_alignments alignment_info = {};
struct amdgpu_heap_info vram, vram_vis, gtt;
struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {};
struct drm_amdgpu_info_hw_ip uvd_enc = {}, vce = {}, vcn_dec = {};
struct drm_amdgpu_info_hw_ip vcn_enc = {}, gfx = {};
+   struct amdgpu_gds_resource_info gds = {};
uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature 
= 0;
int r, i, j;
drmDevicePtr devinfo;
 
/* Get PCI info. */
r = drmGetDevice2(fd, 0, );
if (r) {
fprintf(stderr, "amdgpu: drmGetDevice2 failed.\n");
return false;
}
@@ -241,20 +242,26 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
fprintf(stderr, "amdgpu: amdgpu_query_firmware_version(vce) 
failed.\n");
return false;
}
 
r = amdgpu_query_sw_info(dev, amdgpu_sw_info_address32_hi, 
>address32_hi);
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_sw_info(address32_hi) 
failed.\n");
return false;
}
 
+   r = amdgpu_query_gds_info(dev, );
+   if (r) {
+   fprintf(stderr, "amdgpu: amdgpu_query_gds_info failed.\n");
+   return false;
+   }
+
/* Set chip identification. */
info->pci_id = amdinfo->asic_id; /* TODO: is this correct? */
info->vce_harvest_config = amdinfo->vce_harvest_config;
 
switch (info->pci_id) {
 #define CHIPSET(pci_id, cfamily) case pci_id: info->family = CHIP_##cfamily; 
break;
 #include "pci_ids/radeonsi_pci_ids.h"
 #undef CHIPSET
 
default:
@@ -276,20 +283,22 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
}
 
/* Set which chips have dedicated VRAM. */
info->has_dedicated_vram =
!(amdinfo->ids_flags & AMDGPU_IDS_FLAGS_FUSION);
 
/* Set hardware information. */
info->gart_size = gtt.heap_size;
info->vram_size = vram.heap_size;
info->vram_vis_size = vram_vis.heap_size;
+   info->gds_size = gds.gds_total_size;
+   info->gds_gfx_partition_size = gds.gds_gfx_partition_size;
/* The kernel can split large buffers in VRAM but not in GTT, so large
 * allocations can fail or cause buffer movement failures in the kernel.
 */
info->max_alloc_size = MIN2(info->vram_size * 0.9, info->gart_size * 
0.7);
/* convert the shader clock from KHz to MHz */
info->max_shader_clock = amdinfo->max_engine_clk / 1000;
info->max_se = amdinfo->num_shader_engines;
info->max_sh_per_se = amdinfo->num_shader_arrays_per_engine;
info->has_hw_decode =
(uvd.available_rings != 0) || (vcn_dec.available_rings != 0);
@@ -396,20 +405,22 @@ void ac_print_gpu_info(struct radeon_info *info)
   info->pci_domain, info->pci_bus,
   info->pci_dev, info->pci_func);
printf("pci_id = 0x%x\n", info->pci_id);
printf("family = %i\n", info->family);
printf("chip_class = %i\n", info->chip_class);
printf("pte_fragment_size = %u\n", info->pte_fragment_size);
printf("gart_page_size = %u\n", info->gart_page_size);
printf("gart_size = %i MB\n", (int)DIV_ROUND_UP(info->gart_size, 
1024*1024));
printf("vram_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_size, 
1024*1024));
printf("vram_vis_size = %i MB\n", 
(int)DIV_ROUND_UP(info->vram_vis_size, 1024*1024));
+   printf("gds_size = %u kB\n", info->gds_size / 1024);
+   printf("gds_gfx_partition_size = %u kB\n", info->gds_gfx_partition_size 
/ 1024);
printf("max_alloc_size = %i MB\n",
   (int)DIV_ROUND_UP(info->max_alloc_size, 1024*1024));
printf("min_alloc_size = %u\n", info->min_alloc_size);
printf("address32_hi = %u\n", info->address32_hi);
printf("has_dedicated_vram = %u\n", info->has_dedicated_vram);
printf("has_virtual_memory = %i\n", info->has_virtual_memory);
printf("gfx_ib_pad_with_type2 = %i\n", info->gfx_ib_pad_with_type2);
printf("has_hw_decode = %u\n", info->has_hw_decode);
printf("num_sdma_rings = %i\n", info->num_sdma_rings);
printf("num_compute_rings = %u\n", info->num_compute_rings);
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 0beba96..34d91be 

[Mesa-dev] [PATCH 5/5] radeonsi: remove chip_class parameter from si_lower_nir

[Marek Olšák]

From: Marek Olšák 

We can get it from si_screen.
---
 src/gallium/drivers/radeonsi/si_compute.c   | 3 +--
 src/gallium/drivers/radeonsi/si_shader.h| 4 +---
 src/gallium/drivers/radeonsi/si_shader_nir.c| 6 +++---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 3 +--
 4 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c 
b/src/gallium/drivers/radeonsi/si_compute.c
index 92d4514..46873cc 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -100,21 +100,21 @@ static void si_create_compute_state_async(void *job, int 
thread_index)
sel.screen = program->screen;
 
if (program->ir_type == PIPE_SHADER_IR_TGSI) {
tgsi_scan_shader(program->ir.tgsi, );
sel.tokens = program->ir.tgsi;
} else {
assert(program->ir_type == PIPE_SHADER_IR_NIR);
sel.nir = program->ir.nir;
 
si_nir_scan_shader(sel.nir, );
-   si_lower_nir(, program->compiler_ctx_state.chip_class);
+   si_lower_nir();
}
 
 
sel.type = PIPE_SHADER_COMPUTE;
sel.local_size = program->local_size;
si_get_active_slot_masks(,
 >active_const_and_shader_buffers,
 >active_samplers_and_images);
 
program->shader.selector = 
@@ -179,21 +179,20 @@ static void *si_create_compute_state(
program->ir.tgsi = tgsi_dup_tokens(cso->prog);
if (!program->ir.tgsi) {
FREE(program);
return NULL;
}
} else {
assert(cso->ir_type == PIPE_SHADER_IR_NIR);
program->ir.nir = (struct nir_shader *) cso->prog;
}
 
-   program->compiler_ctx_state.chip_class = sctx->b.chip_class;
program->compiler_ctx_state.debug = sctx->debug;
program->compiler_ctx_state.is_debug_context = sctx->is_debug;
p_atomic_inc(>num_shaders_created);
util_queue_fence_init(>ready);
 
struct util_async_debug_callback async_debug;
bool wait =
(sctx->debug.debug_message && !sctx->debug.async) ||
sctx->is_debug ||
si_can_dump_shader(sscreen, PIPE_SHADER_COMPUTE);
diff --git a/src/gallium/drivers/radeonsi/si_shader.h 
b/src/gallium/drivers/radeonsi/si_shader.h
index 23f9d20..f589789 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -300,22 +300,20 @@ enum {
SI_FIX_FETCH_RGB_8, /* A = 1.0 */
SI_FIX_FETCH_RGB_8_INT, /* A = 1 */
SI_FIX_FETCH_RGB_16,
SI_FIX_FETCH_RGB_16_INT,
 };
 
 struct si_shader;
 
 /* State of the context creating the shader object. */
 struct si_compiler_ctx_state {
-   enum chip_class chip_class;
-
/* Should only be used by si_init_shader_selector_async and
 * si_build_shader_variant if thread_index == -1 (non-threaded). */
LLVMTargetMachineReftm;
 
/* Used if thread_index == -1 or if debug.async is true. */
struct pipe_debug_callback  debug;
 
/* Used for creating the log string for gallium/ddebug. */
boolis_debug_context;
 };
@@ -667,21 +665,21 @@ void si_shader_binary_read_config(struct ac_shader_binary 
*binary,
  struct si_shader_config *conf,
  unsigned symbol_offset);
 const char *si_get_shader_name(const struct si_shader *shader, unsigned 
processor);
 
 /* si_shader_nir.c */
 void si_nir_scan_shader(const struct nir_shader *nir,
struct tgsi_shader_info *info);
 void si_nir_scan_tess_ctrl(const struct nir_shader *nir,
   const struct tgsi_shader_info *info,
   struct tgsi_tessctrl_info *out);
-void si_lower_nir(struct si_shader_selector *sel, enum chip_class chip_class);
+void si_lower_nir(struct si_shader_selector *sel);
 
 /* Inline helpers. */
 
 /* Return the pointer to the main shader part's pointer. */
 static inline struct si_shader **
 si_get_main_shader_part(struct si_shader_selector *sel,
struct si_shader_key *key)
 {
if (key->as_ls)
return >main_shader_part_ls;
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c 
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 54ab0af..e537735 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -14,22 +14,22 @@
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE 

Re: [Mesa-dev] [PATCH 3/5] meson: Re-add auto option for omx

[Dylan Baker]

Quoting Eric Engestrom (2018-03-07 10:08:33)
> On Tuesday, 2018-03-06 11:57:14 -0800, Dylan Baker wrote:
> > This re-adds the auto option for omx, without it we default to tizonia
> > and the build fails almost immediately, this is especially obnoxious
> > those building a driver that doesn't support the OMX state tracker to
> > begin with.
> > 
> > CC: Gurkirpal Singh 
> > Fixes: bb5e27fab6087a5c1528a5faf507acce700e883c
> >("st/omx/bellagio: Rename st and target directories")
> > Signed-off-by: Dylan Baker 
> > ---
> >  meson.build| 67 
> > --
> >  meson_options.txt  |  4 +-
> >  src/gallium/meson.build|  2 +-
> >  src/gallium/state_trackers/omx/meson.build | 18 
> >  4 files changed, 56 insertions(+), 35 deletions(-)
> > 
> > diff --git a/meson.build b/meson.build
> > index dd2fa603829..c85afdecee9 100644
> > --- a/meson.build
> > +++ b/meson.build
> > @@ -464,42 +464,63 @@ endif
> >  
> >  _omx = get_option('gallium-omx')
> >  if not system_has_kms_drm
> > -  if _omx != 'disabled'
> > -error('OMX state tracker can only be built on unix-like OSes.')
> > -  else
> > +  if ['auto', 'disabled'].contains(_omx)
> >  _omx = 'disabled'
> > +  else
> > +error('OMX state tracker can only be built on unix-like OSes.')
> >endif
> >  elif not (with_platform_x11 or with_platform_drm)
> > -  if _omx != 'disabled'
> > -error('OMX state tracker requires X11 or drm platform support.')
> > -  else
> > +  if ['auto', 'disabled'].contains(_omx)
> >  _omx = 'disabled'
> > +  else
> > +error('OMX state tracker requires X11 or drm platform support.')
> >endif
> >  elif not (with_gallium_r600 or with_gallium_radeonsi or 
> > with_gallium_nouveau)
> > -  if _omx != 'disabled'
> > -error('OMX state tracker requires at least one of the following 
> > gallium drivers: r600, radeonsi, nouveau.')
> > -  else
> > +  if ['auto', 'disabled'].contains(_omx)
> >  _omx = 'disabled'
> > +  else
> > +error('OMX state tracker requires at least one of the following 
> > gallium drivers: r600, radeonsi, nouveau.')
> >endif
> >  endif
> > -with_gallium_omx = _omx != 'disabled'
> > -gallium_omx = _omx
> > +with_gallium_omx = _omx
> >  dep_omx = []
> >  dep_omx_other = []
> > -if gallium_omx == 'bellagio'
> > +if with_gallium_omx == 'bellagio' or with_gallium_omx == 'auto'
> >pre_args += '-DENABLE_ST_OMX_BELLAGIO'
> 
> I didn't quite get what Julien was saying at first, but he's right: the
> above line should be moved ...
> 
> > -  dep_omx = dependency('libomxil-bellagio')
> > -elif gallium_omx == 'tizonia'
> > -  pre_args += '-DENABLE_ST_OMX_TIZONIA'
> > -  dep_omx = dependency('libtizonia', version : '>= 0.10.0')
> > -  dep_omx_other = [
> > -dependency('libtizplatform'),
> > -dependency('tizilheaders')
> > -  ]
> > +  dep_omx = dependency(
> > +'libomxil-bellagio', required : with_gallium_omx == 'bellagio'
> > +  )
> > +  if dep_omx.found()
> > +with_gallium_omx = 'bellagio'
> 
> ... here
> 
> > +  endif
> > +endif
> > +if with_gallium_omx == 'tizonia' or with_gallium_omx == 'auto'
> > +  if not (with_dri and with_egl)
> > +if with_gallium_omx == 'tizonia'
> > +  error('OMX-Tizonia state tracker requires dri and egl')
> > +else
> > +  with_gallium_omx == 'disabled'
> > +endif
> > +  else
> > +pre_args += '-DENABLE_ST_OMX_TIZONIA'
> 
> same with this one, it should be moved ...
> 
> > +dep_omx = dependency(
> > +  'libtizonia', version : '>= 0.10.0',
> > +  required : with_gallium_omx == 'tizonia',
> > +)
> > +dep_omx_other = [
> > +  dependency('libtizplatform', required : with_gallium_omx == 
> > 'tizonia'),
> > +  dependency('tizilheaders', required : with_gallium_omx == 'tizonia'),
> > +]
> > +if dep_omx.found() and dep_omx_other[0].found() and 
> > dep_omx_other[1].found()
> > +  with_gallium_omx = 'tizonia'
> 
> ... here

I realized that between the time you sent your mail and my client noticed it.
I've fixed that and I'll push with the pre_args in the right place.

> 
> With these two fixes, r-b stands :)
> 
> (Note, kind of a nit, but I'd prefer for _omx to be used until it's
> fully defined, ie. `with_gallium_omx` should never be 'auto' imho)
> 

Okay, lets fix that in a follow up, since this fixes the build.

Dylan


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Re: [Mesa-dev] [PATCH 3/5] meson: Re-add auto option for omx

[Eric Engestrom]

On Tuesday, 2018-03-06 11:57:14 -0800, Dylan Baker wrote:
> This re-adds the auto option for omx, without it we default to tizonia
> and the build fails almost immediately, this is especially obnoxious
> those building a driver that doesn't support the OMX state tracker to
> begin with.
> 
> CC: Gurkirpal Singh 
> Fixes: bb5e27fab6087a5c1528a5faf507acce700e883c
>("st/omx/bellagio: Rename st and target directories")
> Signed-off-by: Dylan Baker 
> ---
>  meson.build| 67 
> --
>  meson_options.txt  |  4 +-
>  src/gallium/meson.build|  2 +-
>  src/gallium/state_trackers/omx/meson.build | 18 
>  4 files changed, 56 insertions(+), 35 deletions(-)
> 
> diff --git a/meson.build b/meson.build
> index dd2fa603829..c85afdecee9 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -464,42 +464,63 @@ endif
>  
>  _omx = get_option('gallium-omx')
>  if not system_has_kms_drm
> -  if _omx != 'disabled'
> -error('OMX state tracker can only be built on unix-like OSes.')
> -  else
> +  if ['auto', 'disabled'].contains(_omx)
>  _omx = 'disabled'
> +  else
> +error('OMX state tracker can only be built on unix-like OSes.')
>endif
>  elif not (with_platform_x11 or with_platform_drm)
> -  if _omx != 'disabled'
> -error('OMX state tracker requires X11 or drm platform support.')
> -  else
> +  if ['auto', 'disabled'].contains(_omx)
>  _omx = 'disabled'
> +  else
> +error('OMX state tracker requires X11 or drm platform support.')
>endif
>  elif not (with_gallium_r600 or with_gallium_radeonsi or with_gallium_nouveau)
> -  if _omx != 'disabled'
> -error('OMX state tracker requires at least one of the following gallium 
> drivers: r600, radeonsi, nouveau.')
> -  else
> +  if ['auto', 'disabled'].contains(_omx)
>  _omx = 'disabled'
> +  else
> +error('OMX state tracker requires at least one of the following gallium 
> drivers: r600, radeonsi, nouveau.')
>endif
>  endif
> -with_gallium_omx = _omx != 'disabled'
> -gallium_omx = _omx
> +with_gallium_omx = _omx
>  dep_omx = []
>  dep_omx_other = []
> -if gallium_omx == 'bellagio'
> +if with_gallium_omx == 'bellagio' or with_gallium_omx == 'auto'
>pre_args += '-DENABLE_ST_OMX_BELLAGIO'

I didn't quite get what Julien was saying at first, but he's right: the
above line should be moved ...

> -  dep_omx = dependency('libomxil-bellagio')
> -elif gallium_omx == 'tizonia'
> -  pre_args += '-DENABLE_ST_OMX_TIZONIA'
> -  dep_omx = dependency('libtizonia', version : '>= 0.10.0')
> -  dep_omx_other = [
> -dependency('libtizplatform'),
> -dependency('tizilheaders')
> -  ]
> +  dep_omx = dependency(
> +'libomxil-bellagio', required : with_gallium_omx == 'bellagio'
> +  )
> +  if dep_omx.found()
> +with_gallium_omx = 'bellagio'

... here

> +  endif
> +endif
> +if with_gallium_omx == 'tizonia' or with_gallium_omx == 'auto'
> +  if not (with_dri and with_egl)
> +if with_gallium_omx == 'tizonia'
> +  error('OMX-Tizonia state tracker requires dri and egl')
> +else
> +  with_gallium_omx == 'disabled'
> +endif
> +  else
> +pre_args += '-DENABLE_ST_OMX_TIZONIA'

same with this one, it should be moved ...

> +dep_omx = dependency(
> +  'libtizonia', version : '>= 0.10.0',
> +  required : with_gallium_omx == 'tizonia',
> +)
> +dep_omx_other = [
> +  dependency('libtizplatform', required : with_gallium_omx == 'tizonia'),
> +  dependency('tizilheaders', required : with_gallium_omx == 'tizonia'),
> +]
> +if dep_omx.found() and dep_omx_other[0].found() and 
> dep_omx_other[1].found()
> +  with_gallium_omx = 'tizonia'

... here

With these two fixes, r-b stands :)

(Note, kind of a nit, but I'd prefer for _omx to be used until it's
fully defined, ie. `with_gallium_omx` should never be 'auto' imho)

> +else
> +  with_gallium_omx = 'disabled'
> +endif
> +  endif
>  endif
>  
>  omx_drivers_path = get_option('omx-libs-path')
> -if with_gallium_omx
> +if with_gallium_omx != 'disabled'
># Figure out where to put the omx driver.
># FIXME: this could all be vastly simplified by adding a 'defined_variable'
># argument to meson's get_pkgconfig_variable method.
> @@ -1193,8 +1214,8 @@ if with_platform_x11
>  dep_xxf86vm = dependency('xxf86vm', required : false)
>endif
>if (with_any_vk or with_glx == 'dri' or
> -   (with_gallium_vdpau or with_gallium_xvmc or with_gallium_omx or
> -with_gallium_xa))
> +   (with_gallium_vdpau or with_gallium_xvmc or with_gallium_va or
> +with_gallium_omx != 'disabled'))
>  dep_xcb = dependency('xcb')
>  dep_x11_xcb = dependency('x11-xcb')
>endif
> diff --git a/meson_options.txt b/meson_options.txt
> index 50ae19685e7..a573290b774 100644
> --- a/meson_options.txt
> +++ b/meson_options.txt
> @@ -90,8 +90,8 @@ option(
>  option(
>  

Re: [Mesa-dev] [PATCH] glx/apple: Ship meson build file in tarball

[Dylan Baker]

Quoting Thierry Reding (2018-03-07 07:55:37)
> From: Thierry Reding 
> 
> The meson build file for Apple GLX is not listed in the EXTRA_DIST make
> variable and therefore isn't shipped as part of the release tarball, so
> meson builds from the tarball will fail.
> 
> Add the file to EXTRA_DIST to ensure it is included in the tarball.
> 
> Signed-off-by: Thierry Reding 
> ---
>  src/glx/apple/Makefile.am | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/src/glx/apple/Makefile.am b/src/glx/apple/Makefile.am
> index bfa18b1c2f3d..8f9326863597 100644
> --- a/src/glx/apple/Makefile.am
> +++ b/src/glx/apple/Makefile.am
> @@ -1,4 +1,6 @@
> -EXTRA_DIST = RELEASE_NOTES
> +EXTRA_DIST = \
> +   RELEASE_NOTES \
> +   meson.build
>  
>  noinst_LTLIBRARIES = libappleglx.la
>  
> -- 
> 2.16.2
> 

Is this in 18.0? If it is please either add a Fixes: tag or CC to stable.

Reviewed-by: Dylan Baker 


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Re: [Mesa-dev] [PATCH 0/5] Fix meson omx compilation

[Dylan Baker]

Quoting Julien Isorce (2018-03-07 06:38:16)
> Thanks a lot for the fixes.
> There is small issue, if fails to build with meson with 'auto' if tizonia is
> installed but not bellagio because ENABLE_ST_OMX_BELLAGIO will remain defined.
> Though it can be added afterward, and the series is:

Oops, thats a tiny fix, just put the pre_args += ... in dep_omx.found() block.
Should probably do the same for tizonia.

> Tested-by: Julien Isorce 
> 
> On 7 March 2018 at 13:44, Eric Engestrom  wrote:
> 
> On Tuesday, 2018-03-06 11:57:11 -0800, Dylan Baker wrote:
> > This fixes a couple of problems with the meson build support for the
> > recent omx tizonia integration, namely that it breaks a lot of
> > previously working meson configurations.
> 
> Thanks! Series is:
> Reviewed-by: Eric Engestrom 
> 
> >
> > The biggest change in here is the reintroduction of the 'auto' flag to
> > -Dgallium-omx. This allows configurations that lack tizonia, or that
> > otherwise can't build the omx tracker (i965, and gallium drivers other
> > than r600, radeon, or nouveau) to build without intervention.
> >
> > This also fixes some style things, but those are pretty trivial.
> >
> > Dylan Baker (5):
> >   meson: combine state trackers and target if blocks
> >   meson: fix tizonia compilation
> >   meson: Re-add auto option for omx
> >   meson: Use include directory variables instead of traversing
> >   meson: Fix indent in omx meson.build
> >
> >  meson.build                                | 67
> +++--
> >  meson_options.txt                          |  4 +-
> >  src/egl/meson.build                        |  5 ++-
> >  src/gallium/meson.build                    | 30 -
> >  src/gallium/state_trackers/dri/meson.build |  2 +
> >  src/gallium/state_trackers/omx/meson.build | 69
> +++---
> >  src/gbm/meson.build                        |  2 +-
> >  7 files changed, 95 insertions(+), 84 deletions(-)
> >
> > --
> > 2.16.2
> >
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Re: [Mesa-dev] [PATCH v4 4/6] nouveau: Add framebuffer modifier support

[Ilia Mirkin]

On Wed, Mar 7, 2018 at 10:53 AM, Thierry Reding
 wrote:
> From: Thierry Reding 
>
> This adds support for framebuffer modifiers to Nouveau. This will be
> used by the Tegra driver to share metadata about the format of buffers
> (such as the tiling mode or compression).
>
> Changes in v2:
> - remove unused parameters to nouveau_buffer_create()
> - move format modifier query code to nvc0 backend
> - restrict format modifiers to 2D textures
> - implement ->query_dmabuf_modifiers()
>
> Changes in v4:
> - add UAPI include path on meson builds
>
> Acked-by: Emil Velikov 
> Tested-by: Andre Heider 
> Signed-off-by: Thierry Reding 
> ---
>  src/gallium/drivers/nouveau/Android.mk   |  3 +
>  src/gallium/drivers/nouveau/Makefile.am  |  1 +
>  src/gallium/drivers/nouveau/meson.build  |  4 +-
>  src/gallium/drivers/nouveau/nouveau_screen.c |  4 ++
>  src/gallium/drivers/nouveau/nv30/nv30_resource.c |  2 +
>  src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c  | 81 
> +++-
>  src/gallium/drivers/nouveau/nvc0/nvc0_resource.c | 59 -
>  src/gallium/drivers/nouveau/nvc0/nvc0_resource.h |  3 +-
>  8 files changed, 152 insertions(+), 5 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/Android.mk 
> b/src/gallium/drivers/nouveau/Android.mk
> index 2de22e73ec18..a446774a86e8 100644
> --- a/src/gallium/drivers/nouveau/Android.mk
> +++ b/src/gallium/drivers/nouveau/Android.mk
> @@ -36,6 +36,9 @@ LOCAL_SRC_FILES := \
> $(NVC0_CODEGEN_SOURCES) \
> $(NVC0_C_SOURCES)
>
> +LOCAL_C_INCLUDES := \
> +   $(MESA_TOP)/include/drm-uapi
> +
>  LOCAL_SHARED_LIBRARIES := libdrm_nouveau
>  LOCAL_MODULE := libmesa_pipe_nouveau
>
> diff --git a/src/gallium/drivers/nouveau/Makefile.am 
> b/src/gallium/drivers/nouveau/Makefile.am
> index 91547178e397..f6126b544811 100644
> --- a/src/gallium/drivers/nouveau/Makefile.am
> +++ b/src/gallium/drivers/nouveau/Makefile.am
> @@ -24,6 +24,7 @@ include Makefile.sources
>  include $(top_srcdir)/src/gallium/Automake.inc
>
>  AM_CPPFLAGS = \
> +   -I$(top_srcdir)/include/drm-uapi \
> $(GALLIUM_DRIVER_CFLAGS) \
> $(LIBDRM_CFLAGS) \
> $(NOUVEAU_CFLAGS)
> diff --git a/src/gallium/drivers/nouveau/meson.build 
> b/src/gallium/drivers/nouveau/meson.build
> index e44be2616e70..242ee0e0001b 100644
> --- a/src/gallium/drivers/nouveau/meson.build
> +++ b/src/gallium/drivers/nouveau/meson.build
> @@ -207,7 +207,9 @@ files_libnouveau = files(
>  libnouveau = static_library(
>'nouveau',
>[files_libnouveau],
> -  include_directories : [inc_src, inc_include, inc_gallium, inc_gallium_aux],
> +  include_directories : [
> +inc_src, inc_include, inc_gallium, inc_gallium_aux, inc_drm_uapi
> +  ],
>c_args : [c_vis_args],
>cpp_args : [cpp_vis_args],
>dependencies : [dep_libdrm, dep_libdrm_nouveau],
> diff --git a/src/gallium/drivers/nouveau/nouveau_screen.c 
> b/src/gallium/drivers/nouveau/nouveau_screen.c
> index c144b39b2dd2..b84ef13ebe7f 100644
> --- a/src/gallium/drivers/nouveau/nouveau_screen.c
> +++ b/src/gallium/drivers/nouveau/nouveau_screen.c
> @@ -1,3 +1,5 @@
> +#include 
> +
>  #include "pipe/p_defines.h"
>  #include "pipe/p_screen.h"
>  #include "pipe/p_state.h"
> @@ -23,6 +25,8 @@
>  #include "nouveau_mm.h"
>  #include "nouveau_buffer.h"
>
> +#include "nvc0/nvc0_resource.h"

Pretty sure I've mentioned before that this was undesirable (and also
seemingly unnecessary). Did you forget to fix it, or did you send the
wrong version of the patch?

  -ilia
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Re: [Mesa-dev] [PATCH v3 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

[Lepton Wu]

I misunderstanding your point, now I got it and will do more test to
see if removing this hunk will cause some issue
in some cases of multi plane code path. Thanks.

On Wed, Mar 7, 2018 at 10:14 AM, Lepton Wu  wrote:
> Actually the reason why I need this CL:
>
> In multi plane patch I'd like to only mmap once for different planes
> of same buffer. So actually I need some way
> to reuse same mmap for different planes. Then it's natural to have
> this CL.  The fix to leak is a side effect of this CL.
> dt_unmap still works with this CL,  if user call dt_map for single
> plane buffer multiple times,  they will get same pointer, and if they
> call dt_unmap
> ,  with this CL, it still get unmapped.
>
> On Wed, Mar 7, 2018 at 7:14 AM, Emil Velikov  wrote:
>> On 6 March 2018 at 22:43, Lepton Wu  wrote:
>>> If user calls map twice for kms_sw_displaytarget, the first mapped
>>> buffer could get leaked. Instead of calling mmap every time, just
>>> reuse previous mapping. Since user could map same displaytarget with
>>> different flags, we have to keep two different pointers, one for rw
>>> mapping and one for ro mapping.
>>>
>>> Change-Id: I65308f0ff2640bd57b2577c6a3469540c9722859
>>> Signed-off-by: Lepton Wu 
>>> ---
>>>  .../winsys/sw/kms-dri/kms_dri_sw_winsys.c | 26 ++-
>>>  1 file changed, 19 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 
>>> b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>>> index 22e1c936ac5..30343222470 100644
>>> --- a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>>> +++ b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>>> @@ -70,6 +70,7 @@ struct kms_sw_displaytarget
>>>
>>> uint32_t handle;
>>> void *mapped;
>>> +   void *ro_mapped;
>>>
>>> int ref_count;
>>> struct list_head link;
>>> @@ -170,6 +171,11 @@ kms_sw_displaytarget_destroy(struct sw_winsys *ws,
>>> if (kms_sw_dt->ref_count > 0)
>>>return;
>>>
>>> +   if (kms_sw_dt->ro_mapped)
>>> +  munmap(kms_sw_dt->ro_mapped, kms_sw_dt->size);
>>> +   if (kms_sw_dt->mapped)
>>> +  munmap(kms_sw_dt->mapped, kms_sw_dt->size);
>>> +
>> I'm not 100% sure about this. There's a reason why dt_unmap exists.
>>
>> Skimming through the existing code [1] - there's a handful of cases
>> that indicate the leaks you're hitting.
>> I'd look into addressing those properly because as-is this looks alike
>> a duck-taping the problem.
>>
>> With the hunk gone the patch is
>> Reviewed-by: Emil Velikov 
>>
>> -Emil
>>
>> [1] $ git grep -20 -w displaytarget_[a-z]*map
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Re: [Mesa-dev] [PATCH 2/2] ac/radeonsi: add emit_kill to the abi

[Marek Olšák]

For the series:

Reviewed-by: Marek Olšák 

Marek

On Wed, Mar 7, 2018 at 6:04 PM, Timothy Arceri  wrote:
> This should fix a regression with Rocket League grass rendering
> on the NIR backend.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104717
> ---
>  src/amd/common/ac_nir_to_llvm.c  | 9 -
>  src/amd/common/ac_shader_abi.h   | 2 ++
>  src/gallium/drivers/radeonsi/si_shader.c | 1 +
>  3 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 425970e609..e70e0c5488 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -3844,6 +3844,12 @@ static void emit_barrier(struct ac_llvm_context *ac, 
> gl_shader_stage stage)
>ac->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
>  }
>
> +static void radv_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible)
> +{
> +   struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
> +   ac_build_kill_if_false(>ac, visible);
> +}
> +
>  static void emit_discard(struct ac_nir_context *ctx,
>  const nir_intrinsic_instr *instr)
>  {
> @@ -3858,7 +3864,7 @@ static void emit_discard(struct ac_nir_context *ctx,
> cond = LLVMConstInt(ctx->ac.i1, false, 0);
> }
>
> -   ac_build_kill_if_false(>ac, cond);
> +   ctx->abi->emit_kill(ctx->abi, cond);
>  }
>
>  static LLVMValueRef
> @@ -6888,6 +6894,7 @@ LLVMModuleRef 
> ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
> ctx.abi.lookup_interp_param = lookup_interp_param;
> ctx.abi.load_sample_position = load_sample_position;
> ctx.abi.load_sample_mask_in = load_sample_mask_in;
> +   ctx.abi.emit_kill = radv_emit_kill;
> }
>
> if (i)
> diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
> index ccf26648a2..4a29e0eb13 100644
> --- a/src/amd/common/ac_shader_abi.h
> +++ b/src/amd/common/ac_shader_abi.h
> @@ -86,6 +86,8 @@ struct ac_shader_abi {
> void (*emit_primitive)(struct ac_shader_abi *abi,
>unsigned stream);
>
> +   void (*emit_kill)(struct ac_shader_abi *abi, LLVMValueRef visible);
> +
> LLVMValueRef (*load_inputs)(struct ac_shader_abi *abi,
> unsigned location,
> unsigned driver_location,
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
> b/src/gallium/drivers/radeonsi/si_shader.c
> index 2e57eca6e5..306784aff4 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -6058,6 +6058,7 @@ static bool si_compile_tgsi_main(struct 
> si_shader_context *ctx,
> ctx->abi.lookup_interp_param = si_nir_lookup_interp_param;
> ctx->abi.load_sample_position = load_sample_position;
> ctx->abi.load_sample_mask_in = load_sample_mask_in;
> +   ctx->abi.emit_kill = si_llvm_emit_kill;
> break;
> case PIPE_SHADER_COMPUTE:
> ctx->abi.load_local_group_size = get_block_size;
> --
> 2.14.3
>
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[Mesa-dev] [PATCH] radv: drop assert on bindingDescriptorCount > 0

[Dave Airlie]

From: Dave Airlie 

The spec is pretty clear that this can be 0, and that it operates
as a reserved binding.

Fixes:
dEQP-VK.binding_model.descriptor_update.empty_descriptor.uniform_buffer

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_descriptor_set.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/amd/vulkan/radv_descriptor_set.c 
b/src/amd/vulkan/radv_descriptor_set.c
index daff7b2fcd..3d56f8c217 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -137,7 +137,6 @@ VkResult radv_CreateDescriptorSetLayout(
}
 
set_layout->size = align(set_layout->size, alignment);
-   assert(binding->descriptorCount > 0);
set_layout->binding[b].type = binding->descriptorType;
set_layout->binding[b].array_size = binding->descriptorCount;
set_layout->binding[b].offset = set_layout->size;
-- 
2.14.3

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Re: [Mesa-dev] [PATCH v3 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

[Lepton Wu]

OK, I will send out a new version which omit unmap in dt_destory.
Any way, even we need this code, it could be a separate patch.

On Wed, Mar 7, 2018 at 7:14 AM, Emil Velikov  wrote:
> On 6 March 2018 at 22:43, Lepton Wu  wrote:
>> If user calls map twice for kms_sw_displaytarget, the first mapped
>> buffer could get leaked. Instead of calling mmap every time, just
>> reuse previous mapping. Since user could map same displaytarget with
>> different flags, we have to keep two different pointers, one for rw
>> mapping and one for ro mapping.
>>
>> Change-Id: I65308f0ff2640bd57b2577c6a3469540c9722859
>> Signed-off-by: Lepton Wu 
>> ---
>>  .../winsys/sw/kms-dri/kms_dri_sw_winsys.c | 26 ++-
>>  1 file changed, 19 insertions(+), 7 deletions(-)
>>
>> diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 
>> b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>> index 22e1c936ac5..30343222470 100644
>> --- a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>> +++ b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>> @@ -70,6 +70,7 @@ struct kms_sw_displaytarget
>>
>> uint32_t handle;
>> void *mapped;
>> +   void *ro_mapped;
>>
>> int ref_count;
>> struct list_head link;
>> @@ -170,6 +171,11 @@ kms_sw_displaytarget_destroy(struct sw_winsys *ws,
>> if (kms_sw_dt->ref_count > 0)
>>return;
>>
>> +   if (kms_sw_dt->ro_mapped)
>> +  munmap(kms_sw_dt->ro_mapped, kms_sw_dt->size);
>> +   if (kms_sw_dt->mapped)
>> +  munmap(kms_sw_dt->mapped, kms_sw_dt->size);
>> +
> I'm not 100% sure about this. There's a reason why dt_unmap exists.
>
> Skimming through the existing code [1] - there's a handful of cases
> that indicate the leaks you're hitting.
> I'd look into addressing those properly because as-is this looks alike
> a duck-taping the problem.
>
> With the hunk gone the patch is
> Reviewed-by: Emil Velikov 
>
> -Emil
>
> [1] $ git grep -20 -w displaytarget_[a-z]*map
On Wed, Mar 7,
2018 at 7:14 AM, Emil Velikov mailto:emil.l.veli...@gmail.com;
target="_blank">emil.l.veli...@gmail.com
wrote:On 6 March 2018 at 22:43, Lepton Wu
mailto:lep...@chromium.org;>lep...@chromium.org
wrote:
 If user calls map twice for kms_sw_displaytarget, the first mapped
 buffer could get leaked. Instead of calling mmap every time, just
 reuse previous mapping. Since user could map same displaytarget with
 different flags, we have to keep two different pointers, one for rw
 mapping and one for ro mapping.

 Change-Id: I65308f0ff2640bd57b2577c6a3469540c9722859
 Signed-off-by: Lepton Wu mailto:lep...@chromium.org;>lep...@chromium.org
 ---
 .../winsys/sw/kms-dri/kms_dri_sw_winsys.c 
| 26 ++-
 1 file changed, 19 insertions(+), 7 deletions(-)

 diff --git
a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
 index 22e1c936ac5..30343222470 100644
 --- a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
 +++ b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
 @@ -70,6 +70,7 @@ struct kms_sw_displaytarget

  uint32_t handle;
  void *mapped;
 + void *ro_mapped;

  int ref_count;
  struct list_head link;
 @@ -170,6 +171,11 @@ kms_sw_displaytarget_destroy(struct
sw_winsys *ws,
  if (kms_sw_dt-ref_count  0)
return;

 + if (kms_sw_dt-ro_mapped)
 +   munmap(kms_sw_dt-ro_mapped,
kms_sw_dt-size);
 + if (kms_sw_dt-mapped)
 +   munmap(kms_sw_dt-mapped, kms_sw_dt-size);
 +
I'm not 100% sure about this. There's a reason why
dt_unmap exists.

Skimming through the existing code [1] - there's a handful of cases
that indicate the leaks you're hitting.
I'd look into addressing those properly because as-is this looks alike
a duck-taping the problem.

With the hunk gone the patch is
Reviewed-by: Emil Velikov mailto:emil.veli...@collabora.com;>emil.veli...@collabora.com

-Emil

[1] $ git grep -20 -w displaytarget_[a-z]*map

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Re: [Mesa-dev] [PATCH 1/2] autotools: add vtn_amd.c to sources

[Timothy Arceri]

Sorry for the noise. Rather than wait for others to trip over this, I've 
pushed my patch with a r-b from Bas.


On 08/03/18 10:42, Timothy Arceri wrote:

Look like I should have check the list before sending a patch.

Please add the following to the commit message. Otherwise Reviewed-by: 
Timothy Arceri 


Fixes: 68a6a3b51acc "spirv: handle AMD_gcn_shader extended instructions"

On 08/03/18 10:13, Dylan Baker wrote:

cc: Emil Veliov 
Signed-off-by: Dylan Baker 
---
  src/compiler/Makefile.sources | 1 +
  1 file changed, 1 insertion(+)

diff --git a/src/compiler/Makefile.sources 
b/src/compiler/Makefile.sources

index 841bc8fec91..37340ba809e 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -301,6 +301,7 @@ SPIRV_FILES = \
  spirv/spirv_info.h \
  spirv/spirv_to_nir.c \
  spirv/vtn_alu.c \
+    spirv/vtn_amd.c \
  spirv/vtn_cfg.c \
  spirv/vtn_glsl450.c \
  spirv/vtn_private.h \


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[Mesa-dev] [PATCH v4 08/20] clover/api: Fail if trying to build a non-executable binary

[Pierre Moreau]

From the OpenCL 1.2 Specification, Section 5.6.2 (about clBuildProgram):

> If program is created with clCreateProgramWithBinary, then the
> program binary must be an executable binary (not a compiled binary or
> library).

Reviewed-by: Aaron Watry 
Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index e97b6400fe..134cebfdf7 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -188,6 +188,13 @@ clBuildProgram(cl_program d_prog, cl_uint num_devs,
if (prog.has_source) {
   prog.compile(devs, opts);
   prog.link(devs, opts, { prog });
+   } else if (any_of([&](const device ){
+ return prog.build(dev).binary_type() != 
CL_PROGRAM_BINARY_TYPE_EXECUTABLE;
+ }, devs)) {
+  // According to the OpenCL 1.2 specification, “if program is created
+  // with clCreateProgramWithBinary, then the program binary must be an
+  // executable binary (not a compiled binary or library).”
+  throw error(CL_INVALID_BINARY);
}
 
return CL_SUCCESS;
-- 
2.16.2

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[Mesa-dev] [PATCH v4 10/20] clover: Track flags per module section

[Pierre Moreau]

One flag that needs to be tracked is whether a library is allowed to
received mathematics optimisations or not, as the authorisation is given
when creating the library while the optimisations are specified when
creating the executable.

Reviewed-by: Aaron Watry 
Signed-off-by: Pierre Moreau 
---

Notes:
Changes in v4: drop the modification to the tgsi backend, as already dropped
   (Aaron Watry)

 src/gallium/state_trackers/clover/core/module.cpp  |  1 +
 src/gallium/state_trackers/clover/core/module.hpp  | 13 +
 src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp |  3 ++-
 src/gallium/state_trackers/clover/llvm/codegen/common.cpp  |  2 +-
 4 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/src/gallium/state_trackers/clover/core/module.cpp 
b/src/gallium/state_trackers/clover/core/module.cpp
index a6c5b98d8e..0e11506d0d 100644
--- a/src/gallium/state_trackers/clover/core/module.cpp
+++ b/src/gallium/state_trackers/clover/core/module.cpp
@@ -163,6 +163,7 @@ namespace {
   proc(S , QT ) {
  _proc(s, x.id);
  _proc(s, x.type);
+ _proc(s, x.flags);
  _proc(s, x.size);
  _proc(s, x.data);
   }
diff --git a/src/gallium/state_trackers/clover/core/module.hpp 
b/src/gallium/state_trackers/clover/core/module.hpp
index 2ddd26426f..ff7e9b6234 100644
--- a/src/gallium/state_trackers/clover/core/module.hpp
+++ b/src/gallium/state_trackers/clover/core/module.hpp
@@ -41,14 +41,19 @@ namespace clover {
 data_local,
 data_private
  };
+ enum class flags_t {
+none,
+allow_link_options
+ };
 
- section(resource_id id, enum type type, size_t size,
- const std::vector ) :
- id(id), type(type), size(size), data(data) { }
- section() : id(0), type(text_intermediate), size(0), data() { }
+ section(resource_id id, enum type type, flags_t flags,
+ size_t size, const std::vector ) :
+ id(id), type(type), flags(flags), size(size), data(data) { }
+ section() : id(0), type(text_intermediate), flags(flags_t::none), 
size(0), data() { }
 
  resource_id id;
  type type;
+ flags_t flags;
  size_t size;
  std::vector data;
   };
diff --git a/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp 
b/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
index 40bb426218..8e9d4c7e85 100644
--- a/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
+++ b/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
@@ -84,7 +84,8 @@ clover::llvm::build_module_library(const ::llvm::Module ,
enum module::section::type section_type) {
module m;
const auto code = emit_code(mod);
-   m.secs.emplace_back(0, section_type, code.size(), code);
+   m.secs.emplace_back(0, section_type, module::section::flags_t::none,
+   code.size(), code);
return m;
 }
 
diff --git a/src/gallium/state_trackers/clover/llvm/codegen/common.cpp 
b/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
index ddf2083f37..3a08f11fcc 100644
--- a/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
+++ b/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
@@ -179,7 +179,7 @@ namespace {
make_text_section(const std::vector ) {
   const pipe_llvm_program_header header { uint32_t(code.size()) };
   module::section text { 0, module::section::text_executable,
- header.num_bytes, {} };
+ module::section::flags_t::none, header.num_bytes, 
{} };
 
   text.data.insert(text.data.end(), reinterpret_cast(),
reinterpret_cast() + 
sizeof(header));
-- 
2.16.2

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[Mesa-dev] [PATCH v4 07/20] clover/api: Rework the validation of devices for building

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Notes:
Changes in v4:
* validate_build_common no longer returns a list of devices (Francisco 
Jerez);
* Dropped duplicate checks (Francisco Jerez).

 src/gallium/state_trackers/clover/api/program.cpp  | 23 +-
 src/gallium/state_trackers/clover/core/program.cpp |  3 ++-
 2 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 9d59668f8f..e97b6400fe 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -32,6 +32,7 @@ namespace {
void
validate_build_common(const program , cl_uint num_devs,
  const cl_device_id *d_devs,
+ ref_vector _devs,
  void (*pfn_notify)(cl_program, void *),
  void *user_data) {
   if (!pfn_notify && user_data)
@@ -41,7 +42,7 @@ namespace {
  throw error(CL_INVALID_OPERATION);
 
   if (any_of([&](const device ) {
-   return !count(dev, prog.context().devices());
+   return !count(dev, valid_devs);
 }, objs(d_devs, num_devs)))
  throw error(CL_INVALID_DEVICE);
}
@@ -176,12 +177,13 @@ clBuildProgram(cl_program d_prog, cl_uint num_devs,
void (*pfn_notify)(cl_program, void *),
void *user_data) try {
auto  = obj(d_prog);
-   auto devs = (d_devs ? objs(d_devs, num_devs) :
-ref_vector(prog.context().devices()));
+   auto valid_devs = ref_vector(prog.devices());
+   auto devs = (d_devs ? objs(d_devs, num_devs) : valid_devs);
const auto opts = std::string(p_opts ? p_opts : "") + " " +
  debug_get_option("CLOVER_EXTRA_BUILD_OPTIONS", "");
 
-   validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
+   validate_build_common(prog, num_devs, d_devs, valid_devs, pfn_notify,
+ user_data);
 
if (prog.has_source) {
   prog.compile(devs, opts);
@@ -202,13 +204,14 @@ clCompileProgram(cl_program d_prog, cl_uint num_devs,
  void (*pfn_notify)(cl_program, void *),
  void *user_data) try {
auto  = obj(d_prog);
-   auto devs = (d_devs ? objs(d_devs, num_devs) :
-ref_vector(prog.context().devices()));
+   auto valid_devs = ref_vector(prog.devices());
+   auto devs = (d_devs ? objs(d_devs, num_devs) : valid_devs);
const auto opts = std::string(p_opts ? p_opts : "") + " " +
  debug_get_option("CLOVER_EXTRA_COMPILE_OPTIONS", "");
header_map headers;
 
-   validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
+   validate_build_common(prog, num_devs, d_devs, valid_devs, pfn_notify,
+ user_data);
 
if (bool(num_headers) != bool(header_names))
   throw error(CL_INVALID_VALUE);
@@ -280,11 +283,13 @@ clLinkProgram(cl_context d_ctx, cl_uint num_devs, const 
cl_device_id *d_devs,
  debug_get_option("CLOVER_EXTRA_LINK_OPTIONS", "");
auto progs = objs(d_progs, num_progs);
auto prog = create(ctx);
+   auto valid_devs = ref_vector(ctx.devices());
auto devs = validate_link_devices(progs,
  (d_devs ? objs(d_devs, num_devs) :
-  ref_vector(ctx.devices(;
+  valid_devs));
 
-   validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
+   validate_build_common(prog, num_devs, d_devs, valid_devs, pfn_notify,
+ user_data);
 
try {
   prog().link(devs, opts, progs);
diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index ec71d99b01..62fa13efbf 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -26,7 +26,8 @@
 using namespace clover;
 
 program::program(clover::context , const std::string ) :
-   has_source(true), context(ctx), _source(source), _kernel_ref_counter(0) {
+   has_source(true), context(ctx), _devices(ctx.devices()), _source(source),
+   _kernel_ref_counter(0) {
 }
 
 program::program(clover::context ,
-- 
2.16.2

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[Mesa-dev] [PATCH v4 06/20] clover/device: Replace usage of "1 << PIPE_SHADER_IR_*" with supports_ir

[Pierre Moreau]

Reviewed-by: Aaron Watry 
Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/device.cpp | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index 62d5221bf8..bd67bab5bc 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -244,11 +244,7 @@ device::vendor_name() const {
 
 enum pipe_shader_ir
 device::ir_format() const {
-   int supported_irs =
-  pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
- PIPE_SHADER_CAP_SUPPORTED_IRS);
-
-   if (supported_irs & (1 << PIPE_SHADER_IR_NATIVE)) {
+   if (supports_ir(PIPE_SHADER_IR_NATIVE)) {
   return PIPE_SHADER_IR_NATIVE;
}
 
-- 
2.16.2

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[Mesa-dev] [PATCH v4 09/20] clover: Disallow creating libraries from other libraries

[Pierre Moreau]

If creating a library, do not allow non-compiled object in it, as
executables are not allowed, and libraries would make it really hard to
enforce the "-enable-link-options" flag.

Reviewed-by: Francisco Jerez 
Reviewed-by: Aaron Watry 
Signed-off-by: Pierre Moreau 
---

Notes:
v3: Re-write the explanation as to why libraries can’t be created from other
libraries (Francisco Jerez)

 src/gallium/state_trackers/clover/api/program.cpp | 21 ++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 134cebfdf7..7d57d3f0e9 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -253,8 +253,11 @@ clCompileProgram(cl_program d_prog, cl_uint num_devs,
 namespace {
ref_vector
validate_link_devices(const ref_vector ,
- const ref_vector _devs) {
+ const ref_vector _devs,
+ const std::string ) {
   std::vector devs;
+  const bool create_library =
+ opts.find("-create-library") != std::string::npos;
 
   for (auto  : all_devs) {
  const auto has_binary = [&](const program ) {
@@ -263,10 +266,22 @@ namespace {
t == CL_PROGRAM_BINARY_TYPE_LIBRARY;
  };
 
+ // According to the OpenCL 1.2 specification, a library is made of
+ // “compiled binaries specified in input_programs argument to
+ // clLinkProgram“; compiled binaries does not refer to libraries:
+ // “input_programs is an array of program objects that are compiled
+ // binaries or libraries that are to be linked to create the program
+ // executable”.
+ if (create_library && any_of([&](const program ) {
+  const auto t = prog.build(dev).binary_type();
+  return t != CL_PROGRAM_BINARY_TYPE_COMPILED_OBJECT;
+   }, progs))
+throw error(CL_INVALID_OPERATION);
+
  // According to the CL 1.2 spec, when "all programs specified [..]
  // contain a compiled binary or library for the device [..] a link is
  // performed",
- if (all_of(has_binary, progs))
+ else if (all_of(has_binary, progs))
 devs.push_back();
 
  // otherwise if "none of the programs contain a compiled binary or
@@ -293,7 +308,7 @@ clLinkProgram(cl_context d_ctx, cl_uint num_devs, const 
cl_device_id *d_devs,
auto valid_devs = ref_vector(ctx.devices());
auto devs = validate_link_devices(progs,
  (d_devs ? objs(d_devs, num_devs) :
-  valid_devs));
+  valid_devs), opts);
 
validate_build_common(prog, num_devs, d_devs, valid_devs, pfn_notify,
  user_data);
-- 
2.16.2

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[Mesa-dev] [PATCH v4 00/20] Introducing SPIR-V support to clover

[Pierre Moreau]

Hello,

This new version addresses the comments from the v3, making SPIRV-Tools and
llvm-spirv dependencies optional among others.

The series is also accessible at https://github.com/pierremoreau/mesa, on the
branch clover_spirv_series_v4.

llvm-spirv can be currently grabbed from
https://github.com/pierremoreau/llvm-spirv, on the branch integrate_with_mesa.
It seems this will be the current “master” repository, until it gets accepted
as an external tool in LLVM. As an out-of-tree LLVM consumer, it should be
relatively easy to package (especially compared to Khronos’ SPIRV_LLVM
repository).

The SPIR-V clover backend, that was previously part of this series, has been
dropped out for now, and will instead be submitted in a separate series along
with a consumer. So, what this series enable (besides fixing bugs), is to
accept SPIR-V binaries for drivers that accept NATIVE as IR format, so all
drivers currently supported by clover.

Thanks in advance for the reviews and comments,
Pierre


v4:
* Addressed comments in patch 7 and 14;
* Dropped unneeded modification to the TGSI backend in patch 10, as the backend
  is now removed in patch 04;
* Moved old patch 12 forward, to new patch 04;
* Modified patches 13, 16 and 19 to make SPIRV-Tools and llvm-spirv optional;
* Dropped old patch 21, as changes are part of new patch 17 and 18 now.

Unchanged patches:
* 01: “include/CL: Update to the latest OpenCL 2.2 headers”
* 02: “clover: update ICD table to support everything up to 2.2”
* 03: “clover/api: Fix tab indentation to spaces”
* 04: “clover: Remove the TGSI backend as unused”
* 05: “clover: Add an helper for checking if an IR is supported”
* 06: “clover/device: Replace usage of "1 << PIPE_SHADER_IR_*" with supports_ir”
* 08: “clover/api: Fail if trying to build a non-executable binary”
* 09: “clover: Disallow creating libraries from other libraries”
* 11: “clover: Move device extensions definitions to core/device.cpp”
* 12: “clover: Move platform extensions definitions to clover/platform.cpp”
* 15: “include/CL: Add cl_khr_il_program”
* 20: “clover: Implement clCreateProgramWithIL from OpenCL 2.1”


Karol Herbst (1):
  clover: update ICD table to support everything up to 2.2

Pierre Moreau (19):
  include/CL: Update to the latest OpenCL 2.2 headers
  clover/api: Fix tab indentation to spaces
  clover: Remove the TGSI backend as unused
  clover: Add an helper for checking if an IR is supported
  clover/device: Replace usage of "1 << PIPE_SHADER_IR_*" with
supports_ir
  clover/api: Rework the validation of devices for building
  clover/api: Fail if trying to build a non-executable binary
  clover: Disallow creating libraries from other libraries
  clover: Track flags per module section
  clover: Move device extensions definitions to core/device.cpp
  clover: Move platform extensions definitions to clover/platform.cpp
  configure.ac,meson: Check for SPIRV-Tools and llvm-spirv
  clover/llvm: Allow translating from SPIR-V to LLVM IR
  include/CL: Add cl_khr_il_program
  clover: Implement clCreateProgramWithILKHR
  clover: Handle CL_PROGRAM_IL in clGetProgramInfo
  clover/api: Implement CL_DEVICE_IL_VERSION
  clover: Advertise cl_khr_il_program
  clover: Implement clCreateProgramWithIL from OpenCL 2.1

 configure.ac   |  17 +
 include/CL/cl.h| 472 -
 include/CL/cl_d3d10.h  |   7 +-
 include/CL/cl_d3d11.h  |   7 +-
 include/CL/cl_dx9_media_sharing.h  |   9 +-
 include/CL/cl_dx9_media_sharing_intel.h| 182 
 include/CL/cl_egl.h|   9 +-
 include/CL/cl_ext.h| 338 ++-
 include/CL/cl_ext_intel.h  | 429 +++
 include/CL/cl_gl.h |   7 +-
 include/CL/cl_gl_ext.h |   7 +-
 include/CL/cl_platform.h   | 328 ++
 include/CL/cl_va_api_media_sharing_intel.h | 172 
 include/CL/opencl.h|   7 +-
 meson.build|   7 +
 src/gallium/state_trackers/clover/Makefile.am  |  17 +-
 src/gallium/state_trackers/clover/Makefile.sources |   4 -
 src/gallium/state_trackers/clover/api/device.cpp   |  20 +-
 src/gallium/state_trackers/clover/api/dispatch.cpp |  29 +-
 src/gallium/state_trackers/clover/api/dispatch.hpp | 194 +
 src/gallium/state_trackers/clover/api/platform.cpp |   6 +-
 src/gallium/state_trackers/clover/api/program.cpp  | 151 ++-
 src/gallium/state_trackers/clover/core/device.cpp  |  32 +-
 src/gallium/state_trackers/clover/core/device.hpp  |   2 +
 src/gallium/state_trackers/clover/core/module.cpp  |   1 +
 src/gallium/state_trackers/clover/core/module.hpp  |  13 +-
 .../state_trackers/clover/core/platform.cpp|   5 +
 

[Mesa-dev] [PATCH v4 03/20] clover/api: Fix tab indentation to spaces

[Pierre Moreau]

Acked-by: Francisco Jerez 
Reviewed-by: Karol Herbst 
Reviewed-by: Aaron Watry 
Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/device.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/api/device.cpp 
b/src/gallium/state_trackers/clover/api/device.cpp
index 3572bb0c92..576555a9af 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -326,7 +326,7 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
 #ifdef MESA_GIT_SHA1
 " (" MESA_GIT_SHA1 ")"
 #endif
-   ;
+;
   break;
 
case CL_DEVICE_EXTENSIONS:
-- 
2.16.2

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[Mesa-dev] [PATCH v4 02/20] clover: update ICD table to support everything up to 2.2

[Pierre Moreau]

From: Karol Herbst 

v2: add more prototypes

Signed-off-by: Karol Herbst 
Reviewed-by: Aaron Watry 
Reviewed-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/dispatch.cpp |  29 +++-
 src/gallium/state_trackers/clover/api/dispatch.hpp | 190 +
 2 files changed, 218 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/api/dispatch.cpp 
b/src/gallium/state_trackers/clover/api/dispatch.cpp
index 8f4cfdc7fb..8be4d3cb26 100644
--- a/src/gallium/state_trackers/clover/api/dispatch.cpp
+++ b/src/gallium/state_trackers/clover/api/dispatch.cpp
@@ -142,6 +142,33 @@ namespace clover {
   NULL, // clEnqueueReleaseD3D11ObjectsKHR
   NULL, // clGetDeviceIDsFromDX9MediaAdapterKHR
   NULL, // clEnqueueAcquireDX9MediaSurfacesKHR
-  NULL // clEnqueueReleaseDX9MediaSurfacesKHR
+  NULL, // clEnqueueReleaseDX9MediaSurfacesKHR
+  NULL, // clCreateFromEGLImageKHR
+  NULL, // clEnqueueAcquireEGLObjectsKHR
+  NULL, // clEnqueueReleaseEGLObjectsKHR
+  NULL, // clCreateEventFromEGLSyncKHR
+  NULL, // clCreateCommandQueueWithProperties
+  NULL, // clCreatePipe
+  NULL, // clGetPipeInfo
+  NULL, // clSVMAlloc
+  NULL, // clSVMFree
+  NULL, // clEnqueueSVMFree
+  NULL, // clEnqueueSVMMemcpy
+  NULL, // clEnqueueSVMMemFill
+  NULL, // clEnqueueSVMMap
+  NULL, // clEnqueueSVMUnmap
+  NULL, // clCreateSamplerWithProperties
+  NULL, // clSetKernelArgSVMPointer
+  NULL, // clSetKernelExecInfo
+  NULL, // clGetKernelSubGroupInfoKHR
+  NULL, // clCloneKernel
+  NULL, // clCreateProgramWithIL
+  NULL, // clEnqueueSVMMigrateMem
+  NULL, // clGetDeviceAndHostTimer
+  NULL, // clGetHostTimer
+  NULL, // clGetKernelSubGroupInfo
+  NULL, // clSetDefaultDeviceCommandQueue
+  NULL, // clSetProgramReleaseCallback
+  NULL, // clSetProgramSpecializationConstant
};
 }
diff --git a/src/gallium/state_trackers/clover/api/dispatch.hpp 
b/src/gallium/state_trackers/clover/api/dispatch.hpp
index 0ec1b51fa6..60fb75a146 100644
--- a/src/gallium/state_trackers/clover/api/dispatch.hpp
+++ b/src/gallium/state_trackers/clover/api/dispatch.hpp
@@ -27,6 +27,7 @@
 
 #include "CL/cl.h"
 #include "CL/cl_ext.h"
+#include "CL/cl_egl.h"
 #include "CL/cl_gl.h"
 
 ///
@@ -765,6 +766,195 @@ struct _cl_icd_dispatch {
void *clGetDeviceIDsFromDX9MediaAdapterKHR;
void *clEnqueueAcquireDX9MediaSurfacesKHR;
void *clEnqueueReleaseDX9MediaSurfacesKHR;
+
+   CL_API_ENTRY void (CL_API_CALL *clCreateFromEGLImageKHR)(
+  cl_context context,
+  CLeglDisplayKHR display,
+  CLeglImageKHR image,
+  cl_mem_flags flags,
+  const cl_egl_image_properties_khr *properties,
+  cl_int *errcode_ret);
+
+   CL_API_ENTRY void (CL_API_CALL *clEnqueueAcquireEGLObjectsKHR)(
+  cl_command_queue command_queue,
+  cl_uint num_objects,
+  const cl_mem *mem_objects,
+  cl_uint num_events_in_wait_list,
+  const cl_event *event_wait_list,
+  cl_event *event);
+
+   CL_API_ENTRY void (CL_API_CALL *clEnqueueReleaseEGLObjectsKHR)(
+  cl_command_queue command_queue,
+  cl_uint num_objects,
+  const cl_mem *mem_objects,
+  cl_uint num_events_in_wait_list,
+  const cl_event *event_wait_list,
+  cl_event *event);
+
+   CL_API_ENTRY void (CL_API_CALL *clCreateEventFromEGLSyncKHR)(
+  cl_context context,
+  CLeglSyncKHR sync,
+  CLeglDisplayKHR display,
+  cl_int *errcode_ret);
+
+   CL_API_ENTRY void (CL_API_CALL *clCreateCommandQueueWithProperties)(
+  cl_context context,
+  cl_device_id device,
+  const cl_queue_properties *properties,
+  cl_int *errcode_ret);
+
+   CL_API_ENTRY void (CL_API_CALL *clCreatePipe)(
+  cl_context context,
+  cl_mem_flags flags,
+  cl_uint pipe_packet_size,
+  cl_uint pipe_max_packets,
+  const cl_pipe_properties *properties,
+  cl_int *errcode_ret);
+
+   CL_API_ENTRY void (CL_API_CALL *clGetPipeInfo)(
+  cl_mem pipe,
+  cl_pipe_info param_name,
+  size_t param_value_size,
+  void *param_value,
+  size_t *param_value_size_ret);
+
+   CL_API_ENTRY void (CL_API_CALL *clSVMAlloc)(
+  cl_context context,
+  cl_svm_mem_flags flags,
+  size_t size,
+  unsigned int alignment);
+
+   CL_API_ENTRY void (CL_API_CALL *clSVMFree)(
+  cl_context context,
+  void *svm_pointer);
+
+   CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueSVMFree)(
+  cl_command_queue command_queue,
+  cl_uint num_svm_pointers,
+  void **svm_pointers,
+  void (CL_CALLBACK *pfn_free_func)(cl_command_queue, cl_uint, void **, 
void *),
+  void *user_data,
+  cl_uint num_events_in_wait_list,
+  const cl_event *event_wait_list,
+  cl_event *event);
+
+   CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueSVMMemcpy)(
+  cl_command_queue command_queue,
+  cl_bool 

[Mesa-dev] [PATCH v4 11/20] clover: Move device extensions definitions to core/device.cpp

[Pierre Moreau]

Reviewed-by: Francisco Jerez 
Reviewed-by: Aaron Watry 
Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/device.cpp  | 11 +--
 src/gallium/state_trackers/clover/core/device.cpp | 14 ++
 src/gallium/state_trackers/clover/core/device.hpp |  1 +
 3 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/device.cpp 
b/src/gallium/state_trackers/clover/api/device.cpp
index 576555a9af..4e274c5005 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -330,16 +330,7 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
   break;
 
case CL_DEVICE_EXTENSIONS:
-  buf.as_string() =
- "cl_khr_byte_addressable_store"
- " cl_khr_global_int32_base_atomics"
- " cl_khr_global_int32_extended_atomics"
- " cl_khr_local_int32_base_atomics"
- " cl_khr_local_int32_extended_atomics"
- + std::string(dev.has_int64_atomics() ? " cl_khr_int64_base_atomics" 
: "")
- + std::string(dev.has_int64_atomics() ? " 
cl_khr_int64_extended_atomics" : "")
- + std::string(dev.has_doubles() ? " cl_khr_fp64" : "")
- + std::string(dev.has_halves() ? " cl_khr_fp16" : "");
+  buf.as_string() = dev.supported_extensions();
   break;
 
case CL_DEVICE_PLATFORM:
diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index bd67bab5bc..21de0e3d61 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -282,3 +282,17 @@ device::supports_ir(enum pipe_shader_ir ir) const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
  PIPE_SHADER_CAP_SUPPORTED_IRS) & (1 << ir);
 }
+
+std::string
+device::supported_extensions() const {
+   return
+  "cl_khr_byte_addressable_store"
+  " cl_khr_global_int32_base_atomics"
+  " cl_khr_global_int32_extended_atomics"
+  " cl_khr_local_int32_base_atomics"
+  " cl_khr_local_int32_extended_atomics"
+  + std::string(has_int64_atomics() ? " cl_khr_int64_base_atomics" : "")
+  + std::string(has_int64_atomics() ? " cl_khr_int64_extended_atomics" : 
"")
+  + std::string(has_doubles() ? " cl_khr_fp64" : "")
+  + std::string(has_halves() ? " cl_khr_fp16" : "");
+}
diff --git a/src/gallium/state_trackers/clover/core/device.hpp 
b/src/gallium/state_trackers/clover/core/device.hpp
index ebe15f28e9..a7084e863f 100644
--- a/src/gallium/state_trackers/clover/core/device.hpp
+++ b/src/gallium/state_trackers/clover/core/device.hpp
@@ -83,6 +83,7 @@ namespace clover {
   std::string ir_target() const;
   enum pipe_endian endianness() const;
   bool supports_ir(enum pipe_shader_ir ir) const;
+  std::string supported_extensions() const;
 
   friend class command_queue;
   friend class root_resource;
-- 
2.16.2

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[Mesa-dev] [PATCH v4 04/20] clover: Remove the TGSI backend as unused

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/Makefile.am  |  11 +-
 src/gallium/state_trackers/clover/Makefile.sources |   4 -
 src/gallium/state_trackers/clover/core/program.cpp |  13 +--
 src/gallium/state_trackers/clover/meson.build  |   9 +-
 .../state_trackers/clover/tgsi/compiler.cpp| 120 -
 .../state_trackers/clover/tgsi/invocation.hpp  |  37 ---
 6 files changed, 8 insertions(+), 186 deletions(-)
 delete mode 100644 src/gallium/state_trackers/clover/tgsi/compiler.cpp
 delete mode 100644 src/gallium/state_trackers/clover/tgsi/invocation.hpp

diff --git a/src/gallium/state_trackers/clover/Makefile.am 
b/src/gallium/state_trackers/clover/Makefile.am
index a7befb4605..35ee092f3f 100644
--- a/src/gallium/state_trackers/clover/Makefile.am
+++ b/src/gallium/state_trackers/clover/Makefile.am
@@ -28,14 +28,7 @@ cl_HEADERS = \
$(top_srcdir)/include/CL/opencl.h
 endif
 
-noinst_LTLIBRARIES = libclover.la libcltgsi.la libclllvm.la
-
-libcltgsi_la_CXXFLAGS = \
-   $(CXX11_CXXFLAGS) \
-   $(CLOVER_STD_OVERRIDE) \
-   $(VISIBILITY_CXXFLAGS)
-
-libcltgsi_la_SOURCES = $(TGSI_SOURCES)
+noinst_LTLIBRARIES = libclover.la libclllvm.la
 
 libclllvm_la_CXXFLAGS = \
$(CXX11_CXXFLAGS) \
@@ -56,7 +49,7 @@ libclover_la_CXXFLAGS = \
$(VISIBILITY_CXXFLAGS)
 
 libclover_la_LIBADD = \
-   libcltgsi.la libclllvm.la
+   libclllvm.la
 
 libclover_la_SOURCES = $(CPP_SOURCES)
 
diff --git a/src/gallium/state_trackers/clover/Makefile.sources 
b/src/gallium/state_trackers/clover/Makefile.sources
index e9828b107b..5167ca75af 100644
--- a/src/gallium/state_trackers/clover/Makefile.sources
+++ b/src/gallium/state_trackers/clover/Makefile.sources
@@ -62,7 +62,3 @@ LLVM_SOURCES := \
llvm/invocation.hpp \
llvm/metadata.hpp \
llvm/util.hpp
-
-TGSI_SOURCES := \
-   tgsi/compiler.cpp \
-   tgsi/invocation.hpp
diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index 4e74fccd97..ec71d99b01 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -22,7 +22,6 @@
 
 #include "core/program.hpp"
 #include "llvm/invocation.hpp"
-#include "tgsi/invocation.hpp"
 
 using namespace clover;
 
@@ -51,10 +50,9 @@ program::compile(const ref_vector , const 
std::string ,
  std::string log;
 
  try {
-const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
-  tgsi::compile_program(_source, log) :
-  llvm::compile_program(_source, headers, dev,
-opts, log));
+assert(dev.ir_format() == PIPE_SHADER_IR_NATIVE);
+const module m = llvm::compile_program(_source, headers, dev, opts,
+   log);
 _builds[] = { m, opts, log };
  } catch (...) {
 _builds[] = { module(), opts, log };
@@ -76,9 +74,8 @@ program::link(const ref_vector , const 
std::string ,
   std::string log = _builds[].log;
 
   try {
- const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
-   tgsi::link_program(ms) :
-   llvm::link_program(ms, dev, opts, log));
+ assert(dev.ir_format() == PIPE_SHADER_IR_NATIVE);
+ const module m = llvm::link_program(ms, dev, opts, log);
  _builds[] = { m, opts, log };
   } catch (...) {
  _builds[] = { module(), opts, log };
diff --git a/src/gallium/state_trackers/clover/meson.build 
b/src/gallium/state_trackers/clover/meson.build
index d1497e657e..c52f0faa40 100644
--- a/src/gallium/state_trackers/clover/meson.build
+++ b/src/gallium/state_trackers/clover/meson.build
@@ -25,13 +25,6 @@ if with_opencl_icd
   clover_cpp_args += '-DHAVE_CLOVER_ICD'
 endif
 
-libcltgsi = static_library(
-  'cltgsi',
-  files('tgsi/compiler.cpp', 'tgsi/invocation.hpp'),
-  include_directories : clover_incs,
-  cpp_args : [cpp_vis_args],
-)
-
 libclllvm = static_library(
   'clllvm',
   files(
@@ -118,5 +111,5 @@ libclover = static_library(
   clover_files,
   include_directories : clover_incs,
   cpp_args : [clover_cpp_args, cpp_vis_args],
-  link_with : [libcltgsi, libclllvm],
+  link_with : [libclllvm],
 )
diff --git a/src/gallium/state_trackers/clover/tgsi/compiler.cpp 
b/src/gallium/state_trackers/clover/tgsi/compiler.cpp
deleted file mode 100644
index e165311fa4..00
--- a/src/gallium/state_trackers/clover/tgsi/compiler.cpp
+++ /dev/null
@@ -1,120 +0,0 @@
-//
-// Copyright 2012 Francisco Jerez
-//
-// Permission is hereby granted, free of charge, to any person obtaining a
-// copy of this software and associated documentation files (the "Software"),
-// to deal in the Software without restriction, including without limitation
-// the rights to 

[Mesa-dev] [PATCH v4 05/20] clover: Add an helper for checking if an IR is supported

[Pierre Moreau]

Reviewed-by: Aaron Watry 
Signed-off-by: Pierre Moreau 
---

Notes:
v3:
* Dropped supported_irs() (Francisco Jerez)
* Changed supports_ir() argument type to `enum pipe_shader_ir` (Francisco 
Jerez)

 src/gallium/state_trackers/clover/core/device.cpp | 6 ++
 src/gallium/state_trackers/clover/core/device.hpp | 1 +
 2 files changed, 7 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index 0d911e3751..62d5221bf8 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -280,3 +280,9 @@ device::device_clc_version() const {
  debug_get_option("CLOVER_DEVICE_CLC_VERSION_OVERRIDE", "1.1");
return device_clc_version;
 }
+
+bool
+device::supports_ir(enum pipe_shader_ir ir) const {
+   return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
+ PIPE_SHADER_CAP_SUPPORTED_IRS) & (1 << ir);
+}
diff --git a/src/gallium/state_trackers/clover/core/device.hpp 
b/src/gallium/state_trackers/clover/core/device.hpp
index 85cd031676..ebe15f28e9 100644
--- a/src/gallium/state_trackers/clover/core/device.hpp
+++ b/src/gallium/state_trackers/clover/core/device.hpp
@@ -82,6 +82,7 @@ namespace clover {
   enum pipe_shader_ir ir_format() const;
   std::string ir_target() const;
   enum pipe_endian endianness() const;
+  bool supports_ir(enum pipe_shader_ir ir) const;
 
   friend class command_queue;
   friend class root_resource;
-- 
2.16.2

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[Mesa-dev] [Bug 77449] Tracker bug for all bugs related to Steam titles

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=77449
Bug 77449 depends on bug 98856, which changed state.

Bug 98856 Summary: DIRT: Showdown broken graphics with Mesa built with -Ofast
https://bugs.freedesktop.org/show_bug.cgi?id=98856

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |NOTABUG

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[Mesa-dev] [PATCH crucible 2/3] Add support for non-packed strides in cru_image.

[Bas Nieuwenhuizen]

From: Bas Nieuwenhuizen 

In vulkan linear images can have a stride that is larger than the
width, which impacts the utility functions from cru_image.
---
 include/tapi/t_image.h   | 12 
 include/util/cru_image.h |  8 
 src/framework/test/t_image.c | 15 +++
 src/util/cru_image.c | 22 --
 src/util/cru_image.h |  5 -
 src/util/cru_pixel_image.c   | 30 +-
 src/util/cru_png_image.c |  9 +++--
 src/util/cru_vk_image.c  |  2 +-
 8 files changed, 80 insertions(+), 23 deletions(-)

diff --git a/include/tapi/t_image.h b/include/tapi/t_image.h
index 77a6ed6..71a22d4 100644
--- a/include/tapi/t_image.h
+++ b/include/tapi/t_image.h
@@ -64,3 +64,15 @@ t_new_cru_image_from_vk_image(VkDevice dev, VkQueue queue, 
VkImage image,
 malloclike cru_image_t *
 t_new_cru_image_from_pixels(void *restrict pixels, VkFormat format,
 uint32_t width, uint32_t height);
+
+/// \brief Create a Crucible image from an array of pixels.
+///
+/// This is a wrapper around cru_image_from_pixels_with_stride(). On success,
+/// the new image is pushed onto the test thread's cleanup stack.  On failure,
+/// the test fails.
+///
+/// \see cru_image_from_from_pixels_with_stride()
+malloclike cru_image_t *
+t_new_cru_image_from_pixels_with_stride(void *restrict pixels, VkFormat format,
+uint32_t width, uint32_t height,
+uint32_t stride);
diff --git a/include/util/cru_image.h b/include/util/cru_image.h
index 48db399..ef63008 100644
--- a/include/util/cru_image.h
+++ b/include/util/cru_image.h
@@ -66,6 +66,14 @@ malloclike cru_image_t *
 cru_image_from_pixels(void *restrict pixels, VkFormat format,
   uint32_t width, uint32_t height);
 
+/// \brief Create a Crucible image from an array of pixels.
+///
+/// If writing a test, consider using 
t_new_cru_image_from_pixels_with_stride(),
+/// which has a simpler interface.
+malloclike cru_image_t *
+cru_image_from_pixels_with_stride(void *restrict pixels, VkFormat format,
+  uint32_t width, uint32_t height,
+  uint32_t stride);
 
 /// \brief Create a Crucible image from a file.
 ///
diff --git a/src/framework/test/t_image.c b/src/framework/test/t_image.c
index 266ce6d..01cb91e 100644
--- a/src/framework/test/t_image.c
+++ b/src/framework/test/t_image.c
@@ -70,3 +70,18 @@ t_new_cru_image_from_pixels(void *restrict pixels, VkFormat 
format,
 
 return cimg;
 }
+
+malloclike cru_image_t *
+t_new_cru_image_from_pixels_with_stride(void *restrict pixels, VkFormat format,
+uint32_t width, uint32_t height, 
uint32_t stride)
+{
+t_thread_yield();
+
+cru_image_t *cimg = cru_image_from_pixels_with_stride(pixels, format, 
width, height, stride);
+if (!cimg)
+t_failf("%s: failed to create image", __func__);
+
+t_cleanup_push_cru_image(cimg);
+
+return cimg;
+}
diff --git a/src/util/cru_image.c b/src/util/cru_image.c
index 7860ad3..1e9bd98 100644
--- a/src/util/cru_image.c
+++ b/src/util/cru_image.c
@@ -90,7 +90,7 @@ cru_image_get_format(cru_image_t *image)
 bool
 cru_image_init(cru_image_t *image, enum cru_image_type type,
VkFormat format, uint32_t width, uint32_t height,
-   bool read_only)
+   bool read_only, uint32_t stride)
 {
 cru_refcount_init(>refcount);
 
@@ -115,6 +115,8 @@ cru_image_init(cru_image_t *image, enum cru_image_type type,
 image->type = type;
 image->read_only = read_only;
 
+image->stride = stride ? stride : image->format_info->cpp * width;
+
 return true;
 }
 
@@ -299,12 +301,6 @@ cru_image_copy_pixels_to_pixels(cru_image_t *dest, 
cru_image_t *src)
 const uint32_t width = src->width;
 const uint32_t height = src->height;
 
-const uint32_t src_cpp = src->format_info->cpp;
-const uint32_t src_stride = src_cpp * width;
-
-const uint32_t dest_cpp = dest->format_info->cpp;
-const uint32_t dest_stride = dest_cpp * width;
-
 assert(!dest->read_only);
 
 // Extent equality is enforced by cru_image_check_compatible().
@@ -320,7 +316,7 @@ cru_image_copy_pixels_to_pixels(cru_image_t *dest, 
cru_image_t *src)
 goto fail_map_dest_pixels;
 
 if (src->format_info == dest->format_info
-&& src_stride == dest_stride) {
+&& src->stride == dest->stride) {
 copy_func = copy_oneshot_memcpy;
 } else if (src_format == VK_FORMAT_R8_UNORM &&
dest_format == VK_FORMAT_D32_SFLOAT) {
@@ -340,8 +336,8 @@ cru_image_copy_pixels_to_pixels(cru_image_t *dest, 
cru_image_t *src)
 }
 
 result = copy_func(width, height,
-   src_pixels, 0, 0, src_stride,
-   dest_pixels, 0, 0, dest_stride);
+   src_pixels, 0, 0, src->stride,
+ 

[Mesa-dev] [PATCH crucible 3/3] Handle pitch != width with linear images in miptree tests.

[Bas Nieuwenhuizen]

From: Bas Nieuwenhuizen 

We basically split the loop so we create the images before
allocation, as well pass on the pitch to the cru_images for
the comparison.
---
 src/tests/func/miptree/miptree.c | 181 ---
 1 file changed, 130 insertions(+), 51 deletions(-)

diff --git a/src/tests/func/miptree/miptree.c b/src/tests/func/miptree/miptree.c
index b9a73c5..0fe989e 100644
--- a/src/tests/func/miptree/miptree.c
+++ b/src/tests/func/miptree/miptree.c
@@ -114,7 +114,8 @@ struct mipslice {
 uint32_t height;
 uint32_t depth;
 
-uint32_t buffer_offset;
+uint32_t src_buffer_offset;
+uint32_t dst_buffer_offset;
 
 VkImage src_vk_image;
 VkImage dest_vk_image;
@@ -505,42 +506,14 @@ miptree_create(void)
 },
 .tiling = VK_IMAGE_TILING_OPTIMAL,
 .usage = usage_bits);
-VkBuffer src_buffer = qoCreateBuffer(t_device,
-.size = buffer_size,
-.usage = VK_BUFFER_USAGE_TRANSFER_SRC_BIT);
-VkBuffer dest_buffer = qoCreateBuffer(t_device,
-.size = buffer_size,
-.usage = VK_BUFFER_USAGE_TRANSFER_SRC_BIT);
-
-VkDeviceMemory image_mem = qoAllocImageMemory(t_device, image,
-.properties = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT);
-VkDeviceMemory src_buffer_mem = qoAllocBufferMemory(t_device, src_buffer,
-.properties = VK_MEMORY_PROPERTY_HOST_COHERENT_BIT);
-VkDeviceMemory dest_buffer_mem = qoAllocBufferMemory(t_device, dest_buffer,
-.properties = VK_MEMORY_PROPERTY_HOST_COHERENT_BIT);
-
-void *src_buffer_map = qoMapMemory(t_device, src_buffer_mem,
-   /*offset*/ 0, buffer_size, 0);
-void *dest_buffer_map = qoMapMemory(t_device, dest_buffer_mem,
-/*offset*/ 0, buffer_size, 0);
 
-qoBindImageMemory(t_device, image, image_mem, /*offset*/ 0);
-qoBindBufferMemory(t_device, src_buffer, src_buffer_mem, /*offset*/ 0);
-qoBindBufferMemory(t_device, dest_buffer, dest_buffer_mem, /*offset*/ 0);
-
-miptree_t *mt = xzalloc(sizeof(*mt));
-t_cleanup_push_callback((cru_cleanup_callback_func_t) miptree_destroy, mt);
-
-mt->image = image;
-mt->src_buffer = src_buffer;
-mt->dest_buffer = dest_buffer;
-mt->width = width;
-mt->height = height;
-mt->levels = levels;
-mt->array_length = array_length;
-cru_vec_init(>mipslices);
-
-uint32_t buffer_offset = 0;
+uint32_t src_buffer_offset = 0;
+uint32_t dst_buffer_offset = 0;
+VkImage src_images[levels * MAX(depth, array_length)];
+VkImage dst_images[levels * MAX(depth, array_length)];
+uint32_t src_buffer_offsets[levels * MAX(depth, array_length)];
+uint32_t dst_buffer_offsets[levels * MAX(depth, array_length)];
+unsigned image_idx = 0;
 
 for (uint32_t l = 0; l < levels; ++l) {
 const uint32_t level_width = cru_minify(width, l);
@@ -553,9 +526,6 @@ miptree_create(void)
 const uint32_t num_layers = MAX(level_depth, array_length);
 
 for (uint32_t layer = 0; layer < num_layers; ++layer) {
-void *src_pixels = src_buffer_map + buffer_offset;
-void *dest_pixels = dest_buffer_map + buffer_offset;
-
 uint32_t src_usage, dest_usage;
 VkFormat dest_format;
 VkImage src_vk_image;
@@ -593,8 +563,6 @@ miptree_create(void)
 },
 .tiling = VK_IMAGE_TILING_LINEAR,
 .usage = src_usage);
-qoBindImageMemory(t_device, src_vk_image, src_buffer_mem,
-  buffer_offset);
 break;
 }
 
@@ -632,11 +600,121 @@ miptree_create(void)
 },
 .tiling = VK_IMAGE_TILING_LINEAR,
 .usage = dest_usage);
-qoBindImageMemory(t_device, dest_vk_image, dest_buffer_mem,
-  buffer_offset);
 break;
 }
 
+if (src_vk_image) {
+VkMemoryRequirements requirements;
+requirements = qoGetImageMemoryRequirements(t_device, 
src_vk_image);
+src_buffer_offset = (src_buffer_offset + 
requirements.alignment - 1) / requirements.alignment * requirements.alignment;
+src_buffer_offsets[image_idx] = src_buffer_offset;
+src_buffer_offset += requirements.size;
+} else {
+src_buffer_offsets[image_idx] = src_buffer_offset;
+src_buffer_offset += cpp * level_width * level_height;
+}
+
+if (dest_vk_image) {
+VkMemoryRequirements requirements;
+requirements = qoGetImageMemoryRequirements(t_device, 
dest_vk_image);
+dst_buffer_offset = (dst_buffer_offset + 
requirements.alignment - 1) / requirements.alignment * requirements.alignment;
+dst_buffer_offsets[image_idx] = 

[Mesa-dev] [PATCH crucible 1/3] Add qoGetImageSubresourceLayout.

[Bas Nieuwenhuizen]

From: Bas Nieuwenhuizen 

---
 include/qonos/qonos.h |  4 
 src/qonos/qonos.c | 10 ++
 2 files changed, 14 insertions(+)

diff --git a/include/qonos/qonos.h b/include/qonos/qonos.h
index ca1999f..2755cc0 100644
--- a/include/qonos/qonos.h
+++ b/include/qonos/qonos.h
@@ -275,6 +275,10 @@ VkResult qoBindBufferMemory(VkDevice device, VkBuffer 
buffer,
 VkResult qoBindImageMemory(VkDevice device, VkImage img,
VkDeviceMemory mem, VkDeviceSize offset);
 
+
+VkSubresourceLayout qoGetImageSubresourceLayout(VkDevice device, VkImage image,
+const VkImageSubresource 
*subresource);
+
 #ifdef DOXYGEN
 VkDeviceMemory qoAllocMemory(VkDevice dev, ...);
 #else
diff --git a/src/qonos/qonos.c b/src/qonos/qonos.c
index 4f0236c..812916d 100644
--- a/src/qonos/qonos.c
+++ b/src/qonos/qonos.c
@@ -93,6 +93,16 @@ qoBindImageMemory(VkDevice device, VkImage image,
 return result;
 }
 
+VkSubresourceLayout qoGetImageSubresourceLayout(VkDevice device, VkImage image,
+const VkImageSubresource 
*subresource)
+{
+VkSubresourceLayout layout;
+
+vkGetImageSubresourceLayout(device, image, subresource, );
+
+return layout;
+}
+
 VkResult
 qoQueueSubmit(VkQueue queue, uint32_t cmdBufferCount,
   const VkCommandBuffer *commandBuffers, VkFence fence)
-- 
2.16.1

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Re: [Mesa-dev] [PATCH v4 2/2] gallium/winsys/kms: Add support for multi-planes

[Lepton Wu]

For this patch, actually it's as same as V3. But since it depends on
the 1st patch, I also update the title to V4.

On Wed, Mar 7, 2018 at 2:39 PM, Lepton Wu  wrote:
> Add a new struct kms_sw_plane which delegate a plane and use it
> in place of sw_displaytarget. Multiple planes share same underlying
> kms_sw_displaytarget.
>
> Change-Id: I0e9ca1d0ba0aa78c27dfdb50c30dc0c424fec172
> Signed-off-by: Lepton Wu 
> ---
>  .../winsys/sw/kms-dri/kms_dri_sw_winsys.c | 162 +-
>  1 file changed, 122 insertions(+), 40 deletions(-)
>
> diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 
> b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
> index 7fc40488c2e..ec3c9d9d29e 100644
> --- a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
> +++ b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
> @@ -59,13 +59,22 @@
>  #define DEBUG_PRINT(msg, ...)
>  #endif
>
> +struct kms_sw_displaytarget;
>
> -struct kms_sw_displaytarget
> +struct kms_sw_plane
>  {
> -   enum pipe_format format;
> unsigned width;
> unsigned height;
> unsigned stride;
> +   unsigned offset;
> +   int mapped;
> +   struct kms_sw_displaytarget *dt;
> +   struct list_head link;
> +};
> +
> +struct kms_sw_displaytarget
> +{
> +   enum pipe_format format;
> unsigned size;
>
> uint32_t handle;
> @@ -74,6 +83,7 @@ struct kms_sw_displaytarget
>
> int ref_count;
> struct list_head link;
> +   struct list_head planes;
>  };
>
>  struct kms_sw_winsys
> @@ -84,10 +94,16 @@ struct kms_sw_winsys
> struct list_head bo_list;
>  };
>
> -static inline struct kms_sw_displaytarget *
> -kms_sw_displaytarget( struct sw_displaytarget *dt )
> +static inline struct kms_sw_plane *
> +kms_sw_plane( struct sw_displaytarget *dt )
>  {
> -   return (struct kms_sw_displaytarget *)dt;
> +   return (struct kms_sw_plane *)dt;
> +}
> +
> +static inline struct sw_displaytarget *
> +sw_displaytarget( struct kms_sw_plane *pl)
> +{
> +   return (struct sw_displaytarget *)pl;
>  }
>
>  static inline struct kms_sw_winsys *
> @@ -106,6 +122,39 @@ kms_sw_is_displaytarget_format_supported( struct 
> sw_winsys *ws,
> return TRUE;
>  }
>
> +static struct kms_sw_plane *get_plane(struct kms_sw_displaytarget *kms_sw_dt,
> +  enum pipe_format format,
> +  unsigned width, unsigned height,
> +  unsigned stride, unsigned offset)
> +{
> +   struct kms_sw_plane *plane = NULL;
> +
> +   if (offset + util_format_get_2d_size(format, stride, height) >
> +   kms_sw_dt->size) {
> +  DEBUG_PRINT("KMS-DEBUG: plane too big. format: %d stride: %d height: 
> %d "
> +  "offset: %d size:%d\n", format, stride, height, offset,
> +  kms_sw_dt->size);
> +  return NULL;
> +   }
> +
> +   LIST_FOR_EACH_ENTRY(plane, _sw_dt->planes, link) {
> +  if (plane->offset == offset)
> + return plane;
> +   }
> +
> +   plane = CALLOC_STRUCT(kms_sw_plane);
> +   if (!plane)
> +  return NULL;
> +
> +   plane->width = width;
> +   plane->height = height;
> +   plane->stride = stride;
> +   plane->offset = offset;
> +   plane->dt = kms_sw_dt;
> +   list_add(>link, _sw_dt->planes);
> +   return plane;
> +}
> +
>  static struct sw_displaytarget *
>  kms_sw_displaytarget_create(struct sw_winsys *ws,
>  unsigned tex_usage,
> @@ -125,11 +174,10 @@ kms_sw_displaytarget_create(struct sw_winsys *ws,
> if (!kms_sw_dt)
>goto no_dt;
>
> +   list_inithead(_sw_dt->planes);
> kms_sw_dt->ref_count = 1;
>
> kms_sw_dt->format = format;
> -   kms_sw_dt->width = width;
> -   kms_sw_dt->height = height;
>
> memset(_req, 0, sizeof(create_req));
> create_req.bpp = 32;
> @@ -139,16 +187,19 @@ kms_sw_displaytarget_create(struct sw_winsys *ws,
> if (ret)
>goto free_bo;
>
> -   kms_sw_dt->stride = create_req.pitch;
> kms_sw_dt->size = create_req.size;
> kms_sw_dt->handle = create_req.handle;
> +   struct kms_sw_plane *plane = get_plane(kms_sw_dt, format, width, height,
> +  create_req.pitch, 0);
> +   if (!plane)
> +  goto free_bo;
>
> list_add(_sw_dt->link, _sw->bo_list);
>
> DEBUG_PRINT("KMS-DEBUG: created buffer %u (size %u)\n", 
> kms_sw_dt->handle, kms_sw_dt->size);
>
> -   *stride = kms_sw_dt->stride;
> -   return (struct sw_displaytarget *)kms_sw_dt;
> +   *stride = create_req.pitch;
> +   return sw_displaytarget(plane);
>
>   free_bo:
> memset(_req, 0, sizeof destroy_req);
> @@ -164,7 +215,8 @@ kms_sw_displaytarget_destroy(struct sw_winsys *ws,
>   struct sw_displaytarget *dt)
>  {
> struct kms_sw_winsys *kms_sw = kms_sw_winsys(ws);
> -   struct kms_sw_displaytarget *kms_sw_dt = kms_sw_displaytarget(dt);
> +   struct kms_sw_plane *plane = kms_sw_plane(dt);
> +   struct kms_sw_displaytarget *kms_sw_dt = plane->dt;
> 

[Mesa-dev] [PATCH 2/2] ac/radeonsi: add emit_kill to the abi

[Timothy Arceri]

This should fix a regression with Rocket League grass rendering
on the NIR backend.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104717
---
 src/amd/common/ac_nir_to_llvm.c  | 9 -
 src/amd/common/ac_shader_abi.h   | 2 ++
 src/gallium/drivers/radeonsi/si_shader.c | 1 +
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 425970e609..e70e0c5488 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3844,6 +3844,12 @@ static void emit_barrier(struct ac_llvm_context *ac, 
gl_shader_stage stage)
   ac->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
 }
 
+static void radv_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible)
+{
+   struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
+   ac_build_kill_if_false(>ac, visible);
+}
+
 static void emit_discard(struct ac_nir_context *ctx,
 const nir_intrinsic_instr *instr)
 {
@@ -3858,7 +3864,7 @@ static void emit_discard(struct ac_nir_context *ctx,
cond = LLVMConstInt(ctx->ac.i1, false, 0);
}
 
-   ac_build_kill_if_false(>ac, cond);
+   ctx->abi->emit_kill(ctx->abi, cond);
 }
 
 static LLVMValueRef
@@ -6888,6 +6894,7 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
ctx.abi.lookup_interp_param = lookup_interp_param;
ctx.abi.load_sample_position = load_sample_position;
ctx.abi.load_sample_mask_in = load_sample_mask_in;
+   ctx.abi.emit_kill = radv_emit_kill;
}
 
if (i)
diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index ccf26648a2..4a29e0eb13 100644
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -86,6 +86,8 @@ struct ac_shader_abi {
void (*emit_primitive)(struct ac_shader_abi *abi,
   unsigned stream);
 
+   void (*emit_kill)(struct ac_shader_abi *abi, LLVMValueRef visible);
+
LLVMValueRef (*load_inputs)(struct ac_shader_abi *abi,
unsigned location,
unsigned driver_location,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 2e57eca6e5..306784aff4 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -6058,6 +6058,7 @@ static bool si_compile_tgsi_main(struct si_shader_context 
*ctx,
ctx->abi.lookup_interp_param = si_nir_lookup_interp_param;
ctx->abi.load_sample_position = load_sample_position;
ctx->abi.load_sample_mask_in = load_sample_mask_in;
+   ctx->abi.emit_kill = si_llvm_emit_kill;
break;
case PIPE_SHADER_COMPUTE:
ctx->abi.load_local_group_size = get_block_size;
-- 
2.14.3

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[Mesa-dev] [PATCH 1/2] radeonsi: add si_llvm_emit_kill() helper

[Timothy Arceri]

---
 src/gallium/drivers/radeonsi/si_shader_internal.h |  2 ++
 src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 31 ++-
 2 files changed, 21 insertions(+), 12 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h 
b/src/gallium/drivers/radeonsi/si_shader_internal.h
index 92ab11d0af..a03fde2644 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -260,6 +260,8 @@ LLVMValueRef si_llvm_emit_fetch(struct 
lp_build_tgsi_context *bld_base,
enum tgsi_opcode_type type,
unsigned swizzle);
 
+void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible);
+
 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
   LLVMTypeRef type,
   LLVMValueRef vertex_index,
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c 
b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index 201e4988fa..854f7ec8a6 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -53,20 +53,10 @@ static void kill_if_fetch_args(struct lp_build_tgsi_context 
*bld_base,
emit_data->args[0] = conds[0];
 }
 
-static void kil_emit(const struct lp_build_tgsi_action *action,
-struct lp_build_tgsi_context *bld_base,
-struct lp_build_emit_data *emit_data)
+void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible)
 {
-   struct si_shader_context *ctx = si_shader_context(bld_base);
+   struct si_shader_context *ctx = si_shader_context_from_abi(abi);
LLVMBuilderRef builder = ctx->ac.builder;
-   LLVMValueRef visible;
-
-   if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF) {
-   visible = emit_data->args[0];
-   } else {
-   assert(emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL);
-   visible = LLVMConstInt(ctx->i1, false, 0);
-   }
 
if (ctx->shader->selector->force_correct_derivs_after_kill) {
/* LLVM 6.0 can kill immediately while maintaining WQM. */
@@ -84,6 +74,23 @@ static void kil_emit(const struct lp_build_tgsi_action 
*action,
ac_build_kill_if_false(>ac, visible);
 }
 
+static void kil_emit(const struct lp_build_tgsi_action *action,
+struct lp_build_tgsi_context *bld_base,
+struct lp_build_emit_data *emit_data)
+{
+   struct si_shader_context *ctx = si_shader_context(bld_base);
+   LLVMValueRef visible;
+
+   if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF) {
+   visible = emit_data->args[0];
+   } else {
+   assert(emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL);
+   visible = LLVMConstInt(ctx->i1, false, 0);
+   }
+
+   si_llvm_emit_kill(>abi, visible);
+}
+
 static void emit_icmp(const struct lp_build_tgsi_action *action,
  struct lp_build_tgsi_context *bld_base,
  struct lp_build_emit_data *emit_data)
-- 
2.14.3

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[Mesa-dev] [Bug 104836] Missing library link breaks mesa on Debian/ia64

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104836

Timothy Arceri  changed:

   What|Removed |Added

 Status|NEW |ASSIGNED
   Assignee|mesa-dev@lists.freedesktop. |emil.l.veli...@gmail.com
   |org |

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Re: [Mesa-dev] [PATCH 1/2] autotools: add vtn_amd.c to sources

[Timothy Arceri]

Look like I should have check the list before sending a patch.

Please add the following to the commit message. Otherwise Reviewed-by: 
Timothy Arceri 


Fixes: 68a6a3b51acc "spirv: handle AMD_gcn_shader extended instructions"

On 08/03/18 10:13, Dylan Baker wrote:

cc: Emil Veliov 
Signed-off-by: Dylan Baker 
---
  src/compiler/Makefile.sources | 1 +
  1 file changed, 1 insertion(+)

diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index 841bc8fec91..37340ba809e 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -301,6 +301,7 @@ SPIRV_FILES = \
spirv/spirv_info.h \
spirv/spirv_to_nir.c \
spirv/vtn_alu.c \
+   spirv/vtn_amd.c \
spirv/vtn_cfg.c \
spirv/vtn_glsl450.c \
spirv/vtn_private.h \


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[Mesa-dev] [PATCH v4 20/20] clover: Implement clCreateProgramWithIL from OpenCL 2.1

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Notes:
v3: Remove the const from the length argument of clCreateProgramWithIL

 src/gallium/state_trackers/clover/api/dispatch.cpp | 2 +-
 src/gallium/state_trackers/clover/api/program.cpp  | 8 
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/api/dispatch.cpp 
b/src/gallium/state_trackers/clover/api/dispatch.cpp
index 8be4d3cb26..f5f3248f26 100644
--- a/src/gallium/state_trackers/clover/api/dispatch.cpp
+++ b/src/gallium/state_trackers/clover/api/dispatch.cpp
@@ -162,7 +162,7 @@ namespace clover {
   NULL, // clSetKernelExecInfo
   NULL, // clGetKernelSubGroupInfoKHR
   NULL, // clCloneKernel
-  NULL, // clCreateProgramWithIL
+  clCreateProgramWithIL,
   NULL, // clEnqueueSVMMigrateMem
   NULL, // clGetDeviceAndHostTimer
   NULL, // clGetHostTimer
diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 2501d0bc07..25ee5faae2 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -212,6 +212,14 @@ clover::CreateProgramWithILKHR(cl_context d_ctx, const 
void *il,
return NULL;
 }
 
+CLOVER_API cl_program
+clCreateProgramWithIL(cl_context d_ctx,
+  const void *il,
+  size_t length,
+  cl_int *r_errcode) {
+   return CreateProgramWithILKHR(d_ctx, il, length, r_errcode);
+}
+
 CLOVER_API cl_program
 clCreateProgramWithBuiltInKernels(cl_context d_ctx, cl_uint n,
   const cl_device_id *d_devs,
-- 
2.16.2

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[Mesa-dev] [Bug 53426] out-of-bounds access src/mesa/main/fbobject:222

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=53426

Timothy Arceri  changed:

   What|Removed |Added

   Assignee|mesa-dev@lists.freedesktop. |v...@freedesktop.org
   |org |
 Status|NEW |ASSIGNED

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Re: [Mesa-dev] [PATCH 04/56] anv/entrypoints: Generalize the string map a bit

[Dylan Baker]

Quoting Jason Ekstrand (2018-03-07 06:34:52)
> The original string map assumed that the mapping from strings to
> entrypoints was a bijection.  This will not be true the moment we
> add entrypoint aliasing.  This reworks things to be an arbitrary map
> from strings to non-negative signed integers.  The old one also had a
> potential bug if we ever had a hash collision because it didn't do the
> strcmp inside the lookup loop.  While we're at it, we break things out
> into a helpful class.
> 
> Reviewed-by: Lionel Landwerlin 
> Reviewed-by: Samuel Iglesias Gonsálvez 
> ---
>  src/intel/vulkan/anv_entrypoints_gen.py | 188 
> +---
>  1 file changed, 103 insertions(+), 85 deletions(-)
> 
> diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
> b/src/intel/vulkan/anv_entrypoints_gen.py
> index 34ffedb..dc0f0e9 100644
> --- a/src/intel/vulkan/anv_entrypoints_gen.py
> +++ b/src/intel/vulkan/anv_entrypoints_gen.py
> @@ -115,9 +115,10 @@ TEMPLATE_C = Template(u"""\
>  
>  #include "anv_private.h"
>  
> -struct anv_entrypoint {
> +struct string_map_entry {
> uint32_t name;
> uint32_t hash;
> +   uint32_t num;
>  };
>  
>  /* We use a big string constant to avoid lots of reloctions from the entry
> @@ -126,17 +127,60 @@ struct anv_entrypoint {
>   */
>  
>  static const char strings[] =
> -% for e in entrypoints:
> -"${e.name}\\0"
> +% for s in strmap.sorted_strings:
> +"${s.string}\\0"
>  % endfor
>  ;
>  
> -static const struct anv_entrypoint entrypoints[] = {
> -% for e in entrypoints:
> -[${e.num}] = { ${offsets[e.num]}, ${'{:0=#8x}'.format(e.get_c_hash())} 
> }, /* ${e.name} */
> +static const struct string_map_entry string_map_entries[] = {
> +% for s in strmap.sorted_strings:
> +{ ${s.offset}, ${'{:0=#8x}'.format(s.hash)}, ${s.num} }, /* ${s.string} 
> */
>  % endfor
>  };
>  
> +/* Hash table stats:
> + * size ${len(strmap.sorted_strings)} entries
> + * collisions entries:
> +% for i in xrange(10):
> + * ${i}${'+' if i == 9 else ' '} ${strmap.collisions[i]}
> +% endfor
> + */
> +
> +#define none 0x
> +static const uint16_t string_map[${strmap.hash_size}] = {
> +% for e in strmap.mapping:
> +${ '{:0=#6x}'.format(e) if e >= 0 else 'none' },
> +% endfor
> +};
> +
> +static int
> +string_map_lookup(const char *str)
> +{
> +static const uint32_t prime_factor = ${strmap.prime_factor};
> +static const uint32_t prime_step = ${strmap.prime_step};
> +const struct string_map_entry *e;
> +uint32_t hash, h;
> +uint16_t i;
> +const char *p;
> +
> +hash = 0;
> +for (p = str; *p; p++)
> +hash = hash * prime_factor + *p;
> +
> +h = hash;
> +while (1) {
> +i = string_map[h & ${strmap.hash_mask}];
> +if (i == none)
> +   return -1;
> +e = _map_entries[i];
> +if (e->hash == hash && strcmp(str, strings + e->name) == 0)
> +return e->num;
> +h += prime_step;
> +}
> +
> +return -1;
> +}
> +
>  /* Weak aliases for all potential implementations. These will resolve to
>   * NULL if they're not defined, which lets the resolve_entrypoint() function
>   * either pick the correct entry point.
> @@ -275,54 +319,10 @@ anv_resolve_entrypoint(const struct gen_device_info 
> *devinfo, uint32_t index)
>return anv_dispatch_table.entrypoints[index];
>  }
>  
> -/* Hash table stats:
> - * size ${hash_size} entries
> - * collisions entries:
> -% for i in xrange(10):
> - * ${i}${'+' if i == 9 else ''} ${collisions[i]}
> -% endfor
> - */
> -
> -#define none ${'{:#x}'.format(none)}
> -static const uint16_t map[] = {
> -% for i in xrange(0, hash_size, 8):
> -  % for j in xrange(i, i + 8):
> -## This is 6 because the 0x is counted in the length
> -% if mapping[j] & 0x == 0x:
> -  none,
> -% else:
> -  ${'{:0=#6x}'.format(mapping[j] & 0x)},
> -% endif
> -  % endfor
> -% endfor
> -};
> -
>  int
>  anv_get_entrypoint_index(const char *name)
>  {
> -   static const uint32_t prime_factor = ${prime_factor};
> -   static const uint32_t prime_step = ${prime_step};
> -   const struct anv_entrypoint *e;
> -   uint32_t hash, h, i;
> -   const char *p;
> -
> -   hash = 0;
> -   for (p = name; *p; p++)
> -  hash = hash * prime_factor + *p;
> -
> -   h = hash;
> -   do {
> -  i = map[h & ${hash_mask}];
> -  if (i == none)
> - return -1;
> -  e = [i];
> -  h += prime_step;
> -   } while (e->hash != hash);
> -
> -   if (strcmp(name, strings + e->name) != 0)
> -  return -1;
> -
> -   return i;
> +   return string_map_lookup(name);
>  }
>  
>  void *
> @@ -334,7 +334,6 @@ anv_lookup_entrypoint(const struct gen_device_info 
> *devinfo, const char *name)
> return anv_resolve_entrypoint(devinfo, idx);
>  }""", output_encoding='utf-8')
>  
> -NONE = 0x
>  HASH_SIZE = 256
>  U32_MASK = 2**32 - 1
>  HASH_MASK = HASH_SIZE - 1
> @@ -342,11 +341,54 @@ 

[Mesa-dev] [PATCH 6/9] swr/rast: Add tracking for stream out topology

[George Kyriazis]

---
 src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp | 6 +++---
 src/gallium/drivers/swr/rasterizer/archrast/events.proto | 1 +
 src/gallium/drivers/swr/rasterizer/archrast/events_private.proto | 2 ++
 src/gallium/drivers/swr/rasterizer/core/api.cpp  | 4 ++--
 4 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp 
b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
index af18b16..1f87dba 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
+++ b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
@@ -87,8 +87,8 @@ namespace ArchRast
 {
 DrawInfoEvent e(event.data.drawId, ArchRast::Instanced, 
event.data.topology, 
 event.data.numVertices, 0, 0, event.data.startVertex, 
event.data.numInstances, 
-event.data.startInstance, event.data.tsEnable, 
event.data.gsEnable, event.data.soEnable, event.data.splitId);
-
+event.data.startInstance, event.data.tsEnable, 
event.data.gsEnable, event.data.soEnable, event.data.soTopology, 
event.data.splitId);
+
 EventHandlerFile::Handle(e);
 }
 
@@ -96,7 +96,7 @@ namespace ArchRast
 {
 DrawInfoEvent e(event.data.drawId, ArchRast::IndexedInstanced, 
event.data.topology, 0,
 event.data.numIndices, event.data.indexOffset, 
event.data.baseVertex, event.data.numInstances,
-event.data.startInstance, event.data.tsEnable, 
event.data.gsEnable, event.data.soEnable, event.data.splitId);
+event.data.startInstance, event.data.tsEnable, 
event.data.gsEnable, event.data.soEnable, event.data.soTopology, 
event.data.splitId);
 
 EventHandlerFile::Handle(e);
 }
diff --git a/src/gallium/drivers/swr/rasterizer/archrast/events.proto 
b/src/gallium/drivers/swr/rasterizer/archrast/events.proto
index 45193a3..7d9a68d 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/events.proto
+++ b/src/gallium/drivers/swr/rasterizer/archrast/events.proto
@@ -51,6 +51,7 @@ event DrawInfoEvent
 uint32_t tsEnable;
 uint32_t gsEnable;
 uint32_t soEnable;
+uint32_t soTopology;
 uint32_t splitId; // Split draw count or id.
 };
 
diff --git a/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto 
b/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
index 760f7aa..f0a9310 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
+++ b/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
@@ -131,6 +131,7 @@ event DrawInstancedEvent
 uint32_t tsEnable;
 uint32_t gsEnable;
 uint32_t soEnable;
+uint32_t soTopology;
 uint32_t splitId; // Split draw count or id.
 };
 
@@ -146,5 +147,6 @@ event DrawIndexedInstancedEvent
 uint32_t tsEnable;
 uint32_t gsEnable;
 uint32_t soEnable;
+uint32_t soTopology;
 uint32_t splitId; // Split draw count or id.
 };
diff --git a/src/gallium/drivers/swr/rasterizer/core/api.cpp 
b/src/gallium/drivers/swr/rasterizer/core/api.cpp
index 86864f0..b252959 100644
--- a/src/gallium/drivers/swr/rasterizer/core/api.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/api.cpp
@@ -1221,7 +1221,7 @@ void DrawInstanced(
 QueueDraw(pContext);
 
 AR_API_EVENT(DrawInstancedEvent(pDC->drawId, topology, 
numVertsForDraw, startVertex, numInstances,
-startInstance, pState->tsState.tsEnable, pState->gsState.gsEnable, 
pState->soState.soEnable, draw));
+startInstance, pState->tsState.tsEnable, pState->gsState.gsEnable, 
pState->soState.soEnable, pState->gsState.outputTopology, draw));
 
 remainingVerts -= numVertsForDraw;
 draw++;
@@ -1366,7 +1366,7 @@ void DrawIndexedInstance(
 QueueDraw(pContext);
 
 AR_API_EVENT(DrawIndexedInstancedEvent(pDC->drawId, topology, 
numIndicesForDraw, indexOffset, baseVertex,
-numInstances, startInstance, pState->tsState.tsEnable, 
pState->gsState.gsEnable, pState->soState.soEnable, draw));
+numInstances, startInstance, pState->tsState.tsEnable, 
pState->gsState.gsEnable, pState->soState.soEnable, 
pState->gsState.outputTopology, draw));
 
 pIB += maxIndicesPerDraw * indexSize;
 remainingIndices -= numIndicesForDraw;
-- 
2.7.4

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[Mesa-dev] [PATCH 3/9] swr/rast: Add support for generalized late and early z/stencil stats

[George Kyriazis]

---
 .../drivers/swr/rasterizer/archrast/archrast.cpp   | 45 ++
 .../drivers/swr/rasterizer/archrast/events.proto   | 28 ++
 2 files changed, 73 insertions(+)

diff --git a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp 
b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
index 9186161..0728a85 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
+++ b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
@@ -90,6 +90,15 @@ namespace ArchRast
 //earlyStencil test compute
 mDSSingleSample.earlyStencilTestPassCount += 
_mm_popcnt_u32(event.data.stencilPassMask);
 mDSSingleSample.earlyStencilTestFailCount += 
_mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask);
+
+//earlyZ test single and multi sample
+mDSCombined.earlyZTestPassCount += 
_mm_popcnt_u32(event.data.depthPassMask);
+mDSCombined.earlyZTestFailCount += 
_mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask);
+
+//earlyStencil test single and multi sample
+mDSCombined.earlyStencilTestPassCount += 
_mm_popcnt_u32(event.data.stencilPassMask);
+mDSCombined.earlyStencilTestFailCount += 
_mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask);
+
 mNeedFlush = true;
 }
 
@@ -102,6 +111,15 @@ namespace ArchRast
 //earlyStencil test compute
 mDSSampleRate.earlyStencilTestPassCount += 
_mm_popcnt_u32(event.data.stencilPassMask);
 mDSSampleRate.earlyStencilTestFailCount += 
_mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask);
+
+//earlyZ test single and multi sample
+mDSCombined.earlyZTestPassCount  += 
_mm_popcnt_u32(event.data.depthPassMask);
+mDSCombined.earlyZTestFailCount += 
_mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask);
+
+//earlyStencil test single and multi sample
+mDSCombined.earlyStencilTestPassCount += 
_mm_popcnt_u32(event.data.stencilPassMask);
+mDSCombined.earlyStencilTestFailCount += 
_mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask);
+
 mNeedFlush = true;
 }
 
@@ -126,6 +144,15 @@ namespace ArchRast
 //lateStencil test compute
 mDSSingleSample.lateStencilTestPassCount += 
_mm_popcnt_u32(event.data.stencilPassMask);
 mDSSingleSample.lateStencilTestFailCount += 
_mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask);
+
+//lateZ test single and multi sample
+mDSCombined.lateZTestPassCount += 
_mm_popcnt_u32(event.data.depthPassMask);
+mDSCombined.lateZTestFailCount += 
_mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask);
+
+//lateStencil test single and multi sample
+mDSCombined.lateStencilTestPassCount += 
_mm_popcnt_u32(event.data.stencilPassMask);
+mDSCombined.lateStencilTestFailCount += 
_mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask);
+
 mNeedFlush = true;
 }
 
@@ -138,6 +165,16 @@ namespace ArchRast
 //lateStencil test compute
 mDSSampleRate.lateStencilTestPassCount += 
_mm_popcnt_u32(event.data.stencilPassMask);
 mDSSampleRate.lateStencilTestFailCount += 
_mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask);
+
+
+//lateZ test single and multi sample
+mDSCombined.lateZTestPassCount += 
_mm_popcnt_u32(event.data.depthPassMask);
+mDSCombined.lateZTestFailCount += 
_mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask);
+
+//lateStencil test single and multi sample
+mDSCombined.lateStencilTestPassCount += 
_mm_popcnt_u32(event.data.stencilPassMask);
+mDSCombined.lateStencilTestFailCount += 
_mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask);
+
 mNeedFlush = true;
 }
 
@@ -223,6 +260,12 @@ namespace ArchRast
 EventHandlerFile::Handle(EarlyStencilSampleRate(drawId, 
mDSSampleRate.earlyStencilTestPassCount, 
mDSSampleRate.earlyStencilTestFailCount));
 EventHandlerFile::Handle(LateStencilSampleRate(drawId, 
mDSSampleRate.lateStencilTestPassCount, 
mDSSampleRate.lateStencilTestFailCount));
 
+//combined
+EventHandlerFile::Handle(EarlyZ(drawId, 
mDSCombined.earlyZTestPassCount, mDSCombined.earlyZTestFailCount));
+EventHandlerFile::Handle(LateZ(drawId, 
mDSCombined.lateZTestPassCount, mDSCombined.lateZTestFailCount));
+EventHandlerFile::Handle(EarlyStencil(drawId, 
mDSCombined.earlyStencilTestPassCount, mDSCombined.earlyStencilTestFailCount));
+EventHandlerFile::Handle(LateStencil(drawId, 
mDSCombined.lateStencilTestPassCount, mDSCombined.lateStencilTestFailCount));
+
 

[Mesa-dev] [PATCH 2/9] swr/rast: Rasterized Subspans stats support

[George Kyriazis]

---
 src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp  | 15 +++
 src/gallium/drivers/swr/rasterizer/archrast/events.proto  |  6 ++
 .../drivers/swr/rasterizer/archrast/events_private.proto  |  6 ++
 src/gallium/drivers/swr/rasterizer/core/rasterizer_impl.h |  3 +++
 4 files changed, 30 insertions(+)

diff --git a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp 
b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
index 8c09411..9186161 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
+++ b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
@@ -68,6 +68,11 @@ namespace ArchRast
 uint32_t vertsInput;
 };
 
+struct RastStats
+{
+uint32_t rasterTiles = 0;
+};
+
 //
 /// @brief Event handler that saves stat events to event files. This
 ///handler filters out unwanted events.
@@ -227,12 +232,16 @@ namespace ArchRast
 EventHandlerFile::Handle(EarlyZNullPS(drawId, 
mDSNullPS.earlyZTestPassCount, mDSNullPS.earlyZTestFailCount));
 EventHandlerFile::Handle(EarlyStencilNullPS(drawId, 
mDSNullPS.earlyStencilTestPassCount, mDSNullPS.earlyStencilTestFailCount));
 
+// Rasterized Subspans
+EventHandlerFile::Handle(RasterTiles(drawId, 
rastStats.rasterTiles));
+
 //Reset Internal Counters
 mDSSingleSample = {};
 mDSSampleRate = {};
 mDSPixelRate = {};
 mDSNullPS = {};
 
+rastStats = {};
 mNeedFlush = false;
 }
 
@@ -267,6 +276,11 @@ namespace ArchRast
 mTS.inputPrims += event.data.primCount;
 }
 
+virtual void Handle(const RasterTileCount& event)
+{
+rastStats.rasterTiles += event.data.rasterTiles;
+}
+
 protected:
 bool mNeedFlush;
 // Per draw stats
@@ -278,6 +292,7 @@ namespace ArchRast
 CStats mClipper = {};
 TEStats mTS = {};
 GSStats mGS = {};
+RastStats rastStats = {};
 
 };
 
diff --git a/src/gallium/drivers/swr/rasterizer/archrast/events.proto 
b/src/gallium/drivers/swr/rasterizer/archrast/events.proto
index 638dfd0..4a71e0d 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/events.proto
+++ b/src/gallium/drivers/swr/rasterizer/archrast/events.proto
@@ -256,6 +256,12 @@ event TessPrims
 uint64_t primCount;
 };
 
+event RasterTiles
+{
+uint32_t drawId;
+uint32_t rastTileCount;
+};
+
 event ClipperEvent
 {
 uint32_t drawId;
diff --git a/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto 
b/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
index 8970141..a07c4a7 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
+++ b/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
@@ -95,6 +95,12 @@ event TessPrimCount
 uint64_t primCount;
 };
 
+event RasterTileCount
+{
+uint32_t drawId;
+uint64_t rasterTiles;
+};
+
 event GSPrimInfo
 {
 uint64_t inputPrimCount;
diff --git a/src/gallium/drivers/swr/rasterizer/core/rasterizer_impl.h 
b/src/gallium/drivers/swr/rasterizer/core/rasterizer_impl.h
index 62856cc..7f9b378 100644
--- a/src/gallium/drivers/swr/rasterizer/core/rasterizer_impl.h
+++ b/src/gallium/drivers/swr/rasterizer/core/rasterizer_impl.h
@@ -1268,6 +1268,9 @@ void RasterizeTriangle(DRAW_CONTEXT* pDC, uint32_t 
workerId, uint32_t macroTile,
 UnrollerL<1, RT::MT::numSamples, 1>::step(copyCoverage);
 }
 
+// Track rasterized subspans
+AR_EVENT(RasterTileCount(pDC->drawId, 1));
+
 RDTSC_BEGIN(BEPixelBackend, pDC->drawId);
 backendFuncs.pfnBackend(pDC, workerId, tileX << 
KNOB_TILE_X_DIM_SHIFT, tileY << KNOB_TILE_Y_DIM_SHIFT, triDesc, renderBuffers);
 RDTSC_END(BEPixelBackend, 0);
-- 
2.7.4

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[Mesa-dev] [PATCH 4/9] swr/rast: Refactor api and worker event handlers.

[George Kyriazis]

In the API event handler we want to share information between the core
layer and the API. Specifically, around associating various ids with
different kinds of events. For example, associate render pass id with
draw ids, or command buffer ids with draw ids.
---
 .../drivers/swr/rasterizer/archrast/archrast.cpp   | 86 +-
 .../drivers/swr/rasterizer/archrast/eventmanager.h |  1 +
 2 files changed, 52 insertions(+), 35 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp 
b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
index 0728a85..d5cffbb 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
+++ b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
@@ -74,12 +74,52 @@ namespace ArchRast
 };
 
 //
-/// @brief Event handler that saves stat events to event files. This
-///handler filters out unwanted events.
-class EventHandlerStatsFile : public EventHandlerFile
+/// @brief Event handler that handles API thread events. This is shared
+///between the API and its caller (e.g. driver shim) but typically
+///there is only a single API thread per context. So you can save
+///information in the class to be used for other events.
+class EventHandlerApiStats : public EventHandlerFile
 {
 public:
-EventHandlerStatsFile(uint32_t id) : EventHandlerFile(id), 
mNeedFlush(false) {}
+EventHandlerApiStats(uint32_t id) : EventHandlerFile(id) {}
+
+virtual void Handle(const DrawInstancedEvent& event)
+{
+DrawInfoEvent e(event.data.drawId, ArchRast::Instanced, 
event.data.topology, event.data.numVertices, 0, 0, event.data.startVertex, 
event.data.numInstances, event.data.startInstance);
+
+EventHandlerFile::Handle(e);
+}
+
+virtual void Handle(const DrawIndexedInstancedEvent& event)
+{
+DrawInfoEvent e(event.data.drawId, ArchRast::IndexedInstanced, 
event.data.topology, 0, event.data.numIndices, event.data.indexOffset, 
event.data.baseVertex, event.data.numInstances, event.data.startInstance);
+
+EventHandlerFile::Handle(e);
+}
+
+virtual void Handle(const DrawInstancedSplitEvent& event)
+{
+DrawInfoEvent e(event.data.drawId, ArchRast::InstancedSplit, 0, 0, 
0, 0, 0, 0, 0);
+
+EventHandlerFile::Handle(e);
+}
+
+virtual void Handle(const DrawIndexedInstancedSplitEvent& event)
+{
+DrawInfoEvent e(event.data.drawId, 
ArchRast::IndexedInstancedSplit, 0, 0, 0, 0, 0, 0, 0);
+
+EventHandlerFile::Handle(e);
+}
+};
+
+//
+/// @brief Event handler that handles worker thread events. There is one
+///event handler per thread. The python script will need to sum
+///up counters across all of the threads.
+class EventHandlerWorkerStats : public EventHandlerFile
+{
+public:
+EventHandlerWorkerStats(uint32_t id) : EventHandlerFile(id), 
mNeedFlush(false) {}
 
 virtual void Handle(const EarlyDepthStencilInfoSingleSample& event)
 {
@@ -215,34 +255,6 @@ namespace ArchRast
 mClipper.trivialAcceptCount += _mm_popcnt_u32(event.data.validMask 
& ~event.data.clipMask);
 }
 
-virtual void Handle(const DrawInstancedEvent& event)
-{
-DrawInfoEvent e(event.data.drawId, ArchRast::Instanced, 
event.data.topology, event.data.numVertices, 0, 0, event.data.startVertex, 
event.data.numInstances, event.data.startInstance);
-
-EventHandlerFile::Handle(e);
-}
-
-virtual void Handle(const DrawIndexedInstancedEvent& event)
-{
-DrawInfoEvent e(event.data.drawId, ArchRast::IndexedInstanced, 
event.data.topology, 0, event.data.numIndices, event.data.indexOffset, 
event.data.baseVertex, event.data.numInstances, event.data.startInstance);
-
-EventHandlerFile::Handle(e);
-}
-
-virtual void Handle(const DrawInstancedSplitEvent& event)
-{
-DrawInfoEvent e(event.data.drawId, ArchRast::InstancedSplit, 0, 0, 
0, 0, 0, 0, 0);
-
-EventHandlerFile::Handle(e);
-}
-
-virtual void Handle(const DrawIndexedInstancedSplitEvent& event)
-{
-DrawInfoEvent e(event.data.drawId, 
ArchRast::IndexedInstancedSplit, 0, 0, 0, 0, 0, 0, 0);
-
-EventHandlerFile::Handle(e);
-}
-
 // Flush cached events for this draw
 virtual void FlushDraw(uint32_t drawId)
 {
@@ -354,20 +366,24 @@ namespace ArchRast
 uint32_t id = counter.fetch_add(1);
 
 EventManager* pManager = new EventManager();
-EventHandlerFile* pHandler = new EventHandlerStatsFile(id);
 
-if (pManager && 

[Mesa-dev] [PATCH 1/9] swr/rast: Added comment

[George Kyriazis]

---
 src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp 
b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
index 67e415c..6fa60a1 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
@@ -137,6 +137,7 @@ namespace SwrJit
 }
 else
 {
+// maskload intrinsic expects integer mask operand in llvm >= 3.8
 mask = BITCAST(mask, VectorType::get(mInt32Ty, mVWidth));
 Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, 
Intrinsic::x86_avx_maskload_ps_256);
 vResult = BITCAST(CALL(func, { src,mask }), 
VectorType::get(mInt32Ty, mVWidth));
-- 
2.7.4

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[Mesa-dev] [PATCH 8/9] swr/rast: Add KNOB_DISABLE_SPLIT_DRAW

[George Kyriazis]

This is useful for archrast data collection. This greatly speeds up the
post processing script since there is significantly less events generated.

Finally, this is a simpler option to communicate to users than having
them directly adjust MAX_PRIMS_PER_DRAW and MAX_TESS_PRIMS_PER_DRAW.
---
 .../drivers/swr/rasterizer/codegen/knob_defs.py| 10 +
 src/gallium/drivers/swr/rasterizer/core/api.cpp| 24 ++
 2 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py 
b/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
index 2c6946b..d4bf193 100644
--- a/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
+++ b/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
@@ -270,4 +270,14 @@ KNOBS = [
 'category'  : 'perf_adv',
 }],
 
+['DISABLE_SPLIT_DRAW', {
+'type'  : 'bool',
+'default'   : 'false',
+'desc'  : ['Don\'t split large draws into smaller draws.,',
+   'MAX_PRIMS_PER_DRAW and MAX_TESS_PRIMS_PER_DRAW can be 
used to control split size.',
+   '',
+   'Useful to disable split draws for gathering archrast 
stats.'],
+'category'  : 'perf_adv',
+}],
+
 ]
diff --git a/src/gallium/drivers/swr/rasterizer/core/api.cpp 
b/src/gallium/drivers/swr/rasterizer/core/api.cpp
index b252959..53bd2d2 100644
--- a/src/gallium/drivers/swr/rasterizer/core/api.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/api.cpp
@@ -1077,13 +1077,27 @@ uint32_t MaxVertsPerDraw(
 {
 API_STATE& state = pDC->pState->state;
 
-uint32_t vertsPerDraw = totalVerts;
-
+// We can not split draws that have streamout enabled because there is no 
practical way
+// to support multiple threads generating SO data for a single set of 
buffers.
 if (state.soState.soEnable)
 {
 return totalVerts;
 }
 
+// The Primitive Assembly code can only handle 1 RECT at a time. Specified 
with only 3 verts.
+if (topology == TOP_RECT_LIST)
+{
+return 3;
+}
+
+// Is split drawing disabled?
+if (KNOB_DISABLE_SPLIT_DRAW)
+{
+return totalVerts;
+}
+
+uint32_t vertsPerDraw = totalVerts;
+
 switch (topology)
 {
 case TOP_POINT_LIST:
@@ -1129,12 +1143,6 @@ uint32_t MaxVertsPerDraw(
 vertsPerDraw = vertsPerPrim * KNOB_MAX_TESS_PRIMS_PER_DRAW;
 }
 break;
-
-// The Primitive Assembly code can only handle 1 RECT at a time.
-case TOP_RECT_LIST:
-vertsPerDraw = 3;
-break;
-
 default:
 // We are not splitting up draws for other topologies.
 break;
-- 
2.7.4

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[Mesa-dev] [PATCH 5/9] swr/rast: Add split draw and other state information to DrawInfoEvent.

[George Kyriazis]

Removed specific split draw events.
---
 .../drivers/swr/rasterizer/archrast/archrast.cpp   | 22 ++
 .../drivers/swr/rasterizer/archrast/events.proto   |  4 
 .../swr/rasterizer/archrast/events_private.proto   | 20 
 src/gallium/drivers/swr/rasterizer/core/api.cpp|  8 
 4 files changed, 22 insertions(+), 32 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp 
b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
index d5cffbb..af18b16 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
+++ b/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp
@@ -85,28 +85,18 @@ namespace ArchRast
 
 virtual void Handle(const DrawInstancedEvent& event)
 {
-DrawInfoEvent e(event.data.drawId, ArchRast::Instanced, 
event.data.topology, event.data.numVertices, 0, 0, event.data.startVertex, 
event.data.numInstances, event.data.startInstance);
+DrawInfoEvent e(event.data.drawId, ArchRast::Instanced, 
event.data.topology, 
+event.data.numVertices, 0, 0, event.data.startVertex, 
event.data.numInstances, 
+event.data.startInstance, event.data.tsEnable, 
event.data.gsEnable, event.data.soEnable, event.data.splitId);
 
 EventHandlerFile::Handle(e);
 }
 
 virtual void Handle(const DrawIndexedInstancedEvent& event)
 {
-DrawInfoEvent e(event.data.drawId, ArchRast::IndexedInstanced, 
event.data.topology, 0, event.data.numIndices, event.data.indexOffset, 
event.data.baseVertex, event.data.numInstances, event.data.startInstance);
-
-EventHandlerFile::Handle(e);
-}
-
-virtual void Handle(const DrawInstancedSplitEvent& event)
-{
-DrawInfoEvent e(event.data.drawId, ArchRast::InstancedSplit, 0, 0, 
0, 0, 0, 0, 0);
-
-EventHandlerFile::Handle(e);
-}
-
-virtual void Handle(const DrawIndexedInstancedSplitEvent& event)
-{
-DrawInfoEvent e(event.data.drawId, 
ArchRast::IndexedInstancedSplit, 0, 0, 0, 0, 0, 0, 0);
+DrawInfoEvent e(event.data.drawId, ArchRast::IndexedInstanced, 
event.data.topology, 0,
+event.data.numIndices, event.data.indexOffset, 
event.data.baseVertex, event.data.numInstances,
+event.data.startInstance, event.data.tsEnable, 
event.data.gsEnable, event.data.soEnable, event.data.splitId);
 
 EventHandlerFile::Handle(e);
 }
diff --git a/src/gallium/drivers/swr/rasterizer/archrast/events.proto 
b/src/gallium/drivers/swr/rasterizer/archrast/events.proto
index ee5d75b..45193a3 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/events.proto
+++ b/src/gallium/drivers/swr/rasterizer/archrast/events.proto
@@ -48,6 +48,10 @@ event DrawInfoEvent
 int32_t  baseVertex;
 uint32_t numInstances;
 uint32_t startInstance;
+uint32_t tsEnable;
+uint32_t gsEnable;
+uint32_t soEnable;
+uint32_t splitId; // Split draw count or id.
 };
 
 event DispatchEvent
diff --git a/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto 
b/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
index a07c4a7..760f7aa 100644
--- a/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
+++ b/src/gallium/drivers/swr/rasterizer/archrast/events_private.proto
@@ -128,6 +128,10 @@ event DrawInstancedEvent
 int32_t  startVertex;
 uint32_t numInstances;
 uint32_t startInstance;
+uint32_t tsEnable;
+uint32_t gsEnable;
+uint32_t soEnable;
+uint32_t splitId; // Split draw count or id.
 };
 
 event DrawIndexedInstancedEvent
@@ -139,16 +143,8 @@ event DrawIndexedInstancedEvent
 int32_t  baseVertex;
 uint32_t numInstances;
 uint32_t startInstance;
-};
-
-///@brief API Stat: Split draw event for DrawInstanced. In certain cases, 
Rasty can split draws up into smaller draws.
-event DrawInstancedSplitEvent
-{
-uint32_t drawId;
-};
-
-///@brief API Stat: Split draw event for DrawIndexedInstanced.
-event DrawIndexedInstancedSplitEvent
-{
-uint32_t drawId;
+uint32_t tsEnable;
+uint32_t gsEnable;
+uint32_t soEnable;
+uint32_t splitId; // Split draw count or id.
 };
diff --git a/src/gallium/drivers/swr/rasterizer/core/api.cpp 
b/src/gallium/drivers/swr/rasterizer/core/api.cpp
index 99d3cd5..86864f0 100644
--- a/src/gallium/drivers/swr/rasterizer/core/api.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/api.cpp
@@ -1169,7 +1169,6 @@ void DrawInstanced(
 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
 
 RDTSC_BEGIN(APIDraw, pDC->drawId);
-AR_API_EVENT(DrawInstancedEvent(pDC->drawId, topology, numVertices, 
startVertex, numInstances, startInstance));
 
 uint32_t maxVertsPerDraw = MaxVertsPerDraw(pDC, numVertices, topology);
 uint32_t primsPerDraw = GetNumPrims(topology, maxVertsPerDraw);
@@ -1221,7 +1220,8 @@ void DrawInstanced(
 //enqueue DC
 

[Mesa-dev] [PATCH 7/9] swr/rast: Add VPOPCNT

[George Kyriazis]

Supports popcnt on vector masks (e.g. <8 x i1>)
---
 src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp | 8 
 src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h   | 1 +
 2 files changed, 9 insertions(+)

diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp 
b/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
index 0738d02..0148d8e 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
@@ -836,6 +836,14 @@ namespace SwrJit
 }
 
 //
+/// @brief pop count on vector mask (e.g. <8 x i1>)
+Value* Builder::VPOPCNT(Value* a)
+{
+Value* b = BITCAST(VMASK(a), mSimdFP32Ty);
+return POPCNT(VMOVMSKPS(b));
+}
+
+//
 /// @brief C functions called by LLVM IR
 //
 
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h 
b/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h
index 50d7a1e..5195678 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h
@@ -148,6 +148,7 @@ CallInst *PRINT(const std::string );
 CallInst *PRINT(const std::string ,const 
std::initializer_list );
 
 Value* POPCNT(Value* a);
+Value* VPOPCNT(Value* a);
 
 Value* DEBUGTRAP();
 Value* INT3() { return DEBUGTRAP(); }
-- 
2.7.4

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Re: [Mesa-dev] [PATCH 1/2] mesa: simplify MESA_GL_VERSION_OVERRIDE behavior of API override

[Emil Velikov]

On 7 March 2018 at 16:44, Ian Romanick  wrote:

> Without this
> patch, if I run 'MESA_GL_VERSION_OVERRIDE=3.1 glxinfo | grep version' I
> get more or less the behavior that I expect:
>
> Max core profile version: 3.1
> Max compat profile version: 3.0
> OpenGL version string: 3.1 (Core Profile) Mesa 18.1.0-devel (git-877efedf4a)
> OpenGL shading language version string: 4.50
>
> I am wondering where the non-core profile version information is. :(
>
This and most likely the other strange behaviour you mentioned should
be addressed with [1]

-Emil

[1] https://patchwork.freedesktop.org/patch/207859/
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[Mesa-dev] [PATCH] radv: fix autotools builds

[Timothy Arceri]

Fixes: 68a6a3b51acc "spirv: handle AMD_gcn_shader extended instructions"

Cc: Daniel Schürmann 
Cc: Bas Nieuwenhuizen 
---
 src/compiler/Makefile.sources | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index 841bc8fec9..37340ba809 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -301,6 +301,7 @@ SPIRV_FILES = \
spirv/spirv_info.h \
spirv/spirv_to_nir.c \
spirv/vtn_alu.c \
+   spirv/vtn_amd.c \
spirv/vtn_cfg.c \
spirv/vtn_glsl450.c \
spirv/vtn_private.h \
-- 
2.14.3

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[Mesa-dev] [PATCH 9/9] swr/rast: Refactor memory gather operations

[George Kyriazis]

---
 src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h | 3 ++-
 src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp | 7 ++-
 2 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h 
b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
index b3a0e2b..a50ecc0 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
@@ -52,9 +52,10 @@ void Gather4(const SWR_FORMAT format, Value* pSrcBase, 
Value* byteOffsets,
 virtual Value* OFFSET_TO_NEXT_COMPONENT(Value* base, Constant *offset);
 
 virtual Value *GATHERPS(Value *src, Value *pBase, Value *indices, Value *mask, 
uint8_t scale = 1);
+
 Value *GATHERPS_16(Value *src, Value *pBase, Value *indices, Value *mask, 
uint8_t scale = 1);
 
-virtual void GATHER4PS(const SWR_FORMAT_INFO , Value* pSrcBase, Value* 
byteOffsets,
+void GATHER4PS(const SWR_FORMAT_INFO , Value* pSrcBase, Value* 
byteOffsets,
 Value* mask, Value* vGatherComponents[], bool bPackedOutput);
 
 virtual Value *GATHERDD(Value* src, Value* pBase, Value* indices, Value* mask, 
uint8_t scale = 1);
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp 
b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
index f1dc002..2ffce1b 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
@@ -1333,7 +1333,7 @@ void FetchJit::JitGatherVertices(const 
FETCH_COMPILE_STATE ,
 // But, we know that elements must be aligned 
for FETCH. :)
 // Right shift the offset by a bit and then 
scale by 2 to remove the sign extension.
 Value *shiftedOffsets16 = LSHR(vOffsets16, 1);
-pVtxSrc2[currentVertexElement++] = 
GATHERPS_16(gatherSrc16, pStreamBase, shiftedOffsets16, vGatherMask16, 2);
+pVtxSrc2[currentVertexElement++] = 
GATHERPS_16(gatherSrc16, pStreamBaseGFX, shiftedOffsets16, vGatherMask16, 2);
 }
 else
 {
@@ -1350,9 +1350,6 @@ void FetchJit::JitGatherVertices(const 
FETCH_COMPILE_STATE ,
 currentVertexElement = 0;
 }
 }
-
-// offset base to the next component in the vertex to 
gather
-pStreamBase = GEP(pStreamBase, C((char)4));
 #else
 if (isComponentEnabled(compMask, i))
 {
@@ -1383,11 +1380,11 @@ void FetchJit::JitGatherVertices(const 
FETCH_COMPILE_STATE ,
 currentVertexElement = 0;
 }
 }
+#endif
 
 // offset base to the next component in the vertex to 
gather
 pStreamBase = GEP(pStreamBase, C((char)4));
 pStreamBaseGFX = ADD(pStreamBaseGFX, C((int64_t)4));
-#endif
 }
 }
 break;
-- 
2.7.4

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Re: [Mesa-dev] [PATCH 5/5] radeonsi: remove chip_class parameter from si_lower_nir

[Timothy Arceri]

Thanks. I'm sure I tried this but failed to get it compiling for some 
reason.


Reviewed-by: Timothy Arceri 

On 08/03/18 07:34, Marek Olšák wrote:

From: Marek Olšák 

We can get it from si_screen.
---
  src/gallium/drivers/radeonsi/si_compute.c   | 3 +--
  src/gallium/drivers/radeonsi/si_shader.h| 4 +---
  src/gallium/drivers/radeonsi/si_shader_nir.c| 6 +++---
  src/gallium/drivers/radeonsi/si_state_shaders.c | 3 +--
  4 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c 
b/src/gallium/drivers/radeonsi/si_compute.c
index 92d4514..46873cc 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -100,21 +100,21 @@ static void si_create_compute_state_async(void *job, int 
thread_index)
sel.screen = program->screen;
  
  	if (program->ir_type == PIPE_SHADER_IR_TGSI) {

tgsi_scan_shader(program->ir.tgsi, );
sel.tokens = program->ir.tgsi;
} else {
assert(program->ir_type == PIPE_SHADER_IR_NIR);
sel.nir = program->ir.nir;
  
  		si_nir_scan_shader(sel.nir, );

-   si_lower_nir(, program->compiler_ctx_state.chip_class);
+   si_lower_nir();
}
  
  
  	sel.type = PIPE_SHADER_COMPUTE;

sel.local_size = program->local_size;
si_get_active_slot_masks(,
 >active_const_and_shader_buffers,
 >active_samplers_and_images);
  
  	program->shader.selector = 

@@ -179,21 +179,20 @@ static void *si_create_compute_state(
program->ir.tgsi = tgsi_dup_tokens(cso->prog);
if (!program->ir.tgsi) {
FREE(program);
return NULL;
}
} else {
assert(cso->ir_type == PIPE_SHADER_IR_NIR);
program->ir.nir = (struct nir_shader *) cso->prog;
}
  
-		program->compiler_ctx_state.chip_class = sctx->b.chip_class;

program->compiler_ctx_state.debug = sctx->debug;
program->compiler_ctx_state.is_debug_context = sctx->is_debug;
p_atomic_inc(>num_shaders_created);
util_queue_fence_init(>ready);
  
  		struct util_async_debug_callback async_debug;

bool wait =
(sctx->debug.debug_message && !sctx->debug.async) ||
sctx->is_debug ||
si_can_dump_shader(sscreen, PIPE_SHADER_COMPUTE);
diff --git a/src/gallium/drivers/radeonsi/si_shader.h 
b/src/gallium/drivers/radeonsi/si_shader.h
index 23f9d20..f589789 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -300,22 +300,20 @@ enum {
SI_FIX_FETCH_RGB_8, /* A = 1.0 */
SI_FIX_FETCH_RGB_8_INT, /* A = 1 */
SI_FIX_FETCH_RGB_16,
SI_FIX_FETCH_RGB_16_INT,
  };
  
  struct si_shader;
  
  /* State of the context creating the shader object. */

  struct si_compiler_ctx_state {
-   enum chip_class chip_class;
-
/* Should only be used by si_init_shader_selector_async and
 * si_build_shader_variant if thread_index == -1 (non-threaded). */
LLVMTargetMachineReftm;
  
  	/* Used if thread_index == -1 or if debug.async is true. */

struct pipe_debug_callback  debug;
  
  	/* Used for creating the log string for gallium/ddebug. */

boolis_debug_context;
  };
@@ -667,21 +665,21 @@ void si_shader_binary_read_config(struct ac_shader_binary 
*binary,
  struct si_shader_config *conf,
  unsigned symbol_offset);
  const char *si_get_shader_name(const struct si_shader *shader, unsigned 
processor);
  
  /* si_shader_nir.c */

  void si_nir_scan_shader(const struct nir_shader *nir,
struct tgsi_shader_info *info);
  void si_nir_scan_tess_ctrl(const struct nir_shader *nir,
   const struct tgsi_shader_info *info,
   struct tgsi_tessctrl_info *out);
-void si_lower_nir(struct si_shader_selector *sel, enum chip_class chip_class);
+void si_lower_nir(struct si_shader_selector *sel);
  
  /* Inline helpers. */
  
  /* Return the pointer to the main shader part's pointer. */

  static inline struct si_shader **
  si_get_main_shader_part(struct si_shader_selector *sel,
struct si_shader_key *key)
  {
if (key->as_ls)
return >main_shader_part_ls;
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c 
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 54ab0af..e537735 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ 

[Mesa-dev] [PATCH 2/2] autotools: add -I/src/egl to tizonia

[Dylan Baker]

meson got the same fix.

cc: Emil Veliov 
Signed-off-by: Dylan Baker 
---

I don't know hat the "right" fix is here Emil, I just picked one and applied it
to both meson and autotools.

 src/gallium/state_trackers/omx/tizonia/Makefile.am | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/state_trackers/omx/tizonia/Makefile.am 
b/src/gallium/state_trackers/omx/tizonia/Makefile.am
index 3149afa7bbb..0eac85a319e 100644
--- a/src/gallium/state_trackers/omx/tizonia/Makefile.am
+++ b/src/gallium/state_trackers/omx/tizonia/Makefile.am
@@ -27,6 +27,7 @@ AM_CFLAGS = \
-I$(top_srcdir)/src/mesa \
-I$(top_builddir)/src/mesa/drivers/dri/common \
-I$(top_srcdir)/src/mesa/drivers/dri/common \
+   -I$(top_srcdir)/src/egl \
-I$(top_srcdir)/src/egl/drivers/dri2 \
-I$(top_srcdir)/src/egl/wayland/wayland-egl \
-I$(top_srcdir)/src/egl/main \
-- 
2.16.2

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[Mesa-dev] [PATCH 1/2] autotools: add vtn_amd.c to sources

[Dylan Baker]

cc: Emil Veliov 
Signed-off-by: Dylan Baker 
---
 src/compiler/Makefile.sources | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index 841bc8fec91..37340ba809e 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -301,6 +301,7 @@ SPIRV_FILES = \
spirv/spirv_info.h \
spirv/spirv_to_nir.c \
spirv/vtn_alu.c \
+   spirv/vtn_amd.c \
spirv/vtn_cfg.c \
spirv/vtn_glsl450.c \
spirv/vtn_private.h \
-- 
2.16.2

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[Mesa-dev] [PATCH v4 15/20] include/CL: Add cl_khr_il_program

[Pierre Moreau]

Reviewed-by: Karol Herbst 
Signed-off-by: Pierre Moreau 
---
 include/CL/cl_ext.h | 37 +
 1 file changed, 37 insertions(+)

diff --git a/include/CL/cl_ext.h b/include/CL/cl_ext.h
index 5078e8f45f..5ea4968042 100644
--- a/include/CL/cl_ext.h
+++ b/include/CL/cl_ext.h
@@ -599,6 +599,43 @@ clSetKernelExecInfoARM(cl_kernel/* kernel */,
 
 #endif /* CL_VERSION_1_2 */
 
+/***
+ * cl_khr_il_program extension *
+ ***/
+
+#if defined(CL_VERSION_1_2) || defined(CL_VERSION_2_0)
+
+#ifndef cl_khr_il_program
+#define cl_khr_il_program 1
+
+/* New property to clGetDeviceInfo for retrieving supported intermediate
+ * languages
+ */
+#define CL_DEVICE_IL_VERSION_KHR0x105B
+
+/* New property to clGetProgramInfo for retrieving for retrieving the IL of a
+ * program
+ */
+#define CL_PROGRAM_IL_KHR   0x1169
+
+extern CL_API_ENTRY cl_program
+  CL_API_CALL clCreateProgramWithILKHR(
+  cl_context /* context */,
+  const void * /* il */,
+  size_t /* length */,
+  cl_int * /* errcode_ret */) CL_EXT_SUFFIX__VERSION_1_2;
+
+typedef CL_API_ENTRY cl_program
+  (CL_API_CALL *clCreateProgramWithILKHR_fn)(
+  cl_context /* context */,
+  const void * /* il */,
+  size_t /* length */,
+  cl_int * /* errcode_ret */) CL_EXT_SUFFIX__VERSION_1_2;
+
+#endif /* CL_VERSION_1_2 || CL_VERSION_2_0 */
+
+#endif /* cl_khr_il_program */
+
 #ifdef __cplusplus
 }
 #endif
-- 
2.16.2

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[Mesa-dev] [PATCH v4 16/20] clover: Implement clCreateProgramWithILKHR

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Notes:
Changes in v4: guard parts of the code behind SPIR-V support

v3:
* Remove the const on the length argument to CreateProgramWithILKHR 
(Francisco
  Jerez);
* Capitalize comment (Francisco Jerez);
* Store the IL as a std::vector instead of a pointer + size (Francisco 
Jerez);
* Remove the destructor, due to previous change;
* Remove endianness conversion, as already performed later on (Francisco 
Jerez);
* Introduce a free function for compile_program, which calls the right 
compile
  function based on the IR format (Francisco Jerez);
* Add dependency on SPIRV-Tools, as we validate the SPIR-V module fed to
  clCreateProgramWithILKHR;
* Introduce an enum for representing which IL is stored in program;
* Correctly initialise the devices associated to a program created from
  clCreateProgramWithILKHR;
* Introduce free functions for validating the SPIR-V binary, and detecting 
the
  IL used in the binary fed to clCreateProgramWithILKHR.

 src/gallium/state_trackers/clover/Makefile.am  |  6 +-
 src/gallium/state_trackers/clover/api/dispatch.hpp |  4 +
 src/gallium/state_trackers/clover/api/program.cpp  | 87 +-
 src/gallium/state_trackers/clover/core/program.cpp | 47 ++--
 src/gallium/state_trackers/clover/core/program.hpp | 12 +++
 src/gallium/state_trackers/clover/meson.build  |  1 +
 6 files changed, 146 insertions(+), 11 deletions(-)

diff --git a/src/gallium/state_trackers/clover/Makefile.am 
b/src/gallium/state_trackers/clover/Makefile.am
index 35ee092f3f..9ae053ac5e 100644
--- a/src/gallium/state_trackers/clover/Makefile.am
+++ b/src/gallium/state_trackers/clover/Makefile.am
@@ -46,11 +46,15 @@ libclllvm_la_SOURCES = $(LLVM_SOURCES)
 libclover_la_CXXFLAGS = \
$(CXX11_CXXFLAGS) \
$(CLOVER_STD_OVERRIDE) \
-   $(VISIBILITY_CXXFLAGS)
+   $(VISIBILITY_CXXFLAGS) \
+   $(SPIRV_TOOLS_CFLAGS)
 
 libclover_la_LIBADD = \
libclllvm.la
 
+libclover_la_LDFLAGS = \
+   $(SPIRV_TOOLS_LIBS)
+
 libclover_la_SOURCES = $(CPP_SOURCES)
 
 EXTRA_DIST = Doxyfile meson.build
diff --git a/src/gallium/state_trackers/clover/api/dispatch.hpp 
b/src/gallium/state_trackers/clover/api/dispatch.hpp
index 60fb75a146..3d5fc7bf47 100644
--- a/src/gallium/state_trackers/clover/api/dispatch.hpp
+++ b/src/gallium/state_trackers/clover/api/dispatch.hpp
@@ -974,6 +974,10 @@ namespace clover {
cl_int
IcdGetPlatformIDsKHR(cl_uint num_entries, cl_platform_id *rd_platforms,
 cl_uint *rnum_platforms);
+
+   cl_program
+   CreateProgramWithILKHR(cl_context d_ctx, const void *il,
+  size_t length, cl_int *r_errcode);
 }
 
 #endif
diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 7d57d3f0e9..cc37a008ad 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -21,9 +21,15 @@
 //
 
 #include "api/util.hpp"
+#include "compiler/spirv/spirv.h"
 #include "core/program.hpp"
+#include "util/u_math.h"
 #include "util/u_debug.h"
 
+#ifdef CLOVER_ALLOW_SPIRV
+#include 
+#endif
+
 #include 
 
 using namespace clover;
@@ -46,6 +52,60 @@ namespace {
 }, objs(d_devs, num_devs)))
  throw error(CL_INVALID_DEVICE);
}
+
+#ifdef CLOVER_ALLOW_SPIRV
+   bool
+   is_valid_spirv(const uint32_t *binary, size_t length,
+  const context::notify_action ) {
+  auto const validator_consumer = [](spv_message_level_t level,
+   const char * /* source */,
+   const spv_position_t ,
+   const char *message) {
+ if (!notify)
+return;
+
+ std::string str_level;
+ switch (level) {
+#define LVL2STR(lvl) case SPV_MSG_##lvl: str_level = std::string(#lvl)
+LVL2STR(FATAL);
+LVL2STR(INTERNAL_ERROR);
+LVL2STR(ERROR);
+LVL2STR(WARNING);
+LVL2STR(INFO);
+LVL2STR(DEBUG);
+#undef LVL2STR
+ }
+ const std::string log = "[" + str_level + "] At word No." +
+ std::to_string(position.index) + ": \"" +
+ message + "\"";
+ notify(log.c_str());
+  };
+
+  spvtools::SpirvTools spvTool(SPV_ENV_OPENCL_1_2);
+  spvTool.SetMessageConsumer(validator_consumer);
+
+  return spvTool.Validate(binary, length);
+   }
+#endif
+
+   enum program::il_type
+   identify_and_validate_il(const void *il, size_t length,
+const context::notify_action ) {
+
+  enum program::il_type il_type = program::il_type::none;
+
+#ifdef CLOVER_ALLOW_SPIRV
+  const uint32_t *stream = reinterpret_cast(il);
+  if (stream[0] == 

[Mesa-dev] [PATCH v4 13/20] configure.ac, meson: Check for SPIRV-Tools and llvm-spirv

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Notes:
Changes in v4:
* make SPIRV-Tools and llvm-spirv optional (Francisco Jerez);
* bump requirement for llvm-spirv to version 0.2

v3:
* Bump the required version of SPIRV-Tools to the latest release;
* Add a dependency on llvm-spirv.

 configure.ac | 17 +
 meson.build  |  7 +++
 2 files changed, 24 insertions(+)

diff --git a/configure.ac b/configure.ac
index 172da6b443..058f7ccbbd 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2413,6 +2413,23 @@ AM_CONDITIONAL(HAVE_CLOVER_ICD, test 
"x$enable_opencl_icd" = xyes)
 AC_SUBST([OPENCL_LIBNAME])
 AC_SUBST([CLANG_RESOURCE_DIR])
 
+AS_IF([test "x$enable_opencl" = xyes], [
+PKG_CHECK_MODULES([SPIRV_TOOLS], [SPIRV-Tools >= 2018.0],
+  [have_spirv_tools=yes], [have_spirv_tools=no])])
+AC_SUBST([SPIRV_TOOLS_CFLAGS])
+AC_SUBST([SPIRV_TOOLS_LIBS])
+
+AS_IF([test "x$enable_opencl" = xyes], [
+PKG_CHECK_MODULES([LLVM_SPIRV], [llvm-spirv >= 0.2],
+  [have_llvm_spirv=yes], [have_llvm_spirv=no])])
+AC_SUBST([LLVM_SPIRV_CFLAGS])
+AC_SUBST([LLVM_SPIRV_LIBS])
+
+if test "x$have_spirv_tools" = xyes -o \
+"x$have_llvm_spirv" = xyes; then
+DEFINES="$DEFINES -DCLOVER_ALLOW_SPIRV"
+fi
+
 dnl
 dnl Gallium configuration
 dnl
diff --git a/meson.build b/meson.build
index 8a17d7f240..90021dd597 100644
--- a/meson.build
+++ b/meson.build
@@ -623,10 +623,17 @@ if _opencl != 'disabled'
 
   # TODO: alitvec?
   dep_clc = dependency('libclc')
+  dep_spirv_tools = dependency('SPIRV-Tools', required : false, version : '>= 
2018.0')
+  dep_llvm_spirv = dependency('llvm-spirv', required : false, version : '>= 
0.2')
+  if dep_spirv_tools.found() and dep_llvm_spirv.found()
+pre_args += '-DCLOVER_ALLOW_SPIRV'
+  endif
   with_gallium_opencl = true
   with_opencl_icd = _opencl == 'icd'
 else
   dep_clc = []
+  dep_spirv_tools = []
+  dep_llvm_spirv = []
   with_gallium_opencl = false
   with_gallium_icd = false
 endif
-- 
2.16.2

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[Mesa-dev] [PATCH v4 14/20] clover/llvm: Allow translating from SPIR-V to LLVM IR

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Notes:
Changes in v4:
* guard the SPIR-V code;
* use an istringstream instead of a bidirectional stringstream, and 
initialise
  it directly (Francisco Jerez).

 .../state_trackers/clover/llvm/invocation.cpp  | 29 ++
 .../state_trackers/clover/llvm/invocation.hpp  |  6 +
 src/gallium/state_trackers/clover/meson.build  |  2 +-
 3 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp 
b/src/gallium/state_trackers/clover/llvm/invocation.cpp
index 0bc06e..84043f3405 100644
--- a/src/gallium/state_trackers/clover/llvm/invocation.cpp
+++ b/src/gallium/state_trackers/clover/llvm/invocation.cpp
@@ -24,12 +24,17 @@
 // OTHER DEALINGS IN THE SOFTWARE.
 //
 
+#include 
+
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#ifdef CLOVER_ALLOW_SPIRV
+#include 
+#endif
 
 #include 
 #include 
@@ -301,3 +306,27 @@ clover::llvm::link_program(const std::vector 
,
   unreachable("Unsupported IR.");
}
 }
+
+#ifdef CLOVER_ALLOW_SPIRV
+module
+clover::llvm::compile_from_spirv(const std::vector ,
+ const device ,
+ std::string _log) {
+   auto ctx = create_context(r_log);
+
+   ::llvm::Module *unsafe_mod;
+   std::string error_msg;
+   std::istringstream input({ binary.begin(), binary.end() }, 
std::ios_base::binary);
+   if (!::llvm::readSPIRV(*ctx, input, unsafe_mod, error_msg)) {
+  r_log += "Failed to convert SPIR-V to LLVM IR: " + error_msg + ".\n";
+  throw error(CL_INVALID_VALUE);
+   }
+
+   std::unique_ptr<::llvm::Module> mod(unsafe_mod);
+
+   if (has_flag(debug::llvm))
+  debug::log(".ll", print_module_bitcode(*mod));
+
+   return build_module_library(*mod, module::section::text_intermediate);
+}
+#endif
diff --git a/src/gallium/state_trackers/clover/llvm/invocation.hpp 
b/src/gallium/state_trackers/clover/llvm/invocation.hpp
index ff9caa457c..85b16f6c90 100644
--- a/src/gallium/state_trackers/clover/llvm/invocation.hpp
+++ b/src/gallium/state_trackers/clover/llvm/invocation.hpp
@@ -40,6 +40,12 @@ namespace clover {
   const device ,
   const std::string ,
   std::string _log);
+
+#ifdef CLOVER_ALLOW_SPIRV
+  module compile_from_spirv(const std::vector ,
+const device ,
+std::string _log);
+#endif
}
 }
 
diff --git a/src/gallium/state_trackers/clover/meson.build 
b/src/gallium/state_trackers/clover/meson.build
index c52f0faa40..bffd0df11d 100644
--- a/src/gallium/state_trackers/clover/meson.build
+++ b/src/gallium/state_trackers/clover/meson.build
@@ -48,7 +48,7 @@ libclllvm = static_library(
   dep_llvm.get_configtool_variable('version'), 'include',
 )),
   ],
-  dependencies : [dep_llvm, dep_elf],
+  dependencies : [dep_llvm, dep_elf, dep_llvm_spirv],
 )
 
 clover_files = files(
-- 
2.16.2

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[Mesa-dev] [PATCH v4 18/20] clover/api: Implement CL_DEVICE_IL_VERSION

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Notes:
Changes in v4: Use the core define instead of the extension one (Karol 
Herbst)

v3: Throw an exception if the cl_khr_il_program extension is not supported
(Francisco Jerez)

 src/gallium/state_trackers/clover/api/device.cpp | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/gallium/state_trackers/clover/api/device.cpp 
b/src/gallium/state_trackers/clover/api/device.cpp
index 4e274c5005..ac6e4e0185 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -333,6 +333,13 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
   buf.as_string() = dev.supported_extensions();
   break;
 
+   case CL_DEVICE_IL_VERSION:
+  if (dev.supported_extensions().find("cl_khr_il_program") == 
std::string::npos)
+ throw error(CL_INVALID_VALUE);
+  buf.as_string() = std::string("SPIR-V_1.0");
+
+  break;
+
case CL_DEVICE_PLATFORM:
   buf.as_scalar() = desc(dev.platform);
   break;
-- 
2.16.2

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[Mesa-dev] [PATCH v4 19/20] clover: Advertise cl_khr_il_program

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Notes:
Changes in v4: do not advertise SPIR-V support if CLOVER_ALLOW_SPIRV is not 
defined

v3: Advertise cl_khr_il_program if if the device support NATIVE as IR

 src/gallium/state_trackers/clover/api/platform.cpp | 2 ++
 src/gallium/state_trackers/clover/core/device.cpp  | 8 +++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/api/platform.cpp 
b/src/gallium/state_trackers/clover/api/platform.cpp
index 94d883c1f0..54a35c5dc5 100644
--- a/src/gallium/state_trackers/clover/api/platform.cpp
+++ b/src/gallium/state_trackers/clover/api/platform.cpp
@@ -111,6 +111,8 @@ clover::GetExtensionFunctionAddress(const char *p_name) {
 
if (name == "clIcdGetPlatformIDsKHR")
   return reinterpret_cast(IcdGetPlatformIDsKHR);
+   else if (name == "clCreateProgramWithILKHR")
+  return reinterpret_cast(CreateProgramWithILKHR);
else
   return NULL;
 }
diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index 21de0e3d61..b9a26e4eec 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -285,6 +285,11 @@ device::supports_ir(enum pipe_shader_ir ir) const {
 
 std::string
 device::supported_extensions() const {
+#ifdef CLOVER_ALLOW_SPIRV
+   const bool supports_il_program = supports_ir(PIPE_SHADER_IR_NATIVE);
+#else
+   const bool supports_il_program = false;
+#endif
return
   "cl_khr_byte_addressable_store"
   " cl_khr_global_int32_base_atomics"
@@ -294,5 +299,6 @@ device::supported_extensions() const {
   + std::string(has_int64_atomics() ? " cl_khr_int64_base_atomics" : "")
   + std::string(has_int64_atomics() ? " cl_khr_int64_extended_atomics" : 
"")
   + std::string(has_doubles() ? " cl_khr_fp64" : "")
-  + std::string(has_halves() ? " cl_khr_fp16" : "");
+  + std::string(has_halves() ? " cl_khr_fp16" : "")
+  + std::string(supports_il_program ? " cl_khr_il_program" : "");
 }
-- 
2.16.2

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[Mesa-dev] [PATCH v4 12/20] clover: Move platform extensions definitions to clover/platform.cpp

[Pierre Moreau]

Reviewed-by: Francisco Jerez 
Reviewed-by: Aaron Watry 
Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/platform.cpp  | 4 ++--
 src/gallium/state_trackers/clover/core/platform.cpp | 5 +
 src/gallium/state_trackers/clover/core/platform.hpp | 2 ++
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/platform.cpp 
b/src/gallium/state_trackers/clover/api/platform.cpp
index 3b96b03fde..94d883c1f0 100644
--- a/src/gallium/state_trackers/clover/api/platform.cpp
+++ b/src/gallium/state_trackers/clover/api/platform.cpp
@@ -51,7 +51,7 @@ clover::GetPlatformInfo(cl_platform_id d_platform, 
cl_platform_info param,
 size_t size, void *r_buf, size_t *r_size) try {
property_buffer buf { r_buf, size, r_size };
 
-   obj(d_platform);
+   auto  = obj(d_platform);
 
switch (param) {
case CL_PLATFORM_PROFILE:
@@ -78,7 +78,7 @@ clover::GetPlatformInfo(cl_platform_id d_platform, 
cl_platform_info param,
   break;
 
case CL_PLATFORM_EXTENSIONS:
-  buf.as_string() = "cl_khr_icd";
+  buf.as_string() = platform.supported_extensions();
   break;
 
case CL_PLATFORM_ICD_SUFFIX_KHR:
diff --git a/src/gallium/state_trackers/clover/core/platform.cpp 
b/src/gallium/state_trackers/clover/core/platform.cpp
index 489e8dc5a8..ddd63fc5a0 100644
--- a/src/gallium/state_trackers/clover/core/platform.cpp
+++ b/src/gallium/state_trackers/clover/core/platform.cpp
@@ -39,3 +39,8 @@ platform::platform() : adaptor_range(evals(), devs) {
   }
}
 }
+
+std::string
+platform::supported_extensions() const {
+   return "cl_khr_icd";
+}
diff --git a/src/gallium/state_trackers/clover/core/platform.hpp 
b/src/gallium/state_trackers/clover/core/platform.hpp
index e849645bbe..b94434c983 100644
--- a/src/gallium/state_trackers/clover/core/platform.hpp
+++ b/src/gallium/state_trackers/clover/core/platform.hpp
@@ -40,6 +40,8 @@ namespace clover {
   platform &
   operator=(const platform ) = delete;
 
+  std::string supported_extensions() const;
+
protected:
   std::vector devs;
};
-- 
2.16.2

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[Mesa-dev] [PATCH v4 17/20] clover: Handle CL_PROGRAM_IL in clGetProgramInfo

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Notes:
Changes in v4: Use the core define instead of the extension one (Karol 
Herbst)

v3: Switch from using a pointer attribute to a vector (Francisco Jerez)

 src/gallium/state_trackers/clover/api/program.cpp | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index cc37a008ad..2501d0bc07 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -456,6 +456,13 @@ clGetProgramInfo(cl_program d_prog, cl_program_info param,
   buf.as_string() = prog.source();
   break;
 
+   case CL_PROGRAM_IL:
+  if (prog.has_il)
+ buf.as_vector() = prog.il();
+  else if (r_size)
+ *r_size = 0u;
+  break;
+
case CL_PROGRAM_BINARY_SIZES:
   buf.as_vector() = map([&](const device ) {
 return prog.build(dev).binary.size();
-- 
2.16.2

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[Mesa-dev] [PATCH 18/22 v4] squash! i965/fs: Add infrastructure for generating CSEL instructions.

[Ian Romanick]

From: Ian Romanick 

v4: Only set BRW_ALIGN_16 on Gen < 10 (suggested by Matt).  Don't reset
the access mode afterwards (suggested by Samuel and Matt).  Add support
for CSEL not modifying the flags to more places (requested by Matt).

Reviewed-by: Matt Turner 
---
 src/intel/compiler/brw_disasm.c | 1 +
 src/intel/compiler/brw_fs.cpp   | 1 +
 src/intel/compiler/brw_fs_generator.cpp | 5 +++--
 src/intel/compiler/brw_ir_vec4.h| 1 +
 src/intel/compiler/brw_vec4.cpp | 1 +
 5 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index a9a108f..5f75c67 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -1508,6 +1508,7 @@ brw_disassemble_inst(FILE *file, const struct 
gen_device_info *devinfo,
*/
   if (brw_inst_cond_modifier(devinfo, inst) &&
   (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
+opcode != BRW_OPCODE_CSEL &&
 opcode != BRW_OPCODE_IF &&
 opcode != BRW_OPCODE_WHILE))) {
  format(file, ".f%"PRIu64,
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index f532c2c..f4cc941 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -5544,6 +5544,7 @@ fs_visitor::dump_instruction(backend_instruction 
*be_inst, FILE *file)
   fprintf(file, "%s", conditional_modifier[inst->conditional_mod]);
   if (!inst->predicate &&
   (devinfo->gen < 5 || (inst->opcode != BRW_OPCODE_SEL &&
+inst->opcode != BRW_OPCODE_CSEL &&
 inst->opcode != BRW_OPCODE_IF &&
 inst->opcode != BRW_OPCODE_WHILE))) {
  fprintf(file, ".f%d.%d", inst->flag_subreg / 2,
diff --git a/src/intel/compiler/brw_fs_generator.cpp 
b/src/intel/compiler/brw_fs_generator.cpp
index 97d2357..85a6183 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1876,9 +1876,10 @@ fs_generator::generate_code(const cfg_t *cfg, int 
dispatch_width)
 brw_SEL(p, dst, src[0], src[1]);
 break;
   case BRW_OPCODE_CSEL:
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ assert(devinfo->gen >= 8);
+ if (devinfo->gen < 10)
+brw_set_default_access_mode(p, BRW_ALIGN_16);
  brw_CSEL(p, dst, src[0], src[1], src[2]);
- brw_set_default_access_mode(p, BRW_ALIGN_1);
  break;
   case BRW_OPCODE_BFREV:
  assert(devinfo->gen >= 7);
diff --git a/src/intel/compiler/brw_ir_vec4.h b/src/intel/compiler/brw_ir_vec4.h
index a0e6402..cbaff2f 100644
--- a/src/intel/compiler/brw_ir_vec4.h
+++ b/src/intel/compiler/brw_ir_vec4.h
@@ -329,6 +329,7 @@ public:
bool writes_flag()
{
   return (conditional_mod && (opcode != BRW_OPCODE_SEL &&
+  opcode != BRW_OPCODE_CSEL &&
   opcode != BRW_OPCODE_IF &&
   opcode != BRW_OPCODE_WHILE));
}
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
index ac6b997..e483814 100644
--- a/src/intel/compiler/brw_vec4.cpp
+++ b/src/intel/compiler/brw_vec4.cpp
@@ -1557,6 +1557,7 @@ vec4_visitor::dump_instruction(backend_instruction 
*be_inst, FILE *file)
   fprintf(file, "%s", conditional_modifier[inst->conditional_mod]);
   if (!inst->predicate &&
   (devinfo->gen < 5 || (inst->opcode != BRW_OPCODE_SEL &&
+inst->opcode != BRW_OPCODE_CSEL &&
 inst->opcode != BRW_OPCODE_IF &&
 inst->opcode != BRW_OPCODE_WHILE))) {
  fprintf(file, ".f%d.%d", inst->flag_subreg / 2, inst->flag_subreg % 
2);
-- 
2.9.5

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[Mesa-dev] [PATCH] squash! i965/fs: Merge CMP and SEL into CSEL on Gen8+

[Ian Romanick]

From: Ian Romanick 

v4: Report progress.  This actually helps one more shader!
---
 src/intel/compiler/brw_fs.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 7b51b1f..4937361 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -2900,8 +2900,10 @@ fs_visitor::opt_peephole_csel()
csel_inst->src[1].abs = true;
 }
 
-if (csel_inst != NULL)
+if (csel_inst != NULL) {
+   progress = true;
inst->remove(block);
+}
 
 break;
  }
-- 
2.9.5

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[Mesa-dev] [PATCH v4 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

[Lepton Wu]

If user calls map twice for kms_sw_displaytarget, the first mapped
buffer could get leaked. Instead of calling mmap every time, just
reuse previous mapping. Since user could map same displaytarget with
different flags, we have to keep two different pointers, one for rw
mapping and one for ro mapping.

Change-Id: I65308f0ff2640bd57b2577c6a3469540c9722859
Signed-off-by: Lepton Wu 
---
 .../winsys/sw/kms-dri/kms_dri_sw_winsys.c | 21 ---
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 
b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
index 22e1c936ac5..7fc40488c2e 100644
--- a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
+++ b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
@@ -70,6 +70,7 @@ struct kms_sw_displaytarget
 
uint32_t handle;
void *mapped;
+   void *ro_mapped;
 
int ref_count;
struct list_head link;
@@ -198,16 +199,19 @@ kms_sw_displaytarget_map(struct sw_winsys *ws,
   return NULL;
 
prot = (flags == PIPE_TRANSFER_READ) ? PROT_READ : (PROT_READ | PROT_WRITE);
-   kms_sw_dt->mapped = mmap(0, kms_sw_dt->size, prot, MAP_SHARED,
-kms_sw->fd, map_req.offset);
-
-   if (kms_sw_dt->mapped == MAP_FAILED)
-  return NULL;
+   void **ptr = (flags == PIPE_TRANSFER_READ) ? _sw_dt->ro_mapped : 
_sw_dt->mapped;
+   if (!*ptr) {
+  void *tmp = mmap(0, kms_sw_dt->size, prot, MAP_SHARED,
+   kms_sw->fd, map_req.offset);
+  if (tmp == MAP_FAILED)
+ return NULL;
+  *ptr = tmp;
+   }
 
DEBUG_PRINT("KMS-DEBUG: mapped buffer %u (size %u) at %p\n",
- kms_sw_dt->handle, kms_sw_dt->size, kms_sw_dt->mapped);
+ kms_sw_dt->handle, kms_sw_dt->size, *ptr);
 
-   return kms_sw_dt->mapped;
+   return *ptr;
 }
 
 static struct kms_sw_displaytarget *
@@ -278,9 +282,12 @@ kms_sw_displaytarget_unmap(struct sw_winsys *ws,
struct kms_sw_displaytarget *kms_sw_dt = kms_sw_displaytarget(dt);
 
DEBUG_PRINT("KMS-DEBUG: unmapped buffer %u (was %p)\n", kms_sw_dt->handle, 
kms_sw_dt->mapped);
+   DEBUG_PRINT("KMS-DEBUG: unmapped buffer %u (was %p)\n", kms_sw_dt->handle, 
kms_sw_dt->ro_mapped);
 
munmap(kms_sw_dt->mapped, kms_sw_dt->size);
kms_sw_dt->mapped = NULL;
+   munmap(kms_sw_dt->ro_mapped, kms_sw_dt->size);
+   kms_sw_dt->ro_mapped = NULL;
 }
 
 static struct sw_displaytarget *
-- 
2.16.2.395.g2e18187dfd-goog

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[Mesa-dev] [PATCH v4 2/2] gallium/winsys/kms: Add support for multi-planes

[Lepton Wu]

Add a new struct kms_sw_plane which delegate a plane and use it
in place of sw_displaytarget. Multiple planes share same underlying
kms_sw_displaytarget.

Change-Id: I0e9ca1d0ba0aa78c27dfdb50c30dc0c424fec172
Signed-off-by: Lepton Wu 
---
 .../winsys/sw/kms-dri/kms_dri_sw_winsys.c | 162 +-
 1 file changed, 122 insertions(+), 40 deletions(-)

diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 
b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
index 7fc40488c2e..ec3c9d9d29e 100644
--- a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
+++ b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
@@ -59,13 +59,22 @@
 #define DEBUG_PRINT(msg, ...)
 #endif
 
+struct kms_sw_displaytarget;
 
-struct kms_sw_displaytarget
+struct kms_sw_plane
 {
-   enum pipe_format format;
unsigned width;
unsigned height;
unsigned stride;
+   unsigned offset;
+   int mapped;
+   struct kms_sw_displaytarget *dt;
+   struct list_head link;
+};
+
+struct kms_sw_displaytarget
+{
+   enum pipe_format format;
unsigned size;
 
uint32_t handle;
@@ -74,6 +83,7 @@ struct kms_sw_displaytarget
 
int ref_count;
struct list_head link;
+   struct list_head planes;
 };
 
 struct kms_sw_winsys
@@ -84,10 +94,16 @@ struct kms_sw_winsys
struct list_head bo_list;
 };
 
-static inline struct kms_sw_displaytarget *
-kms_sw_displaytarget( struct sw_displaytarget *dt )
+static inline struct kms_sw_plane *
+kms_sw_plane( struct sw_displaytarget *dt )
 {
-   return (struct kms_sw_displaytarget *)dt;
+   return (struct kms_sw_plane *)dt;
+}
+
+static inline struct sw_displaytarget *
+sw_displaytarget( struct kms_sw_plane *pl)
+{
+   return (struct sw_displaytarget *)pl;
 }
 
 static inline struct kms_sw_winsys *
@@ -106,6 +122,39 @@ kms_sw_is_displaytarget_format_supported( struct sw_winsys 
*ws,
return TRUE;
 }
 
+static struct kms_sw_plane *get_plane(struct kms_sw_displaytarget *kms_sw_dt,
+  enum pipe_format format,
+  unsigned width, unsigned height,
+  unsigned stride, unsigned offset)
+{
+   struct kms_sw_plane *plane = NULL;
+
+   if (offset + util_format_get_2d_size(format, stride, height) >
+   kms_sw_dt->size) {
+  DEBUG_PRINT("KMS-DEBUG: plane too big. format: %d stride: %d height: %d "
+  "offset: %d size:%d\n", format, stride, height, offset,
+  kms_sw_dt->size);
+  return NULL;
+   }
+
+   LIST_FOR_EACH_ENTRY(plane, _sw_dt->planes, link) {
+  if (plane->offset == offset)
+ return plane;
+   }
+
+   plane = CALLOC_STRUCT(kms_sw_plane);
+   if (!plane)
+  return NULL;
+
+   plane->width = width;
+   plane->height = height;
+   plane->stride = stride;
+   plane->offset = offset;
+   plane->dt = kms_sw_dt;
+   list_add(>link, _sw_dt->planes);
+   return plane;
+}
+
 static struct sw_displaytarget *
 kms_sw_displaytarget_create(struct sw_winsys *ws,
 unsigned tex_usage,
@@ -125,11 +174,10 @@ kms_sw_displaytarget_create(struct sw_winsys *ws,
if (!kms_sw_dt)
   goto no_dt;
 
+   list_inithead(_sw_dt->planes);
kms_sw_dt->ref_count = 1;
 
kms_sw_dt->format = format;
-   kms_sw_dt->width = width;
-   kms_sw_dt->height = height;
 
memset(_req, 0, sizeof(create_req));
create_req.bpp = 32;
@@ -139,16 +187,19 @@ kms_sw_displaytarget_create(struct sw_winsys *ws,
if (ret)
   goto free_bo;
 
-   kms_sw_dt->stride = create_req.pitch;
kms_sw_dt->size = create_req.size;
kms_sw_dt->handle = create_req.handle;
+   struct kms_sw_plane *plane = get_plane(kms_sw_dt, format, width, height,
+  create_req.pitch, 0);
+   if (!plane)
+  goto free_bo;
 
list_add(_sw_dt->link, _sw->bo_list);
 
DEBUG_PRINT("KMS-DEBUG: created buffer %u (size %u)\n", kms_sw_dt->handle, 
kms_sw_dt->size);
 
-   *stride = kms_sw_dt->stride;
-   return (struct sw_displaytarget *)kms_sw_dt;
+   *stride = create_req.pitch;
+   return sw_displaytarget(plane);
 
  free_bo:
memset(_req, 0, sizeof destroy_req);
@@ -164,7 +215,8 @@ kms_sw_displaytarget_destroy(struct sw_winsys *ws,
  struct sw_displaytarget *dt)
 {
struct kms_sw_winsys *kms_sw = kms_sw_winsys(ws);
-   struct kms_sw_displaytarget *kms_sw_dt = kms_sw_displaytarget(dt);
+   struct kms_sw_plane *plane = kms_sw_plane(dt);
+   struct kms_sw_displaytarget *kms_sw_dt = plane->dt;
struct drm_mode_destroy_dumb destroy_req;
 
kms_sw_dt->ref_count --;
@@ -179,6 +231,11 @@ kms_sw_displaytarget_destroy(struct sw_winsys *ws,
 
DEBUG_PRINT("KMS-DEBUG: destroyed buffer %u\n", kms_sw_dt->handle);
 
+   struct kms_sw_plane *tmp;
+   LIST_FOR_EACH_ENTRY_SAFE(plane, tmp, _sw_dt->planes, link) {
+  FREE(plane);
+   }
+
FREE(kms_sw_dt);
 }
 
@@ -188,7 +245,8 @@ kms_sw_displaytarget_map(struct sw_winsys *ws,
  

Re: [Mesa-dev] [PATCH 00/56] anv: Add support for Vulkan 1.1

[Jason Ekstrand]

Hi all,

I just wanted to give a shout out and a huge "Thank You!" to all of the
people who made this release possible.  There were a large number of
features packed into the 1.1 release and implementing it all was a hugely
collaborative effort.

I want to specially thank our friends at Igalia.  They implemented the
VK_KHR_16bit_storage extension which was initially 45 patches which ended
up going through multiple review cycles and getting expanded a bit.  Less
visibly, however, they've also been hard at work on the CTS.  They've
implemented quite a few tests for things such as VK_KHR_16bit_storage,
VK_KHR_image_format_list, and others I've forgotten about.  They also kept
on top of the CTS as new tests were being developed and did most of the
triage and bug fixing work in anv.  I seriously don't know what we would
have done without them.  I think it's fair to say that, while we may have
managed a skeleton 1.1 implementation, we wouldn't have been able to ship a
full-featured 1.1 without them!  Also, I probably would have gone insane.

I also want to thank Lionel Landwerlin on my team.  He implemented a bunch
of the smaller features as well as VK_KHR_sampler_ycbcr_conversion.  He
also did a large amount of code review.

Finally, I want to thank everyone else who was involved in helping with the
1.1 effort in any way.  We in Linux graphics have an awesome community and
I don't know what we'd do without you all.  I tried to include everyone I
can think of who helped with the 1.1 effort in the Cc.  I'm sorry if I
missed anyone.

Thanks for all your help and hard work,

--Jason Ekstrand



On Wed, Mar 7, 2018 at 6:34 AM, Jason Ekstrand  wrote:

> This patch series adds full support for Vulkan 1.1 to the Intel Linux
> Vulkan driver.  As with the initial Vulkan 1.0 drop two years ago, this
> driver is 100% Vulkan 1.1 conformant on all shipping Intel hardware gen8
> and above.  Unlike our initial Vulkan 1.0 drop two years ago which was
> missing piles of features, the Vulkan 1.1 implementation is nearly feature-
> complete.  With the exception of 16-bit shader I/O (we have patches but
> they are awaiting better testing), every optional feature which was added
> to core in Vulkan 1.1 and which can reasonably be reasonably supported by
> shipping hardware has been implemented.
>
> The only significant feature implemented by this series is subgroups.  It
> is part of Vulkan 1.1 core but there is no corresponding Vulkan extension.
> All of the other significant features in Vulkan 1.1 have already been
> ratified and released as extension and we have already landed support for
> them.
>
> In order to actually advertise support for Vulkan 1.1, we must be able to
> advertise VK_KHR_external_fence which requires the SYNCOBJ_WAIT ioctl which
> landed in Linux 4.14.  Users may need to update their kernel before they
> will get full 1.1 support.
>
> There are also quite a few patches in here to the entrypoints generator
> and some of the other generators to handle various things required for
> reporting a Vulkan version higher than 1.0.  In particular, we need to
> handle name aliasing for entrypoints and enums.
>
> All of the patches in this series have already been reviewed by people at
> Intel or Igalia.  Unless there are any complaints, I plan to land the
> patches this afternoon.  Dave and Bas also have some 1.1 patches and we're
> going to have to work together to land them so that neither driver breaks
> when we land the 1.1 XML.
>
>
> Iago Toral Quiroga (2):
>   anv/device: GetDeviceQueue2 should only return queues with matching
> flags
>   anv/device: fail to initialize device if we have queues with
> unsupported flags
>
> Jason Ekstrand (54):
>   spirv: Add a vtn_constant_value helper
>   spirv: Rework barriers
>   vulkan: Rename multiview from KHX to KHR
>   anv/entrypoints: Generalize the string map a bit
>   anv/entrypoints_gen: A bit of refactoring
>   anv/entrypoints_gen: Allow the string map to grow
>   anv/entrypoints: Add an is_device_entrypoint helper
>   anv/entrypoints: Allow an entrypoint to require multiple extensions
>   anv/entrypoints_gen: Add support for aliases in the XML
>   anv/extensions: Add support for multiple API versions
>   anv/entrypoints: Generate #ifdef guards from platform attributes
>   vulkan/enum_to_str: Add a add_value_from_xml helper to VkEnum
>   vulkan/enum_to_str: Add support for aliases and new Vulkan versions
>   vulkan: Update the XML and headers to 1.1.70
>   spirv: Update the SPIR-V headers and json to 1.3.1
>   anv: Add version 1.1.0 but leave it disabled
>   Get rid of a bunch of KHR suffixes
>   anv/entrypoints: Drop support for protect attributes
>   anv: Support VkPhysicalDeviceShaderDrawParameterFeatures
>   anv: Implement VK_KHR_maintenance3
>   nir/spirv: Add support for device groups
>   anv: Implement vkCmdDispatchBase
>   anv: Trivially implement VK_KHR_device_group
>   anv: Implement GetDeviceQueue2
>   anv: Support querying for 

[Mesa-dev] [Bug 33786] Wayland terminal garbage starting with 1dd8e2757852682af44b63193c89dff3c09c7703

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=33786

Timothy Arceri  changed:

   What|Removed |Added

 Resolution|--- |INVALID
 Status|NEEDINFO|RESOLVED

--- Comment #2 from Timothy Arceri  ---
Assuming not and closing.

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Re: [Mesa-dev] [PATCH 21/22] i965/vec4: Allow CSE on subset VF constant loads

[Ian Romanick]

On 03/05/2018 04:53 PM, Kenneth Graunke wrote:
> On Friday, February 23, 2018 3:56:06 PM PST Ian Romanick wrote:
>> From: Ian Romanick 
>>
>> No changes on other platforms.
>>
>> Haswell, Ivy Bridge, and Sandy Bridge had similar results. (Haswell shown)
>> total instructions in shared programs: 13059891 -> 13059884 (<.01%)
>> instructions in affected programs: 431 -> 424 (-1.62%)
>> helped: 7
>> HURT: 0
>> helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
>> helped stats (rel) min: 1.19% max: 5.26% x̄: 2.05% x̃: 1.49%
>> 95% mean confidence interval for instructions value: -1.00 -1.00
>> 95% mean confidence interval for instructions %-change: -3.39% -0.71%
>> Instructions are helped.
>>
>> total cycles in shared programs: 409260032 -> 409260018 (<.01%)
>> cycles in affected programs: 4228 -> 4214 (-0.33%)
>> helped: 7
>> HURT: 0
>> helped stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
>> helped stats (rel) min: 0.28% max: 2.04% x̄: 0.54% x̃: 0.28%
>> 95% mean confidence interval for cycles value: -2.00 -2.00
>> 95% mean confidence interval for cycles %-change: -1.15% 0.07%
>>
>> Inconclusive result (%-change mean confidence interval includes 0).
>>
>> Signed-off-by: Ian Romanick 
>> ---
>>  src/intel/compiler/brw_vec4_cse.cpp | 21 +
>>  1 file changed, 21 insertions(+)
>>
>> diff --git a/src/intel/compiler/brw_vec4_cse.cpp 
>> b/src/intel/compiler/brw_vec4_cse.cpp
>> index aa2f127..3302939 100644
>> --- a/src/intel/compiler/brw_vec4_cse.cpp
>> +++ b/src/intel/compiler/brw_vec4_cse.cpp
>> @@ -104,6 +104,27 @@ operands_match(const vec4_instruction *a, const 
>> vec4_instruction *b)
>>return xs[0].equals(ys[0]) &&
>>   ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
>>(xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
>> +   } else if (a->opcode == BRW_OPCODE_MOV &&
>> +  xs[0].file == IMM &&
>> +  xs[0].type == BRW_REGISTER_TYPE_VF) {
>> +  src_reg tmp_x = xs[0];
>> +  src_reg tmp_y = ys[0];
>> +
>> +  /* Smash out the values that are not part of the writemask.  Otherwise
>> +   * the equals and negative_equals operators will fail due to 
>> mismatches
>> +   * in unused components.
>> +   */
>> +  static const uint32_t mask[] = {
>> + 0x, 0x00ff, 0xff00, 0x,
>> + 0x00ff, 0x00ff00ff, 0x0000, 0x00ff,
>> + 0xff00, 0xffff, 0xff00ff00, 0xff00,
>> + 0x, 0x00ff, 0xff00, 0x
>> +  };
> 
> This looks a bit crazy at first glance...it isn't though, it's just a
> mapping from WRITEMASK_* to the proper byte masks.  But I think it might
> be clearer to write it with an explicit formula:
> 
> unsigned ab_writemask = a->dst.writemask & b->dst.writemask;
> uint32_t mask = ((ab_writemask & WRITEMASK_X) ? 0x00ff : 0) |
> ((ab_writemask & WRITEMASK_Y) ? 0xff00 : 0) |
> ((ab_writemask & WRITEMASK_Z) ? 0x00ff : 0) |
> ((ab_writemask & WRITEMASK_W) ? 0xff00 : 0);
> tmp_x.ud &= mask;
> tmp_y.ud &= mask;

I was going to complain that this would be bigger / less efficient /
something.  However, in a release build this is actually 48 bytes
smaller. :)

> This makes it pretty obvious what's going on.
> 
> Either way (though I prefer mine),
> Reviewed-by: Kenneth Graunke 
> 
>> +
>> +  tmp_x.ud &= mask[a->dst.writemask & b->dst.writemask];
>> +  tmp_y.ud &= mask[a->dst.writemask & b->dst.writemask];
>> +
>> +  return tmp_x.equals(tmp_y);
>> } else if (!a->is_commutative()) {
>>return xs[0].equals(ys[0]) && xs[1].equals(ys[1]) && 
>> xs[2].equals(ys[2]);
>> } else {
>>
> 




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[Mesa-dev] [Bug 103852] Rendering errors when running dolphin-emu with Vulkan backend, radv (Super Smash Bros. Melee)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103852

--- Comment #4 from Ben Clapp  ---
Bug(s) still present as of 17.3.6. (The issues related to frame drops/frame
presentation don't seem to be an issue at this point, but crop setting still
results in black screen, incorrect colors, etc. persist)

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Re: [Mesa-dev] [PATCH] dri_util: fallback to core with drivers not supporting compat for 3.1

[Ian Romanick]

On 03/02/2018 02:55 PM, Andres Gomez wrote:
> 2599b92eb97 changed Mesa's behavior to allow Compatiblity profile with
> 3.1, and fail when the driver doesn't implement it, if the Core
> profile is not requested by applications.
> 
> Formerly, when requesting a 3.1 Compatibility profile Mesa would
> always fall back into a Core profile. We go back to that behavior now
> so, if the specific driver is not supporting 3.1 with Compatibility
> profile, we will keep falling back into 3.1 Core.
> 
> Fixes: a0c8b49284e ("mesa: enable OpenGL 3.1 with ARB_compatibility")
> 
> Cc: Marek Olšák 
> Cc: Ian Romanick 
> Cc: Kenneth Graunke 
> Cc: Eric Engestrom 
> Cc: Emil Velikov 
> Signed-off-by: Andres Gomez 
> ---
>  docs/features.txt  |  4 ++--
>  src/mesa/drivers/dri/common/dri_util.c | 10 ++
>  2 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/docs/features.txt b/docs/features.txt
> index 5eae34bf0df..d53dd805b1d 100644
> --- a/docs/features.txt
> +++ b/docs/features.txt
> @@ -25,8 +25,8 @@ not started
>  # OpenGL Core and Compatibility context support
>  
>  Some drivers do not support the Compatibility profile or ARB_compatibility.
> -Such drivers are limited to OpenGL 3.0 if the Core profile is not requested
> -by applications. Some of the later GL features are exposed in the 3.0 context
> +Such drivers are limited to use OpenGL 3.1 and later in Core
> +profile. Some of the later GL features are exposed in the 3.0 context

As I said in review of another patch, we need to stop saying OpenGL 3.1
{core,compatibility} profile.  There is no such thing as a profile
before OpenGL 3.2.  Our use of that mechanism is merely an artifact of
how we have implemented things to support multiple drivers in multiple APIs.

I would suggest wording this as:

Some drivers do not support the Compatibility profile or the
ARB_compatibility extensions.  If an application does not request a
specific version without the forward-compatiblity flag, such drivers
will be limited to OpenGL 3.0.  If an application requests OpenGL 3.1,
it will get a context that may or may not have the ARB_compatibility
extension enabled.  Some of the later GL features are exposed in the 3.0
context as extensions.

>  as extensions.
>  
>  
> diff --git a/src/mesa/drivers/dri/common/dri_util.c 
> b/src/mesa/drivers/dri/common/dri_util.c
> index a34f38d6114..53461dfb4e0 100644
> --- a/src/mesa/drivers/dri/common/dri_util.c
> +++ b/src/mesa/drivers/dri/common/dri_util.c
> @@ -381,6 +381,16 @@ driCreateContextAttribs(__DRIscreen *screen, int api,
>   }
>  }
>  
> +/* The specific Mesa driver may not support the GL_ARB_compatibilty
> + * extension or the compatibility profile.  In that case, we treat an
> + * API_OPENGL_COMPAT 3.1 as API_OPENGL_CORE. We reject API_OPENGL_COMPAT
> + * 3.2+ in any case.
> + */
> +if (mesa_api == API_OPENGL_COMPAT &&
> +ctx_config.major_version == 3 && ctx_config.minor_version == 1 &&
> +screen->max_gl_compat_version < 31)
> +   mesa_api = API_OPENGL_CORE;
> +
>  if (mesa_api == API_OPENGL_COMPAT
>  && ((ctx_config.major_version > 3)
>  || (ctx_config.major_version == 3 &&
> 

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[Mesa-dev] [Bug 64386] [865G] White screen using Stellarium

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=64386

Timothy Arceri  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |NOTOURBUG

--- Comment #4 from Timothy Arceri  ---
The errors:

OpenGL error detected at  "drawWindow() start"  :  "GL_INVALID_VALUE" 
OpenGL error detected at  "drawWindow() start"  : 
"GL_INVALID_FRAMEBUFFER_OPERATION" 
OpenGL error detected at  "drawWindow() start"  : 
"GL_INVALID_FRAMEBUFFER_OPERATION"

Suggest this is an app bug rather than a Mesa bug. Closing.

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[Mesa-dev] [Bug 104625] semicolon after if

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104625

Timothy Arceri  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|NEW |RESOLVED

--- Comment #2 from Timothy Arceri  ---
Fixed by:

author  Thomas Hellstrom 
commit  80c31f7837cd319910d94d780f5048de6cce0adb

svga: Fix a leftover debug hack

Fix what appears to be a leftover debug hack.
The hack would force the driver to take a different blit path; possibly,
although unverified, reverting to software blits.

Tested using piglit tests/quick. No related regressions.

Cc: "17.2 17.3 18.0" 
Fixes: 9d81ab7376 (svga: Relax the format checks for copy_region_vgpu10
somewhat)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104625
Reported-by: Grazvydas Ignotas 
Signed-off-by: Thomas Hellstrom 
Reviewed-by: Brian Paul 

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Re: [Mesa-dev] [PATCH 04/56] anv/entrypoints: Generalize the string map a bit

[Dylan Baker]

You sent out a 56 patch series and didn't even wait 12 hours before pushing it?

Quoting Jason Ekstrand (2018-03-07 19:56:21)
> You're 4.5 hours too late, I'm afraid.  I'd be happy to take some patches
> though. :-)
> 
> On Wed, Mar 7, 2018 at 4:42 PM, Dylan Baker  wrote:
> 
> Quoting Jason Ekstrand (2018-03-07 06:34:52)
> > The original string map assumed that the mapping from strings to
> > entrypoints was a bijection.  This will not be true the moment we
> > add entrypoint aliasing.  This reworks things to be an arbitrary map
> > from strings to non-negative signed integers.  The old one also had a
> > potential bug if we ever had a hash collision because it didn't do the
> > strcmp inside the lookup loop.  While we're at it, we break things out
> > into a helpful class.
> >
> > Reviewed-by: Lionel Landwerlin 
> > Reviewed-by: Samuel Iglesias Gonsálvez 
> > ---
> >  src/intel/vulkan/anv_entrypoints_gen.py | 188
> +---
> >  1 file changed, 103 insertions(+), 85 deletions(-)
> >
> > diff --git a/src/intel/vulkan/anv_entrypoints_gen.py b/src/intel/vulkan/
> anv_entrypoints_gen.py
> > index 34ffedb..dc0f0e9 100644
> > --- a/src/intel/vulkan/anv_entrypoints_gen.py
> > +++ b/src/intel/vulkan/anv_entrypoints_gen.py
> > @@ -115,9 +115,10 @@ TEMPLATE_C = Template(u"""\
> >
> >  #include "anv_private.h"
> >
> > -struct anv_entrypoint {
> > +struct string_map_entry {
> >     uint32_t name;
> >     uint32_t hash;
> > +   uint32_t num;
> >  };
> >
> >  /* We use a big string constant to avoid lots of reloctions from the
> entry
> > @@ -126,17 +127,60 @@ struct anv_entrypoint {
> >   */
> >
> >  static const char strings[] =
> > -% for e in entrypoints:
> > -    "${e.name}\\0"
> > +% for s in strmap.sorted_strings:
> > +    "${s.string}\\0"
> >  % endfor
> >  ;
> >
> > -static const struct anv_entrypoint entrypoints[] = {
> > -% for e in entrypoints:
> > -    [${e.num}] = { ${offsets[e.num]}, ${'{:0=#8x}'.format(e.get_c_hash
> ())} }, /* ${e.name} */
> > +static const struct string_map_entry string_map_entries[] = {
> > +% for s in strmap.sorted_strings:
> > +    { ${s.offset}, ${'{:0=#8x}'.format(s.hash)}, ${s.num} }, /* $
> {s.string} */
> >  % endfor
> >  };
> >
> > +/* Hash table stats:
> > + * size ${len(strmap.sorted_strings)} entries
> > + * collisions entries:
> > +% for i in xrange(10):
> > + *     ${i}${'+' if i == 9 else ' '}     ${strmap.collisions[i]}
> > +% endfor
> > + */
> > +
> > +#define none 0x
> > +static const uint16_t string_map[${strmap.hash_size}] = {
> > +% for e in strmap.mapping:
> > +    ${ '{:0=#6x}'.format(e) if e >= 0 else 'none' },
> > +% endfor
> > +};
> > +
> > +static int
> > +string_map_lookup(const char *str)
> > +{
> > +    static const uint32_t prime_factor = ${strmap.prime_factor};
> > +    static const uint32_t prime_step = ${strmap.prime_step};
> > +    const struct string_map_entry *e;
> > +    uint32_t hash, h;
> > +    uint16_t i;
> > +    const char *p;
> > +
> > +    hash = 0;
> > +    for (p = str; *p; p++)
> > +        hash = hash * prime_factor + *p;
> > +
> > +    h = hash;
> > +    while (1) {
> > +        i = string_map[h & ${strmap.hash_mask}];
> > +        if (i == none)
> > +           return -1;
> > +        e = _map_entries[i];
> > +        if (e->hash == hash && strcmp(str, strings + e->name) == 0)
> > +            return e->num;
> > +        h += prime_step;
> > +    }
> > +
> > +    return -1;
> > +}
> > +
> >  /* Weak aliases for all potential implementations. These will resolve 
> to
> >   * NULL if they're not defined, which lets the resolve_entrypoint()
> function
> >   * either pick the correct entry point.
> > @@ -275,54 +319,10 @@ anv_resolve_entrypoint(const struct 
> gen_device_info
> *devinfo, uint32_t index)
> >        return anv_dispatch_table.entrypoints[index];
> >  }
> >
> > -/* Hash table stats:
> > - * size ${hash_size} entries
> > - * collisions entries:
> > -% for i in xrange(10):
> > - *     ${i}${'+' if i == 9 else ''}     ${collisions[i]}
> > -% endfor
> > - */
> > -
> > -#define none ${'{:#x}'.format(none)}
> > -static const uint16_t map[] = {
> > -% for i in xrange(0, hash_size, 8):
> > -  % for j in xrange(i, i + 8):
> > -    ## This is 6 because the 0x is counted in the length
> > -    % if mapping[j] & 0x == 0x:
> > -      none,
> > -    % else:
> > -      ${'{:0=#6x}'.format(mapping[j] & 0x)},
> > -    % endif
> > 

Re: [Mesa-dev] [PATCH] dri_util: when overriding, always reset the core version

[Tapani Pälli]

On 03/07/2018 04:29 PM, Emil Velikov wrote:

On 7 March 2018 at 06:02, Tapani Pälli  wrote:



On 03/07/2018 12:36 AM, Marek Olšák wrote:


On Mon, Mar 5, 2018 at 7:33 AM, Tapani Pälli 
wrote:


Hi;

On 03/02/2018 03:25 PM, Andres Gomez wrote:



This way we won't fail when validating just because we may have a non
overriden core version that is lower than the requested one, even when
the compat version is high enough.




Do I understand correctly that this happens because when version asked is



3.2 then we always do core context, even when overriding to compat
profile?



No. 3.2COMPAT will set both core and compat version limits to 3.2.



I see, I was trying to understand why core version matters when using compat
profile but I'm not sure I get it, it probably should not matter.


In some cases you'd get a program using third party middle-ware.
For many instances of those one component is using a core while the
other a compat profile.


Right, that makes sense. Thanks Emil!


Admittedly the whole extension overriding is a bit of a band-aid
(hack) and it's not worth spending much too time on it ;-)

-Emil



// Tapani
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[Mesa-dev] [Bug 28433] Mesa DRI Intel 845G GEM Drivers returning artifacts in textures that can lockup PC on glxSwapBuffers.

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=28433

Timothy Arceri  changed:

   What|Removed |Added

  Component|Other   |Drivers/DRI/i915
   Assignee|mesa-dev@lists.freedesktop. |dri-devel@lists.freedesktop
   |org |.org

--- Comment #3 from Timothy Arceri  ---
Reassigning to i915. Probably needs to be retested.

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[Mesa-dev] [Bug 95083] ilo driver draws only the mouse cursor

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=95083

Timothy Arceri  changed:

   What|Removed |Added

 Resolution|--- |INVALID
 Status|NEW |RESOLVED

--- Comment #1 from Timothy Arceri  ---
The ilo driver is no longer active and has been dropped from Mesa. Closing.

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[Mesa-dev] [Bug 69682] mesa-9.2.0 and glamor-0.5.1 crash X - (?) _mesa_GetVertexAttribdv (?)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=69682

Timothy Arceri  changed:

   What|Removed |Added

 CC||aux...@gmail.com

--- Comment #9 from Timothy Arceri  ---
*** Bug 66359 has been marked as a duplicate of this bug. ***

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[Mesa-dev] [Bug 66359] Mesa crashes in _mesa_VertexAttrib2dvNV on starting KDE 4.11

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=66359

Timothy Arceri  changed:

   What|Removed |Added

 Resolution|--- |DUPLICATE
 Status|NEW |RESOLVED

--- Comment #9 from Timothy Arceri  ---


*** This bug has been marked as a duplicate of bug 69682 ***

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Re: [Mesa-dev] [PATCH] squash! i965/fs: Merge CMP and SEL into CSEL on Gen8+

[Matt Turner]

Looks good to me.
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[Mesa-dev] [PATCH mesa 06/21] radv: Add EXT_direct_mode_display to radv driver

[Keith Packard]

Add support for the EXT_direct_mode_display extension. This just
provides the vkReleaseDisplayEXT function.

Signed-off-by: Keith Packard 
---
 src/amd/vulkan/radv_extensions.py |  1 +
 src/amd/vulkan/radv_wsi_display.c | 11 +++
 2 files changed, 12 insertions(+)

diff --git a/src/amd/vulkan/radv_extensions.py 
b/src/amd/vulkan/radv_extensions.py
index 169cace577e..d4783d33ee9 100644
--- a/src/amd/vulkan/radv_extensions.py
+++ b/src/amd/vulkan/radv_extensions.py
@@ -86,6 +86,7 @@ EXTENSIONS = [
 Extension('VK_KHR_xlib_surface',  6, 
'VK_USE_PLATFORM_XLIB_KHR'),
 Extension('VK_KHR_multiview', 1, True),
 Extension('VK_KHR_display',  23, 
'VK_USE_PLATFORM_DISPLAY_KHR'),
+Extension('VK_EXT_direct_mode_display',   1, 
'VK_USE_PLATFORM_DISPLAY_KHR'),
 Extension('VK_EXT_debug_report',  9, True),
 Extension('VK_EXT_discard_rectangles',1, True),
 Extension('VK_EXT_external_memory_dma_buf',   1, True),
diff --git a/src/amd/vulkan/radv_wsi_display.c 
b/src/amd/vulkan/radv_wsi_display.c
index f98a071513d..deaf61ce0df 100644
--- a/src/amd/vulkan/radv_wsi_display.c
+++ b/src/amd/vulkan/radv_wsi_display.c
@@ -141,3 +141,14 @@ radv_CreateDisplayPlaneSurfaceKHR(VkInstance   
 _instanc
 
return wsi_create_display_surface(_instance, alloc, create_info, 
surface);
 }
+
+VkResult
+radv_ReleaseDisplayEXT(VkPhysicalDevice physical_device,
+  VkDisplayKHR display)
+{
+   RADV_FROM_HANDLE(radv_physical_device, pdevice, physical_device);
+
+   return wsi_release_display(physical_device,
+  >wsi_device,
+  display);
+}
-- 
2.16.2

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[Mesa-dev] [PATCH mesa 03/21] radv: Add KHR_display extension to radv [v3]

[Keith Packard]

This adds support for the KHR_display extension to the radv Vulkan
driver. The driver now attempts to open the master DRM node when the
KHR_display extension is requested so that the common winsys code can
perform the necessary operations.

v2:
* Simplify addition of VK_USE_PLATFORM_DISPLAY_KHR to
  vulkan_wsi_args

Suggested-by: Eric Engestrom 

v3:
Adapt to new wsi_device_init API (added display_fd)

Signed-off-by: Keith Packard 
---
 src/amd/vulkan/Makefile.am|   8 +++
 src/amd/vulkan/Makefile.sources   |   3 +
 src/amd/vulkan/meson.build|   5 ++
 src/amd/vulkan/radv_device.c  |  17 +
 src/amd/vulkan/radv_extensions.py |   7 +-
 src/amd/vulkan/radv_private.h |   1 +
 src/amd/vulkan/radv_wsi_display.c | 143 ++
 7 files changed, 182 insertions(+), 2 deletions(-)
 create mode 100644 src/amd/vulkan/radv_wsi_display.c

diff --git a/src/amd/vulkan/Makefile.am b/src/amd/vulkan/Makefile.am
index 80937e38d38..f793dc2fa46 100644
--- a/src/amd/vulkan/Makefile.am
+++ b/src/amd/vulkan/Makefile.am
@@ -76,6 +76,14 @@ VULKAN_LIB_DEPS = \
$(DLOPEN_LIBS) \
-lm
 
+if HAVE_PLATFORM_DISPLAY
+AM_CPPFLAGS += \
+   -DVK_USE_PLATFORM_DISPLAY_KHR
+
+VULKAN_SOURCES += $(VULKAN_WSI_DISPLAY_FILES)
+
+endif
+
 if HAVE_PLATFORM_X11
 AM_CPPFLAGS += \
$(XCB_DRI3_CFLAGS) \
diff --git a/src/amd/vulkan/Makefile.sources b/src/amd/vulkan/Makefile.sources
index a510d88d965..618a6cdaed0 100644
--- a/src/amd/vulkan/Makefile.sources
+++ b/src/amd/vulkan/Makefile.sources
@@ -78,6 +78,9 @@ VULKAN_WSI_WAYLAND_FILES := \
 VULKAN_WSI_X11_FILES := \
radv_wsi_x11.c
 
+VULKAN_WSI_DISPLAY_FILES := \
+   radv_wsi_display.c
+
 VULKAN_GENERATED_FILES := \
radv_entrypoints.c \
radv_entrypoints.h \
diff --git a/src/amd/vulkan/meson.build b/src/amd/vulkan/meson.build
index 98051560a52..7db2d9f6c21 100644
--- a/src/amd/vulkan/meson.build
+++ b/src/amd/vulkan/meson.build
@@ -113,6 +113,11 @@ if with_platform_wayland
   libradv_files += files('radv_wsi_wayland.c')
 endif
 
+if with_platform_display
+  radv_flags += '-DVK_USE_PLATFORM_DISPLAY_KHR'
+  libradv_files += files('radv_wsi_display.c')
+endif
+
 libvulkan_radeon = shared_library(
   'vulkan_radeon',
   [libradv_files, radv_entrypoints, radv_extensions_c, vk_format_table_c],
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 35fd1ef6b29..e9476777b45 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -257,6 +257,23 @@ radv_physical_device_init(struct radv_physical_device 
*device,
goto fail;
}
 
+   if (instance->enabled_extensions.KHR_display) {
+   master_fd = open(drm_device->nodes[DRM_NODE_PRIMARY], O_RDWR | 
O_CLOEXEC);
+   if (master_fd >= 0) {
+   uint32_t accel_working = 0;
+   struct drm_amdgpu_info request = {
+   .return_pointer = (uintptr_t)_working,
+   .return_size = sizeof(accel_working),
+   .query = AMDGPU_INFO_ACCEL_WORKING
+   };
+
+   if (drmCommandWrite(master_fd, DRM_AMDGPU_INFO, 
, sizeof (struct drm_amdgpu_info)) < 0 || !accel_working) {
+   close(master_fd);
+   master_fd = -1;
+   }
+   }
+   }
+
device->master_fd = master_fd;
device->local_fd = fd;
device->ws->query_info(device->ws, >rad_info);
diff --git a/src/amd/vulkan/radv_extensions.py 
b/src/amd/vulkan/radv_extensions.py
index 469b09a160d..169cace577e 100644
--- a/src/amd/vulkan/radv_extensions.py
+++ b/src/amd/vulkan/radv_extensions.py
@@ -85,6 +85,7 @@ EXTENSIONS = [
 Extension('VK_KHR_xcb_surface',   6, 
'VK_USE_PLATFORM_XCB_KHR'),
 Extension('VK_KHR_xlib_surface',  6, 
'VK_USE_PLATFORM_XLIB_KHR'),
 Extension('VK_KHR_multiview', 1, True),
+Extension('VK_KHR_display',  23, 
'VK_USE_PLATFORM_DISPLAY_KHR'),
 Extension('VK_EXT_debug_report',  9, True),
 Extension('VK_EXT_discard_rectangles',1, True),
 Extension('VK_EXT_external_memory_dma_buf',   1, True),
@@ -216,7 +217,7 @@ _TEMPLATE_C = Template(COPYRIGHT + """
 #include "vk_util.h"
 
 /* Convert the VK_USE_PLATFORM_* defines to booleans */
-%for platform in ['ANDROID', 'WAYLAND', 'XCB', 'XLIB']:
+%for platform in ['ANDROID', 'WAYLAND', 'XCB', 'XLIB', 'DISPLAY']:
 #ifdef VK_USE_PLATFORM_${platform}_KHR
 #   undef VK_USE_PLATFORM_${platform}_KHR
 #   define VK_USE_PLATFORM_${platform}_KHR true
@@ -235,7 +236,9 @@ _TEMPLATE_C = Template(COPYRIGHT + """
 
 #define RADV_HAS_SURFACE (VK_USE_PLATFORM_WAYLAND_KHR || \\
  

[Mesa-dev] [Bug 41162] util/u_draw.c:71:util_draw_max_index: Assertion `buffer_size - buffer->buffer_offset <= buffer_size' failed.

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=41162

Timothy Arceri  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |INVALID

--- Comment #3 from Timothy Arceri  ---
Assuming not and closing.

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[Mesa-dev] [Bug 34361] Mesa needs a man-page or several

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=34361

Timothy Arceri  changed:

   What|Removed |Added

 Resolution|--- |NOTABUG
 Status|NEW |RESOLVED

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[Mesa-dev] [Bug 65475] Inconsistent use of both stderr and stdout for debug output

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=65475

Timothy Arceri  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |WONTFIX

--- Comment #2 from Timothy Arceri  ---
Closing as wont fix as per the last line of comment 1.

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